1 /** 2 ****************************************************************************** 3 * @file stm32f7xx_ll_usb.h 4 * @author MCD Application Team 5 * @brief Header file of USB Low Layer HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32F7xx_LL_USB_H 21 #define STM32F7xx_LL_USB_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif /* __cplusplus */ 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32f7xx_hal_def.h" 29 30 #if defined (USB_OTG_FS) || defined (USB_OTG_HS) 31 /** @addtogroup STM32F7xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup USB_LL 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 41 /** 42 * @brief USB Mode definition 43 */ 44 #if defined (USB_OTG_FS) || defined (USB_OTG_HS) 45 46 typedef enum 47 { 48 USB_DEVICE_MODE = 0, 49 USB_HOST_MODE = 1, 50 USB_DRD_MODE = 2 51 } USB_OTG_ModeTypeDef; 52 53 /** 54 * @brief URB States definition 55 */ 56 typedef enum 57 { 58 URB_IDLE = 0, 59 URB_DONE, 60 URB_NOTREADY, 61 URB_NYET, 62 URB_ERROR, 63 URB_STALL 64 } USB_OTG_URBStateTypeDef; 65 66 /** 67 * @brief Host channel States definition 68 */ 69 typedef enum 70 { 71 HC_IDLE = 0, 72 HC_XFRC, 73 HC_HALTED, 74 HC_ACK, 75 HC_NAK, 76 HC_NYET, 77 HC_STALL, 78 HC_XACTERR, 79 HC_BBLERR, 80 HC_DATATGLERR 81 } USB_OTG_HCStateTypeDef; 82 83 84 /** 85 * @brief USB Instance Initialization Structure definition 86 */ 87 typedef struct 88 { 89 uint32_t dev_endpoints; /*!< Device Endpoints number. 90 This parameter depends on the used USB core. 91 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ 92 93 uint32_t Host_channels; /*!< Host Channels number. 94 This parameter Depends on the used USB core. 95 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ 96 97 uint32_t speed; /*!< USB Core speed. 98 This parameter can be any value of @ref PCD_Speed/HCD_Speed 99 (HCD_SPEED_xxx, HCD_SPEED_xxx) */ 100 101 uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA used only for OTG HS. */ 102 103 uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */ 104 105 uint32_t phy_itface; /*!< Select the used PHY interface. 106 This parameter can be any value of @ref PCD_PHY_Module/HCD_PHY_Module */ 107 108 uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */ 109 110 uint32_t low_power_enable; /*!< Enable or disable the low power mode. */ 111 112 uint32_t lpm_enable; /*!< Enable or disable Link Power Management. */ 113 114 uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */ 115 116 uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */ 117 118 uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */ 119 120 uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */ 121 122 } USB_OTG_CfgTypeDef; 123 124 typedef struct 125 { 126 uint8_t num; /*!< Endpoint number 127 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ 128 129 uint8_t is_in; /*!< Endpoint direction 130 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 131 132 uint8_t is_stall; /*!< Endpoint stall condition 133 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 134 135 uint8_t is_iso_incomplete; /*!< Endpoint isoc condition 136 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 137 138 uint8_t type; /*!< Endpoint type 139 This parameter can be any value of @ref USB_LL_EP_Type */ 140 141 uint8_t data_pid_start; /*!< Initial data PID 142 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 143 144 uint8_t even_odd_frame; /*!< IFrame parity 145 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 146 147 uint16_t tx_fifo_num; /*!< Transmission FIFO number 148 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ 149 150 uint32_t maxpacket; /*!< Endpoint Max packet size 151 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ 152 153 uint8_t *xfer_buff; /*!< Pointer to transfer buffer */ 154 155 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address */ 156 157 uint32_t xfer_len; /*!< Current transfer length */ 158 159 uint32_t xfer_size; /*!< requested transfer size */ 160 161 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */ 162 } USB_OTG_EPTypeDef; 163 164 typedef struct 165 { 166 uint8_t dev_addr; /*!< USB device address. 167 This parameter must be a number between Min_Data = 1 and Max_Data = 255 */ 168 169 uint8_t ch_num; /*!< Host channel number. 170 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ 171 172 uint8_t ep_num; /*!< Endpoint number. 173 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ 174 175 uint8_t ep_is_in; /*!< Endpoint direction 176 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 177 178 uint8_t speed; /*!< USB Host Channel speed. 179 This parameter can be any value of @ref HCD_Device_Speed: 180 (HCD_DEVICE_SPEED_xxx) */ 181 182 uint8_t do_ping; /*!< Enable or disable the use of the PING protocol for HS mode. */ 183 184 uint8_t process_ping; /*!< Execute the PING protocol for HS mode. */ 185 186 uint8_t ep_type; /*!< Endpoint Type. 187 This parameter can be any value of @ref USB_LL_EP_Type */ 188 189 uint16_t max_packet; /*!< Endpoint Max packet size. 190 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ 191 192 uint8_t data_pid; /*!< Initial data PID. 193 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 194 195 uint8_t *xfer_buff; /*!< Pointer to transfer buffer. */ 196 197 uint32_t XferSize; /*!< OTG Channel transfer size. */ 198 199 uint32_t xfer_len; /*!< Current transfer length. */ 200 201 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer. */ 202 203 uint8_t toggle_in; /*!< IN transfer current toggle flag. 204 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 205 206 uint8_t toggle_out; /*!< OUT transfer current toggle flag 207 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 208 209 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */ 210 211 uint32_t ErrCnt; /*!< Host channel error count. */ 212 213 USB_OTG_URBStateTypeDef urb_state; /*!< URB state. 214 This parameter can be any value of @ref USB_OTG_URBStateTypeDef */ 215 216 USB_OTG_HCStateTypeDef state; /*!< Host Channel state. 217 This parameter can be any value of @ref USB_OTG_HCStateTypeDef */ 218 } USB_OTG_HCTypeDef; 219 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */ 220 221 222 /* Exported constants --------------------------------------------------------*/ 223 224 /** @defgroup PCD_Exported_Constants PCD Exported Constants 225 * @{ 226 */ 227 228 #if defined (USB_OTG_FS) || defined (USB_OTG_HS) 229 /** @defgroup USB_OTG_CORE VERSION ID 230 * @{ 231 */ 232 #define USB_OTG_CORE_ID_300A 0x4F54300AU 233 #define USB_OTG_CORE_ID_310A 0x4F54310AU 234 /** 235 * @} 236 */ 237 238 /** @defgroup USB_Core_Mode_ USB Core Mode 239 * @{ 240 */ 241 #define USB_OTG_MODE_DEVICE 0U 242 #define USB_OTG_MODE_HOST 1U 243 #define USB_OTG_MODE_DRD 2U 244 /** 245 * @} 246 */ 247 248 /** @defgroup USB_LL Device Speed 249 * @{ 250 */ 251 #define USBD_HS_SPEED 0U 252 #define USBD_HSINFS_SPEED 1U 253 #define USBH_HS_SPEED 0U 254 #define USBD_FS_SPEED 2U 255 #define USBH_FSLS_SPEED 1U 256 /** 257 * @} 258 */ 259 260 /** @defgroup USB_LL_Core_Speed USB Low Layer Core Speed 261 * @{ 262 */ 263 #define USB_OTG_SPEED_HIGH 0U 264 #define USB_OTG_SPEED_HIGH_IN_FULL 1U 265 #define USB_OTG_SPEED_FULL 3U 266 /** 267 * @} 268 */ 269 270 /** @defgroup USB_LL_Core_PHY USB Low Layer Core PHY 271 * @{ 272 */ 273 #define USB_OTG_ULPI_PHY 1U 274 #define USB_OTG_EMBEDDED_PHY 2U 275 #define USB_OTG_HS_EMBEDDED_PHY 3U 276 #if !defined (USB_HS_PHYC_TUNE_VALUE) 277 #define USB_HS_PHYC_TUNE_VALUE 0x00000F13U /*!< Value of USB HS PHY Tune */ 278 #endif /* USB_HS_PHYC_TUNE_VALUE */ 279 /** 280 * @} 281 */ 282 283 /** @defgroup USB_LL_Turnaround_Timeout Turnaround Timeout Value 284 * @{ 285 */ 286 #ifndef USBD_HS_TRDT_VALUE 287 #define USBD_HS_TRDT_VALUE 9U 288 #endif /* USBD_HS_TRDT_VALUE */ 289 #ifndef USBD_FS_TRDT_VALUE 290 #define USBD_FS_TRDT_VALUE 5U 291 #define USBD_DEFAULT_TRDT_VALUE 9U 292 #endif /* USBD_HS_TRDT_VALUE */ 293 /** 294 * @} 295 */ 296 297 /** @defgroup USB_LL_Core_MPS USB Low Layer Core MPS 298 * @{ 299 */ 300 #define USB_OTG_HS_MAX_PACKET_SIZE 512U 301 #define USB_OTG_FS_MAX_PACKET_SIZE 64U 302 #define USB_OTG_MAX_EP0_SIZE 64U 303 /** 304 * @} 305 */ 306 307 /** @defgroup USB_LL_Core_PHY_Frequency USB Low Layer Core PHY Frequency 308 * @{ 309 */ 310 #define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0U << 1) 311 #define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1U << 1) 312 #define DSTS_ENUMSPD_FS_PHY_48MHZ (3U << 1) 313 /** 314 * @} 315 */ 316 317 /** @defgroup USB_LL_CORE_Frame_Interval USB Low Layer Core Frame Interval 318 * @{ 319 */ 320 #define DCFG_FRAME_INTERVAL_80 0U 321 #define DCFG_FRAME_INTERVAL_85 1U 322 #define DCFG_FRAME_INTERVAL_90 2U 323 #define DCFG_FRAME_INTERVAL_95 3U 324 /** 325 * @} 326 */ 327 328 /** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS 329 * @{ 330 */ 331 #define EP_MPS_64 0U 332 #define EP_MPS_32 1U 333 #define EP_MPS_16 2U 334 #define EP_MPS_8 3U 335 /** 336 * @} 337 */ 338 339 /** @defgroup USB_LL_EP_Speed USB Low Layer EP Speed 340 * @{ 341 */ 342 #define EP_SPEED_LOW 0U 343 #define EP_SPEED_FULL 1U 344 #define EP_SPEED_HIGH 2U 345 /** 346 * @} 347 */ 348 349 /** @defgroup USB_LL_EP_Type USB Low Layer EP Type 350 * @{ 351 */ 352 #define EP_TYPE_CTRL 0U 353 #define EP_TYPE_ISOC 1U 354 #define EP_TYPE_BULK 2U 355 #define EP_TYPE_INTR 3U 356 #define EP_TYPE_MSK 3U 357 /** 358 * @} 359 */ 360 361 /** @defgroup USB_LL_STS_Defines USB Low Layer STS Defines 362 * @{ 363 */ 364 #define STS_GOUT_NAK 1U 365 #define STS_DATA_UPDT 2U 366 #define STS_XFER_COMP 3U 367 #define STS_SETUP_COMP 4U 368 #define STS_SETUP_UPDT 6U 369 /** 370 * @} 371 */ 372 373 /** @defgroup USB_LL_HCFG_SPEED_Defines USB Low Layer HCFG Speed Defines 374 * @{ 375 */ 376 #define HCFG_30_60_MHZ 0U 377 #define HCFG_48_MHZ 1U 378 #define HCFG_6_MHZ 2U 379 /** 380 * @} 381 */ 382 383 /** @defgroup USB_LL_HPRT0_PRTSPD_SPEED_Defines USB Low Layer HPRT0 PRTSPD Speed Defines 384 * @{ 385 */ 386 #define HPRT0_PRTSPD_HIGH_SPEED 0U 387 #define HPRT0_PRTSPD_FULL_SPEED 1U 388 #define HPRT0_PRTSPD_LOW_SPEED 2U 389 /** 390 * @} 391 */ 392 393 #define HCCHAR_CTRL 0U 394 #define HCCHAR_ISOC 1U 395 #define HCCHAR_BULK 2U 396 #define HCCHAR_INTR 3U 397 398 #define HC_PID_DATA0 0U 399 #define HC_PID_DATA2 1U 400 #define HC_PID_DATA1 2U 401 #define HC_PID_SETUP 3U 402 403 #define GRXSTS_PKTSTS_IN 2U 404 #define GRXSTS_PKTSTS_IN_XFER_COMP 3U 405 #define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5U 406 #define GRXSTS_PKTSTS_CH_HALTED 7U 407 408 #define TEST_J 1U 409 #define TEST_K 2U 410 #define TEST_SE0_NAK 3U 411 #define TEST_PACKET 4U 412 #define TEST_FORCE_EN 5U 413 414 #define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx_BASE + USB_OTG_PCGCCTL_BASE) 415 #define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx_BASE + USB_OTG_HOST_PORT_BASE) 416 417 #define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)(USBx_BASE + USB_OTG_DEVICE_BASE)) 418 #define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)(USBx_BASE\ 419 + USB_OTG_IN_ENDPOINT_BASE + ((i) * USB_OTG_EP_REG_SIZE))) 420 421 #define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)(USBx_BASE\ 422 + USB_OTG_OUT_ENDPOINT_BASE + ((i) * USB_OTG_EP_REG_SIZE))) 423 424 #define USBx_DFIFO(i) *(__IO uint32_t *)(USBx_BASE + USB_OTG_FIFO_BASE + ((i) * USB_OTG_FIFO_SIZE)) 425 426 #define USBx_HOST ((USB_OTG_HostTypeDef *)(USBx_BASE + USB_OTG_HOST_BASE)) 427 #define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)(USBx_BASE\ 428 + USB_OTG_HOST_CHANNEL_BASE\ 429 + ((i) * USB_OTG_HOST_CHANNEL_SIZE))) 430 431 #ifdef USB_HS_PHYC /* Legacy name for USBPHYC defined in CMSIS device but USBCPHYC used in USB driver to determine if peripheral is present or not */ 432 #define USBPHYC USB_HS_PHYC 433 #endif /* USB_HS_PHYC */ 434 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */ 435 436 #define EP_ADDR_MSK 0xFU 437 438 #ifndef USE_USB_DOUBLE_BUFFER 439 #define USE_USB_DOUBLE_BUFFER 1U 440 #endif /* USE_USB_DOUBLE_BUFFER */ 441 /** 442 * @} 443 */ 444 445 /* Exported macro ------------------------------------------------------------*/ 446 /** @defgroup USB_LL_Exported_Macros USB Low Layer Exported Macros 447 * @{ 448 */ 449 #if defined (USB_OTG_FS) || defined (USB_OTG_HS) 450 #define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__)) 451 #define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__)) 452 453 #define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__)) 454 #define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__)) 455 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */ 456 /** 457 * @} 458 */ 459 460 /* Exported functions --------------------------------------------------------*/ 461 /** @addtogroup USB_LL_Exported_Functions USB Low Layer Exported Functions 462 * @{ 463 */ 464 #if defined (USB_OTG_FS) || defined (USB_OTG_HS) 465 HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg); 466 HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg); 467 HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx); 468 HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx); 469 HAL_StatusTypeDef USB_SetTurnaroundTime(USB_OTG_GlobalTypeDef *USBx, uint32_t hclk, uint8_t speed); 470 HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_OTG_ModeTypeDef mode); 471 HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx, uint8_t speed); 472 HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx); 473 HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num); 474 HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); 475 HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); 476 HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); 477 HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); 478 HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep, uint8_t dma); 479 HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep, uint8_t dma); 480 HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, 481 uint8_t ch_ep_num, uint16_t len, uint8_t dma); 482 483 void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); 484 HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); 485 HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); 486 HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); 487 HAL_StatusTypeDef USB_SetDevAddress(USB_OTG_GlobalTypeDef *USBx, uint8_t address); 488 HAL_StatusTypeDef USB_DevConnect(USB_OTG_GlobalTypeDef *USBx); 489 HAL_StatusTypeDef USB_DevDisconnect(USB_OTG_GlobalTypeDef *USBx); 490 HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx); 491 HAL_StatusTypeDef USB_ActivateSetup(USB_OTG_GlobalTypeDef *USBx); 492 HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup); 493 uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx); 494 uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx); 495 uint32_t USB_ReadInterrupts(USB_OTG_GlobalTypeDef *USBx); 496 uint32_t USB_ReadChInterrupts(USB_OTG_GlobalTypeDef *USBx, uint8_t chnum); 497 uint32_t USB_ReadDevAllOutEpInterrupt(USB_OTG_GlobalTypeDef *USBx); 498 uint32_t USB_ReadDevOutEPInterrupt(USB_OTG_GlobalTypeDef *USBx, uint8_t epnum); 499 uint32_t USB_ReadDevAllInEpInterrupt(USB_OTG_GlobalTypeDef *USBx); 500 uint32_t USB_ReadDevInEPInterrupt(USB_OTG_GlobalTypeDef *USBx, uint8_t epnum); 501 void USB_ClearInterrupts(USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt); 502 503 HAL_StatusTypeDef USB_HostInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg); 504 HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx, uint8_t freq); 505 HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx); 506 HAL_StatusTypeDef USB_DriveVbus(USB_OTG_GlobalTypeDef *USBx, uint8_t state); 507 uint32_t USB_GetHostSpeed(USB_OTG_GlobalTypeDef *USBx); 508 uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef *USBx); 509 HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num, 510 uint8_t epnum, uint8_t dev_address, uint8_t speed, 511 uint8_t ep_type, uint16_t mps); 512 HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, 513 USB_OTG_HCTypeDef *hc, uint8_t dma); 514 515 uint32_t USB_HC_ReadInterrupt(USB_OTG_GlobalTypeDef *USBx); 516 HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num); 517 HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num); 518 HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx); 519 HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx); 520 HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx); 521 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */ 522 523 /** 524 * @} 525 */ 526 527 /** 528 * @} 529 */ 530 531 /** 532 * @} 533 */ 534 535 /** 536 * @} 537 */ 538 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */ 539 540 #ifdef __cplusplus 541 } 542 #endif /* __cplusplus */ 543 544 545 #endif /* STM32F7xx_LL_USB_H */ 546
