1 /** 2 ****************************************************************************** 3 * @file stm32f7xx_hal_mmc.h 4 * @author MCD Application Team 5 * @brief Header file of MMC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32F7xx_HAL_MMC_H 21 #define STM32F7xx_HAL_MMC_H 22 23 #if defined(SDMMC1) 24 25 #ifdef __cplusplus 26 extern "C" { 27 #endif 28 29 /* Includes ------------------------------------------------------------------*/ 30 #include "stm32f7xx_ll_sdmmc.h" 31 32 /** @addtogroup STM32F7xx_HAL_Driver 33 * @{ 34 */ 35 36 /** @addtogroup MMC 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 /** @defgroup MMC_Exported_Types MMC Exported Types 42 * @{ 43 */ 44 45 /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure 46 * @{ 47 */ 48 typedef enum 49 { 50 HAL_MMC_STATE_RESET = 0x00000000U, /*!< MMC not yet initialized or disabled */ 51 HAL_MMC_STATE_READY = 0x00000001U, /*!< MMC initialized and ready for use */ 52 HAL_MMC_STATE_TIMEOUT = 0x00000002U, /*!< MMC Timeout state */ 53 HAL_MMC_STATE_BUSY = 0x00000003U, /*!< MMC process ongoing */ 54 HAL_MMC_STATE_PROGRAMMING = 0x00000004U, /*!< MMC Programming State */ 55 HAL_MMC_STATE_RECEIVING = 0x00000005U, /*!< MMC Receinving State */ 56 HAL_MMC_STATE_TRANSFER = 0x00000006U, /*!< MMC Transfer State */ 57 HAL_MMC_STATE_ERROR = 0x0000000FU /*!< MMC is in error state */ 58 }HAL_MMC_StateTypeDef; 59 /** 60 * @} 61 */ 62 63 /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure 64 * @{ 65 */ 66 typedef uint32_t HAL_MMC_CardStateTypeDef; 67 68 #define HAL_MMC_CARD_READY 0x00000001U /*!< Card state is ready */ 69 #define HAL_MMC_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state */ 70 #define HAL_MMC_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ 71 #define HAL_MMC_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ 72 #define HAL_MMC_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ 73 #define HAL_MMC_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ 74 #define HAL_MMC_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ 75 #define HAL_MMC_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ 76 #define HAL_MMC_CARD_ERROR 0x000000FFU /*!< Card response Error */ 77 /** 78 * @} 79 */ 80 81 /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition 82 * @{ 83 */ 84 #define MMC_InitTypeDef SDMMC_InitTypeDef 85 #define MMC_TypeDef SDMMC_TypeDef 86 87 /** 88 * @brief MMC Card Information Structure definition 89 */ 90 typedef struct 91 { 92 uint32_t CardType; /*!< Specifies the card Type */ 93 94 uint32_t Class; /*!< Specifies the class of the card class */ 95 96 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ 97 98 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ 99 100 uint32_t BlockSize; /*!< Specifies one block size in bytes */ 101 102 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ 103 104 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ 105 106 }HAL_MMC_CardInfoTypeDef; 107 108 /** 109 * @brief MMC handle Structure definition 110 */ 111 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 112 typedef struct __MMC_HandleTypeDef 113 #else 114 typedef struct 115 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 116 { 117 MMC_TypeDef *Instance; /*!< MMC registers base address */ 118 119 MMC_InitTypeDef Init; /*!< MMC required parameters */ 120 121 HAL_LockTypeDef Lock; /*!< MMC locking object */ 122 123 uint8_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */ 124 125 uint32_t TxXferSize; /*!< MMC Tx Transfer size */ 126 127 uint8_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */ 128 129 uint32_t RxXferSize; /*!< MMC Rx Transfer size */ 130 131 __IO uint32_t Context; /*!< MMC transfer context */ 132 133 __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */ 134 135 __IO uint32_t ErrorCode; /*!< MMC Card Error codes */ 136 137 DMA_HandleTypeDef *hdmarx; /*!< MMC Rx DMA handle parameters */ 138 139 DMA_HandleTypeDef *hdmatx; /*!< MMC Tx DMA handle parameters */ 140 141 HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */ 142 143 uint32_t CSD[4U]; /*!< MMC card specific data table */ 144 145 uint32_t CID[4U]; /*!< MMC card identification number table */ 146 147 uint32_t Ext_CSD[128]; 148 149 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 150 void (* TxCpltCallback) (struct __MMC_HandleTypeDef *hmmc); 151 void (* RxCpltCallback) (struct __MMC_HandleTypeDef *hmmc); 152 void (* ErrorCallback) (struct __MMC_HandleTypeDef *hmmc); 153 void (* AbortCpltCallback) (struct __MMC_HandleTypeDef *hmmc); 154 155 void (* MspInitCallback) (struct __MMC_HandleTypeDef *hmmc); 156 void (* MspDeInitCallback) (struct __MMC_HandleTypeDef *hmmc); 157 #endif 158 }MMC_HandleTypeDef; 159 160 /** 161 * @} 162 */ 163 164 /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register 165 * @{ 166 */ 167 typedef struct 168 { 169 __IO uint8_t CSDStruct; /*!< CSD structure */ 170 __IO uint8_t SysSpecVersion; /*!< System specification version */ 171 __IO uint8_t Reserved1; /*!< Reserved */ 172 __IO uint8_t TAAC; /*!< Data read access time 1 */ 173 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ 174 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ 175 __IO uint16_t CardComdClasses; /*!< Card command classes */ 176 __IO uint8_t RdBlockLen; /*!< Max. read data block length */ 177 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ 178 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ 179 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ 180 __IO uint8_t DSRImpl; /*!< DSR implemented */ 181 __IO uint8_t Reserved2; /*!< Reserved */ 182 __IO uint32_t DeviceSize; /*!< Device Size */ 183 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ 184 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ 185 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ 186 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ 187 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ 188 __IO uint8_t EraseGrSize; /*!< Erase group size */ 189 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ 190 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ 191 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ 192 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ 193 __IO uint8_t WrSpeedFact; /*!< Write speed factor */ 194 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ 195 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ 196 __IO uint8_t Reserved3; /*!< Reserved */ 197 __IO uint8_t ContentProtectAppli; /*!< Content protection application */ 198 __IO uint8_t FileFormatGroup; /*!< File format group */ 199 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ 200 __IO uint8_t PermWrProtect; /*!< Permanent write protection */ 201 __IO uint8_t TempWrProtect; /*!< Temporary write protection */ 202 __IO uint8_t FileFormat; /*!< File format */ 203 __IO uint8_t ECC; /*!< ECC code */ 204 __IO uint8_t CSD_CRC; /*!< CSD CRC */ 205 __IO uint8_t Reserved4; /*!< Always 1 */ 206 207 }HAL_MMC_CardCSDTypeDef; 208 /** 209 * @} 210 */ 211 212 /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register 213 * @{ 214 */ 215 typedef struct 216 { 217 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ 218 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ 219 __IO uint32_t ProdName1; /*!< Product Name part1 */ 220 __IO uint8_t ProdName2; /*!< Product Name part2 */ 221 __IO uint8_t ProdRev; /*!< Product Revision */ 222 __IO uint32_t ProdSN; /*!< Product Serial Number */ 223 __IO uint8_t Reserved1; /*!< Reserved1 */ 224 __IO uint16_t ManufactDate; /*!< Manufacturing Date */ 225 __IO uint8_t CID_CRC; /*!< CID CRC */ 226 __IO uint8_t Reserved2; /*!< Always 1 */ 227 228 }HAL_MMC_CardCIDTypeDef; 229 /** 230 * @} 231 */ 232 233 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 234 /** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition 235 * @{ 236 */ 237 typedef enum 238 { 239 HAL_MMC_TX_CPLT_CB_ID = 0x00U, /*!< MMC Tx Complete Callback ID */ 240 HAL_MMC_RX_CPLT_CB_ID = 0x01U, /*!< MMC Rx Complete Callback ID */ 241 HAL_MMC_ERROR_CB_ID = 0x02U, /*!< MMC Error Callback ID */ 242 HAL_MMC_ABORT_CB_ID = 0x03U, /*!< MMC Abort Callback ID */ 243 244 HAL_MMC_MSP_INIT_CB_ID = 0x10U, /*!< MMC MspInit Callback ID */ 245 HAL_MMC_MSP_DEINIT_CB_ID = 0x11U /*!< MMC MspDeInit Callback ID */ 246 }HAL_MMC_CallbackIDTypeDef; 247 /** 248 * @} 249 */ 250 251 /** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition 252 * @{ 253 */ 254 typedef void (*pMMC_CallbackTypeDef) (MMC_HandleTypeDef *hmmc); 255 /** 256 * @} 257 */ 258 #endif 259 /** 260 * @} 261 */ 262 263 /* Exported constants --------------------------------------------------------*/ 264 /** @defgroup MMC_Exported_Constants Exported Constants 265 * @{ 266 */ 267 268 #define MMC_BLOCKSIZE 512U /*!< Block size is 512 bytes */ 269 270 /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition 271 * @{ 272 */ 273 #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ 274 #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ 275 #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ 276 #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ 277 #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ 278 #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ 279 #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ 280 #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ 281 #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the 282 number of transferred bytes does not match the block length */ 283 #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ 284 #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ 285 #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ 286 #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock 287 command or if there was an attempt to access a locked card */ 288 #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ 289 #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ 290 #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ 291 #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ 292 #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ 293 #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ 294 #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ 295 #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ 296 #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ 297 #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ 298 #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out 299 of erase sequence command was received */ 300 #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ 301 #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ 302 #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ 303 #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ 304 #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ 305 #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ 306 #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ 307 #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ 308 #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ 309 310 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 311 #define HAL_MMC_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ 312 #endif 313 /** 314 * @} 315 */ 316 317 /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration 318 * @{ 319 */ 320 #define MMC_CONTEXT_NONE 0x00000000U /*!< None */ 321 #define MMC_CONTEXT_READ_SINGLE_BLOCK 0x00000001U /*!< Read single block operation */ 322 #define MMC_CONTEXT_READ_MULTIPLE_BLOCK 0x00000002U /*!< Read multiple blocks operation */ 323 #define MMC_CONTEXT_WRITE_SINGLE_BLOCK 0x00000010U /*!< Write single block operation */ 324 #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK 0x00000020U /*!< Write multiple blocks operation */ 325 #define MMC_CONTEXT_IT 0x00000008U /*!< Process in Interrupt mode */ 326 #define MMC_CONTEXT_DMA 0x00000080U /*!< Process in DMA mode */ 327 328 /** 329 * @} 330 */ 331 332 /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode 333 * @{ 334 */ 335 /** 336 * @brief 337 */ 338 #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< High voltage in byte mode */ 339 #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< Dual voltage in byte mode */ 340 #define MMC_LOW_VOLTAGE_RANGE 0x80000080U /*!< Low voltage in byte mode */ 341 #define EMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< High voltage in sector mode */ 342 #define EMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< Dual voltage in sector mode */ 343 #define EMMC_LOW_VOLTAGE_RANGE 0xC0000080U /*!< Low voltage in sector mode */ 344 #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U 345 /** 346 * @} 347 */ 348 349 /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards 350 * @{ 351 */ 352 #define MMC_LOW_CAPACITY_CARD 0x00000000U /*!< MMC Card Capacity <=2Gbytes */ 353 #define MMC_HIGH_CAPACITY_CARD 0x00000001U /*!< MMC Card Capacity >2Gbytes and <2Tbytes */ 354 355 /** 356 * @} 357 */ 358 359 /** 360 * @} 361 */ 362 363 /* Exported macro ------------------------------------------------------------*/ 364 /** @defgroup MMC_Exported_macros MMC Exported Macros 365 * @brief macros to handle interrupts and specific clock configurations 366 * @{ 367 */ 368 /** @brief Reset MMC handle state. 369 * @param __HANDLE__ : MMC handle. 370 * @retval None 371 */ 372 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 373 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) do { \ 374 (__HANDLE__)->State = HAL_MMC_STATE_RESET; \ 375 (__HANDLE__)->MspInitCallback = NULL; \ 376 (__HANDLE__)->MspDeInitCallback = NULL; \ 377 } while(0) 378 #else 379 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MMC_STATE_RESET) 380 #endif 381 382 /** 383 * @brief Enable the MMC device. 384 * @retval None 385 */ 386 #define __HAL_MMC_ENABLE(__HANDLE__) __SDMMC_ENABLE((__HANDLE__)->Instance) 387 388 /** 389 * @brief Disable the MMC device. 390 * @retval None 391 */ 392 #define __HAL_MMC_DISABLE(__HANDLE__) __SDMMC_DISABLE((__HANDLE__)->Instance) 393 394 /** 395 * @brief Enable the SDMMC DMA transfer. 396 * @retval None 397 */ 398 #define __HAL_MMC_DMA_ENABLE(__HANDLE__) __SDMMC_DMA_ENABLE((__HANDLE__)->Instance) 399 400 /** 401 * @brief Disable the SDMMC DMA transfer. 402 * @retval None 403 */ 404 #define __HAL_MMC_DMA_DISABLE(__HANDLE__) __SDMMC_DMA_DISABLE((__HANDLE__)->Instance) 405 406 /** 407 * @brief Enable the MMC device interrupt. 408 * @param __HANDLE__: MMC Handle 409 * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be enabled. 410 * This parameter can be one or a combination of the following values: 411 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 412 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 413 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 414 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 415 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 416 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 417 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 418 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 419 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 420 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 421 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 422 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 423 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 424 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 425 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 426 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 427 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 428 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 429 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 430 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 431 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 432 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 433 * @retval None 434 */ 435 #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 436 437 /** 438 * @brief Disable the MMC device interrupt. 439 * @param __HANDLE__: MMC Handle 440 * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be disabled. 441 * This parameter can be one or a combination of the following values: 442 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 443 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 444 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 445 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 446 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 447 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 448 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 449 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 450 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 451 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 452 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 453 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 454 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 455 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 456 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 457 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 458 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 459 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 460 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 461 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 462 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 463 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 464 * @retval None 465 */ 466 #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 467 468 /** 469 * @brief Check whether the specified MMC flag is set or not. 470 * @param __HANDLE__: MMC Handle 471 * @param __FLAG__: specifies the flag to check. 472 * This parameter can be one of the following values: 473 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 474 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 475 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 476 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 477 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 478 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 479 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 480 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 481 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 482 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 483 * @arg SDMMC_FLAG_CMDACT: Command transfer in progress 484 * @arg SDMMC_FLAG_TXACT: Data transmit in progress 485 * @arg SDMMC_FLAG_RXACT: Data receive in progress 486 * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty 487 * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full 488 * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full 489 * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full 490 * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty 491 * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty 492 * @arg SDMMC_FLAG_TXDAVL: Data available in transmit FIFO 493 * @arg SDMMC_FLAG_RXDAVL: Data available in receive FIFO 494 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 495 * @retval The new state of MMC FLAG (SET or RESET). 496 */ 497 #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) 498 499 /** 500 * @brief Clear the MMC's pending flags. 501 * @param __HANDLE__: MMC Handle 502 * @param __FLAG__: specifies the flag to clear. 503 * This parameter can be one or a combination of the following values: 504 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 505 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 506 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 507 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 508 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 509 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 510 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 511 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 512 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 513 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 514 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 515 * @retval None 516 */ 517 #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) 518 519 /** 520 * @brief Check whether the specified MMC interrupt has occurred or not. 521 * @param __HANDLE__: MMC Handle 522 * @param __INTERRUPT__: specifies the SDMMC interrupt source to check. 523 * This parameter can be one of the following values: 524 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 525 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 526 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 527 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 528 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 529 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 530 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 531 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 532 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 533 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 534 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 535 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 536 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 537 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 538 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 539 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 540 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 541 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 542 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 543 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 544 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 545 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 546 * @retval The new state of MMC IT (SET or RESET). 547 */ 548 #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 549 550 /** 551 * @brief Clear the MMC's interrupt pending bits. 552 * @param __HANDLE__: MMC Handle 553 * @param __INTERRUPT__: specifies the interrupt pending bit to clear. 554 * This parameter can be one or a combination of the following values: 555 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 556 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 557 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 558 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 559 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 560 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 561 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 562 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 563 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 564 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 565 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 566 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 567 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 568 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 569 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 570 * @retval None 571 */ 572 #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 573 574 /** 575 * @} 576 */ 577 578 /* Exported functions --------------------------------------------------------*/ 579 /** @defgroup MMC_Exported_Functions MMC Exported Functions 580 * @{ 581 */ 582 583 /** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions 584 * @{ 585 */ 586 HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc); 587 HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc); 588 HAL_StatusTypeDef HAL_MMC_DeInit (MMC_HandleTypeDef *hmmc); 589 void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc); 590 void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc); 591 592 /** 593 * @} 594 */ 595 596 /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions 597 * @{ 598 */ 599 /* Blocking mode: Polling */ 600 HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); 601 HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); 602 HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd); 603 /* Non-Blocking mode: IT */ 604 HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 605 HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 606 /* Non-Blocking mode: DMA */ 607 HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 608 HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 609 610 void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc); 611 612 /* Callback in non blocking modes (DMA) */ 613 void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc); 614 void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc); 615 void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc); 616 void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc); 617 618 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 619 /* MMC callback registering/unregistering */ 620 HAL_StatusTypeDef HAL_MMC_RegisterCallback (MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, pMMC_CallbackTypeDef pCallback); 621 HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId); 622 #endif 623 /** 624 * @} 625 */ 626 627 /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions 628 * @{ 629 */ 630 HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode); 631 /** 632 * @} 633 */ 634 635 /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions 636 * @{ 637 */ 638 HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc); 639 HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID); 640 HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD); 641 HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo); 642 HAL_StatusTypeDef HAL_MMC_GetCardExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pExtCSD, uint32_t Timeout); 643 /** 644 * @} 645 */ 646 647 /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions 648 * @{ 649 */ 650 HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc); 651 uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc); 652 /** 653 * @} 654 */ 655 656 /** @defgroup MMC_Exported_Functions_Group6 Peripheral Abort management 657 * @{ 658 */ 659 HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc); 660 HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc); 661 /** 662 * @} 663 */ 664 665 /* Private types -------------------------------------------------------------*/ 666 /** @defgroup MMC_Private_Types MMC Private Types 667 * @{ 668 */ 669 670 /** 671 * @} 672 */ 673 674 /* Private defines -----------------------------------------------------------*/ 675 /** @defgroup MMC_Private_Defines MMC Private Defines 676 * @{ 677 */ 678 679 /** 680 * @} 681 */ 682 683 /* Private variables ---------------------------------------------------------*/ 684 /** @defgroup MMC_Private_Variables MMC Private Variables 685 * @{ 686 */ 687 688 /** 689 * @} 690 */ 691 692 /* Private constants ---------------------------------------------------------*/ 693 /** @defgroup MMC_Private_Constants MMC Private Constants 694 * @{ 695 */ 696 697 /** 698 * @} 699 */ 700 701 /* Private macros ------------------------------------------------------------*/ 702 /** @defgroup MMC_Private_Macros MMC Private Macros 703 * @{ 704 */ 705 706 /** 707 * @} 708 */ 709 710 /* Private functions prototypes ----------------------------------------------*/ 711 /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes 712 * @{ 713 */ 714 715 /** 716 * @} 717 */ 718 719 /* Private functions ---------------------------------------------------------*/ 720 /** @defgroup MMC_Private_Functions MMC Private Functions 721 * @{ 722 */ 723 724 /** 725 * @} 726 */ 727 728 729 /** 730 * @} 731 */ 732 733 /** 734 * @} 735 */ 736 737 /** 738 * @} 739 */ 740 741 #ifdef __cplusplus 742 } 743 #endif 744 745 #endif /* SDMMC1 */ 746 747 #endif /* STM32F7xx_HAL_MMC_H */ 748
