1 /** 2 ****************************************************************************** 3 * @file stm32f3xx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32F3xx_HAL_UART_H 21 #define STM32F3xx_HAL_UART_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32f3xx_hal_def.h" 29 30 /** @addtogroup STM32F3xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UART 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UART_Exported_Types UART Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART Init Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 49 The baud rate register is computed using the following formula: 50 - If oversampling is 16 or in LIN mode, 51 Baud Rate Register = ((uart_ker_ck) / ((huart->Init.BaudRate))) 52 - If oversampling is 8, 53 Baud Rate Register[15:4] = ((2 * uart_ker_ck) / 54 ((huart->Init.BaudRate)))[15:4] 55 Baud Rate Register[3] = 0 56 Baud Rate Register[2:0] = (((2 * uart_ker_ck) / 57 ((huart->Init.BaudRate)))[3:0]) >> 1 58 where uart_ker_ck is the UART input clock */ 59 60 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 61 This parameter can be a value of @ref UARTEx_Word_Length. */ 62 63 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 64 This parameter can be a value of @ref UART_Stop_Bits. */ 65 66 uint32_t Parity; /*!< Specifies the parity mode. 67 This parameter can be a value of @ref UART_Parity 68 @note When parity is enabled, the computed parity is inserted 69 at the MSB position of the transmitted data (9th bit when 70 the word length is set to 9 data bits; 8th bit when the 71 word length is set to 8 data bits). */ 72 73 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 74 This parameter can be a value of @ref UART_Mode. */ 75 76 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 77 or disabled. 78 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 79 80 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, 81 to achieve higher speed (up to f_PCLK/8). 82 This parameter can be a value of @ref UART_Over_Sampling. */ 83 84 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 85 Selecting the single sample method increases the receiver tolerance to clock 86 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 87 88 89 } UART_InitTypeDef; 90 91 /** 92 * @brief UART Advanced Features initialization structure definition 93 */ 94 typedef struct 95 { 96 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 97 Advanced Features may be initialized at the same time . 98 This parameter can be a value of 99 @ref UART_Advanced_Features_Initialization_Type. */ 100 101 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 102 This parameter can be a value of @ref UART_Tx_Inv. */ 103 104 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 105 This parameter can be a value of @ref UART_Rx_Inv. */ 106 107 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 108 vs negative/inverted logic). 109 This parameter can be a value of @ref UART_Data_Inv. */ 110 111 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 112 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 113 114 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 115 This parameter can be a value of @ref UART_Overrun_Disable. */ 116 117 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 118 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 119 120 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 121 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 122 123 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 124 detection is carried out. 125 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 126 127 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 128 This parameter can be a value of @ref UART_MSB_First. */ 129 } UART_AdvFeatureInitTypeDef; 130 131 /** 132 * @brief HAL UART State definition 133 * @note HAL UART State value is a combination of 2 different substates: 134 * gState and RxState (see @ref UART_State_Definition). 135 * - gState contains UART state information related to global Handle management 136 * and also information related to Tx operations. 137 * gState value coding follow below described bitmap : 138 * b7-b6 Error information 139 * 00 : No Error 140 * 01 : (Not Used) 141 * 10 : Timeout 142 * 11 : Error 143 * b5 Peripheral initialization status 144 * 0 : Reset (Peripheral not initialized) 145 * 1 : Init done (Peripheral initialized. HAL UART Init function already called) 146 * b4-b3 (not used) 147 * xx : Should be set to 00 148 * b2 Intrinsic process state 149 * 0 : Ready 150 * 1 : Busy (Peripheral busy with some configuration or internal operations) 151 * b1 (not used) 152 * x : Should be set to 0 153 * b0 Tx state 154 * 0 : Ready (no Tx operation ongoing) 155 * 1 : Busy (Tx operation ongoing) 156 * - RxState contains information related to Rx operations. 157 * RxState value coding follow below described bitmap : 158 * b7-b6 (not used) 159 * xx : Should be set to 00 160 * b5 Peripheral initialization status 161 * 0 : Reset (Peripheral not initialized) 162 * 1 : Init done (Peripheral initialized) 163 * b4-b2 (not used) 164 * xxx : Should be set to 000 165 * b1 Rx state 166 * 0 : Ready (no Rx operation ongoing) 167 * 1 : Busy (Rx operation ongoing) 168 * b0 (not used) 169 * x : Should be set to 0. 170 */ 171 typedef uint32_t HAL_UART_StateTypeDef; 172 173 /** 174 * @brief UART clock sources definition 175 */ 176 typedef enum 177 { 178 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 179 UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ 180 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ 181 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ 182 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ 183 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ 184 } UART_ClockSourceTypeDef; 185 186 /** 187 * @brief HAL UART Reception type definition 188 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. 189 * This parameter can be a value of @ref UART_Reception_Type_Values : 190 * HAL_UART_RECEPTION_STANDARD = 0x00U, 191 * HAL_UART_RECEPTION_TOIDLE = 0x01U, 192 * HAL_UART_RECEPTION_TORTO = 0x02U, 193 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U, 194 */ 195 typedef uint32_t HAL_UART_RxTypeTypeDef; 196 197 /** 198 * @brief HAL UART Rx Event type definition 199 * @note HAL UART Rx Event type value aims to identify which type of Event has occurred 200 * leading to call of the RxEvent callback. 201 * This parameter can be a value of @ref UART_RxEvent_Type_Values : 202 * HAL_UART_RXEVENT_TC = 0x00U, 203 * HAL_UART_RXEVENT_HT = 0x01U, 204 * HAL_UART_RXEVENT_IDLE = 0x02U, 205 */ 206 typedef uint32_t HAL_UART_RxEventTypeTypeDef; 207 208 /** 209 * @brief UART handle Structure definition 210 */ 211 typedef struct __UART_HandleTypeDef 212 { 213 USART_TypeDef *Instance; /*!< UART registers base address */ 214 215 UART_InitTypeDef Init; /*!< UART communication parameters */ 216 217 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 218 219 const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 220 221 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 222 223 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 224 225 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 226 227 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 228 229 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 230 231 uint16_t Mask; /*!< UART Rx RDR register mask */ 232 233 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ 234 235 __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */ 236 237 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 238 239 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 240 241 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 242 243 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 244 245 HAL_LockTypeDef Lock; /*!< Locking object */ 246 247 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 248 and also related to Tx operations. This parameter 249 can be a value of @ref HAL_UART_StateTypeDef */ 250 251 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This 252 parameter can be a value of @ref HAL_UART_StateTypeDef */ 253 254 __IO uint32_t ErrorCode; /*!< UART Error code */ 255 256 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 257 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 258 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 259 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 260 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 261 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 262 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 263 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 264 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 265 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 266 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ 267 268 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 269 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 270 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 271 272 } UART_HandleTypeDef; 273 274 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 275 /** 276 * @brief HAL UART Callback ID enumeration definition 277 */ 278 typedef enum 279 { 280 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 281 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 282 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 283 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 284 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 285 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 286 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 287 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 288 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 289 290 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 291 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 292 293 } HAL_UART_CallbackIDTypeDef; 294 295 /** 296 * @brief HAL UART Callback pointer definition 297 */ 298 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 299 typedef void (*pUART_RxEventCallbackTypeDef) 300 (struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ 301 302 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 303 304 /** 305 * @} 306 */ 307 308 /* Exported constants --------------------------------------------------------*/ 309 /** @defgroup UART_Exported_Constants UART Exported Constants 310 * @{ 311 */ 312 313 /** @defgroup UART_State_Definition UART State Code Definition 314 * @{ 315 */ 316 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 317 Value is allowed for gState and RxState */ 318 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 319 Value is allowed for gState and RxState */ 320 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 321 Value is allowed for gState only */ 322 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 323 Value is allowed for gState only */ 324 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 325 Value is allowed for RxState only */ 326 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 327 Not to be used for neither gState nor RxState.Value is result 328 of combination (Or) between gState and RxState values */ 329 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 330 Value is allowed for gState only */ 331 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 332 Value is allowed for gState only */ 333 /** 334 * @} 335 */ 336 337 /** @defgroup UART_Error_Definition UART Error Definition 338 * @{ 339 */ 340 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */ 341 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */ 342 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */ 343 #define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */ 344 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */ 345 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 346 #define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */ 347 348 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 349 #define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ 350 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 351 /** 352 * @} 353 */ 354 355 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 356 * @{ 357 */ 358 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 359 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 360 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 361 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 362 /** 363 * @} 364 */ 365 366 /** @defgroup UART_Parity UART Parity 367 * @{ 368 */ 369 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 370 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 371 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 372 /** 373 * @} 374 */ 375 376 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 377 * @{ 378 */ 379 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 380 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 381 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 382 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 383 /** 384 * @} 385 */ 386 387 /** @defgroup UART_Mode UART Transfer Mode 388 * @{ 389 */ 390 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 391 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 392 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 393 /** 394 * @} 395 */ 396 397 /** @defgroup UART_State UART State 398 * @{ 399 */ 400 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 401 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 402 /** 403 * @} 404 */ 405 406 /** @defgroup UART_Over_Sampling UART Over Sampling 407 * @{ 408 */ 409 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 410 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 411 /** 412 * @} 413 */ 414 415 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 416 * @{ 417 */ 418 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 419 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 420 /** 421 * @} 422 */ 423 424 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 425 * @{ 426 */ 427 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection 428 on start bit */ 429 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection 430 on falling edge */ 431 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection 432 on 0x7F frame detection */ 433 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection 434 on 0x55 frame detection */ 435 /** 436 * @} 437 */ 438 439 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 440 * @{ 441 */ 442 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 443 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 444 /** 445 * @} 446 */ 447 448 /** @defgroup UART_LIN UART Local Interconnection Network mode 449 * @{ 450 */ 451 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 452 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 453 /** 454 * @} 455 */ 456 457 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 458 * @{ 459 */ 460 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 461 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 462 /** 463 * @} 464 */ 465 466 /** @defgroup UART_DMA_Tx UART DMA Tx 467 * @{ 468 */ 469 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 470 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 471 /** 472 * @} 473 */ 474 475 /** @defgroup UART_DMA_Rx UART DMA Rx 476 * @{ 477 */ 478 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 479 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 480 /** 481 * @} 482 */ 483 484 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 485 * @{ 486 */ 487 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 488 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 489 /** 490 * @} 491 */ 492 493 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 494 * @{ 495 */ 496 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 497 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 498 /** 499 * @} 500 */ 501 502 /** @defgroup UART_Request_Parameters UART Request Parameters 503 * @{ 504 */ 505 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 506 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 507 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 508 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 509 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 510 /** 511 * @} 512 */ 513 514 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 515 * @{ 516 */ 517 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 518 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 519 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 520 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 521 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 522 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 523 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 524 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 525 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 526 /** 527 * @} 528 */ 529 530 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 531 * @{ 532 */ 533 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 534 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 535 /** 536 * @} 537 */ 538 539 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 540 * @{ 541 */ 542 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 543 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 544 /** 545 * @} 546 */ 547 548 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 549 * @{ 550 */ 551 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 552 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 553 /** 554 * @} 555 */ 556 557 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 558 * @{ 559 */ 560 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 561 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 562 /** 563 * @} 564 */ 565 566 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 567 * @{ 568 */ 569 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 570 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 571 /** 572 * @} 573 */ 574 575 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 576 * @{ 577 */ 578 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 579 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 580 /** 581 * @} 582 */ 583 584 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 585 * @{ 586 */ 587 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 588 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 589 /** 590 * @} 591 */ 592 593 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 594 * @{ 595 */ 596 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received 597 first disable */ 598 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received 599 first enable */ 600 /** 601 * @} 602 */ 603 604 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 605 * @{ 606 */ 607 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 608 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 609 /** 610 * @} 611 */ 612 613 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 614 * @{ 615 */ 616 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 617 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 618 /** 619 * @} 620 */ 621 622 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 623 * @{ 624 */ 625 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 626 /** 627 * @} 628 */ 629 630 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 631 * @{ 632 */ 633 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 634 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 635 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register 636 not empty or RXFIFO is not empty */ 637 /** 638 * @} 639 */ 640 641 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 642 * @{ 643 */ 644 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 645 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 646 /** 647 * @} 648 */ 649 650 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 651 * @{ 652 */ 653 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB 654 position in CR1 register */ 655 /** 656 * @} 657 */ 658 659 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 660 * @{ 661 */ 662 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB 663 position in CR1 register */ 664 /** 665 * @} 666 */ 667 668 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 669 * @{ 670 */ 671 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 672 /** 673 * @} 674 */ 675 676 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 677 * @{ 678 */ 679 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 680 /** 681 * @} 682 */ 683 684 /** @defgroup UART_Flags UART Status Flags 685 * Elements values convention: 0xXXXX 686 * - 0xXXXX : Flag mask in the ISR register 687 * @{ 688 */ 689 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 690 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 691 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 692 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 693 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 694 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 695 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 696 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 697 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 698 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 699 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 700 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 701 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 702 #define UART_FLAG_TXE USART_ISR_TXE /*!< UART transmit data register empty */ 703 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 704 #define UART_FLAG_RXNE USART_ISR_RXNE /*!< UART read data register not empty */ 705 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 706 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 707 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 708 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 709 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 710 /** 711 * @} 712 */ 713 714 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 715 * Elements values convention: 000ZZZZZ0XXYYYYYb 716 * - YYYYY : Interrupt source position in the XX register (5bits) 717 * - XX : Interrupt source register (2bits) 718 * - 01: CR1 register 719 * - 10: CR2 register 720 * - 11: CR3 register 721 * - ZZZZZ : Flag position in the ISR register(5bits) 722 * Elements values convention: 000000000XXYYYYYb 723 * - YYYYY : Interrupt source position in the XX register (5bits) 724 * - XX : Interrupt source register (2bits) 725 * - 01: CR1 register 726 * - 10: CR2 register 727 * - 11: CR3 register 728 * Elements values convention: 0000ZZZZ00000000b 729 * - ZZZZ : Flag position in the ISR register(4bits) 730 * @{ 731 */ 732 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 733 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 734 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 735 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 736 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 737 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 738 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 739 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 740 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 741 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 742 743 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 744 745 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 746 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 747 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 748 /** 749 * @} 750 */ 751 752 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 753 * @{ 754 */ 755 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 756 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 757 #define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise Error detected Clear Flag */ 758 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 759 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 760 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 761 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 762 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 763 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 764 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 765 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 766 /** 767 * @} 768 */ 769 770 /** @defgroup UART_Reception_Type_Values UART Reception type values 771 * @{ 772 */ 773 #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ 774 #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ 775 #define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */ 776 #define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */ 777 /** 778 * @} 779 */ 780 781 /** @defgroup UART_RxEvent_Type_Values UART RxEvent type values 782 * @{ 783 */ 784 #define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */ 785 #define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */ 786 #define HAL_UART_RXEVENT_IDLE (0x00000002U) /*!< RxEvent linked to IDLE event */ 787 /** 788 * @} 789 */ 790 791 /** 792 * @} 793 */ 794 795 /* Exported macros -----------------------------------------------------------*/ 796 /** @defgroup UART_Exported_Macros UART Exported Macros 797 * @{ 798 */ 799 800 /** @brief Reset UART handle states. 801 * @param __HANDLE__ UART handle. 802 * @retval None 803 */ 804 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 805 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 806 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 807 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 808 (__HANDLE__)->MspInitCallback = NULL; \ 809 (__HANDLE__)->MspDeInitCallback = NULL; \ 810 } while(0U) 811 #else 812 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 813 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 814 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 815 } while(0U) 816 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 817 818 /** @brief Flush the UART Data registers. 819 * @param __HANDLE__ specifies the UART Handle. 820 * @retval None 821 */ 822 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 823 do{ \ 824 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 825 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 826 } while(0U) 827 828 /** @brief Clear the specified UART pending flag. 829 * @param __HANDLE__ specifies the UART Handle. 830 * @param __FLAG__ specifies the flag to check. 831 * This parameter can be any combination of the following values: 832 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 833 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 834 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 835 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 836 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 837 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 838 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 839 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 840 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 841 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 842 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 843 * @retval None 844 */ 845 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 846 847 /** @brief Clear the UART PE pending flag. 848 * @param __HANDLE__ specifies the UART Handle. 849 * @retval None 850 */ 851 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 852 853 /** @brief Clear the UART FE pending flag. 854 * @param __HANDLE__ specifies the UART Handle. 855 * @retval None 856 */ 857 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 858 859 /** @brief Clear the UART NE pending flag. 860 * @param __HANDLE__ specifies the UART Handle. 861 * @retval None 862 */ 863 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 864 865 /** @brief Clear the UART ORE pending flag. 866 * @param __HANDLE__ specifies the UART Handle. 867 * @retval None 868 */ 869 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 870 871 /** @brief Clear the UART IDLE pending flag. 872 * @param __HANDLE__ specifies the UART Handle. 873 * @retval None 874 */ 875 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 876 877 878 /** @brief Check whether the specified UART flag is set or not. 879 * @param __HANDLE__ specifies the UART Handle. 880 * @param __FLAG__ specifies the flag to check. 881 * This parameter can be one of the following values: 882 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 883 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 884 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 885 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 886 * @arg @ref UART_FLAG_SBKF Send Break flag 887 * @arg @ref UART_FLAG_CMF Character match flag 888 * @arg @ref UART_FLAG_BUSY Busy flag 889 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 890 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 891 * @arg @ref UART_FLAG_CTS CTS Change flag 892 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 893 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 894 * @arg @ref UART_FLAG_TC Transmission Complete flag 895 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 896 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 897 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 898 * @arg @ref UART_FLAG_ORE Overrun Error flag 899 * @arg @ref UART_FLAG_NE Noise Error flag 900 * @arg @ref UART_FLAG_FE Framing Error flag 901 * @arg @ref UART_FLAG_PE Parity Error flag 902 * @retval The new state of __FLAG__ (TRUE or FALSE). 903 */ 904 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 905 906 /** @brief Enable the specified UART interrupt. 907 * @param __HANDLE__ specifies the UART Handle. 908 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 909 * This parameter can be one of the following values: 910 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 911 * @arg @ref UART_IT_CM Character match interrupt 912 * @arg @ref UART_IT_CTS CTS change interrupt 913 * @arg @ref UART_IT_LBD LIN Break detection interrupt 914 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 915 * @arg @ref UART_IT_TC Transmission complete interrupt 916 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 917 * @arg @ref UART_IT_RTO Receive Timeout interrupt 918 * @arg @ref UART_IT_IDLE Idle line detection interrupt 919 * @arg @ref UART_IT_PE Parity Error interrupt 920 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 921 * @retval None 922 */ 923 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\ 924 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 925 ((__HANDLE__)->Instance->CR1 |= (1U <<\ 926 ((__INTERRUPT__) & UART_IT_MASK))): \ 927 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 928 ((__HANDLE__)->Instance->CR2 |= (1U <<\ 929 ((__INTERRUPT__) & UART_IT_MASK))): \ 930 ((__HANDLE__)->Instance->CR3 |= (1U <<\ 931 ((__INTERRUPT__) & UART_IT_MASK)))) 932 933 /** @brief Disable the specified UART interrupt. 934 * @param __HANDLE__ specifies the UART Handle. 935 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 936 * This parameter can be one of the following values: 937 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 938 * @arg @ref UART_IT_CM Character match interrupt 939 * @arg @ref UART_IT_CTS CTS change interrupt 940 * @arg @ref UART_IT_LBD LIN Break detection interrupt 941 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 942 * @arg @ref UART_IT_TC Transmission complete interrupt 943 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 944 * @arg @ref UART_IT_RTO Receive Timeout interrupt 945 * @arg @ref UART_IT_IDLE Idle line detection interrupt 946 * @arg @ref UART_IT_PE Parity Error interrupt 947 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 948 * @retval None 949 */ 950 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\ 951 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 952 ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\ 953 ((__INTERRUPT__) & UART_IT_MASK))): \ 954 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 955 ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\ 956 ((__INTERRUPT__) & UART_IT_MASK))): \ 957 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\ 958 ((__INTERRUPT__) & UART_IT_MASK)))) 959 960 /** @brief Check whether the specified UART interrupt has occurred or not. 961 * @param __HANDLE__ specifies the UART Handle. 962 * @param __INTERRUPT__ specifies the UART interrupt to check. 963 * This parameter can be one of the following values: 964 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 965 * @arg @ref UART_IT_CM Character match interrupt 966 * @arg @ref UART_IT_CTS CTS change interrupt 967 * @arg @ref UART_IT_LBD LIN Break detection interrupt 968 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 969 * @arg @ref UART_IT_TC Transmission complete interrupt 970 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 971 * @arg @ref UART_IT_RTO Receive Timeout interrupt 972 * @arg @ref UART_IT_IDLE Idle line detection interrupt 973 * @arg @ref UART_IT_PE Parity Error interrupt 974 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 975 * @retval The new state of __INTERRUPT__ (SET or RESET). 976 */ 977 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 978 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 979 980 /** @brief Check whether the specified UART interrupt source is enabled or not. 981 * @param __HANDLE__ specifies the UART Handle. 982 * @param __INTERRUPT__ specifies the UART interrupt source to check. 983 * This parameter can be one of the following values: 984 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 985 * @arg @ref UART_IT_CM Character match interrupt 986 * @arg @ref UART_IT_CTS CTS change interrupt 987 * @arg @ref UART_IT_LBD LIN Break detection interrupt 988 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 989 * @arg @ref UART_IT_TC Transmission complete interrupt 990 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 991 * @arg @ref UART_IT_RTO Receive Timeout interrupt 992 * @arg @ref UART_IT_IDLE Idle line detection interrupt 993 * @arg @ref UART_IT_PE Parity Error interrupt 994 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 995 * @retval The new state of __INTERRUPT__ (SET or RESET). 996 */ 997 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\ 998 (__HANDLE__)->Instance->CR1 : \ 999 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\ 1000 (__HANDLE__)->Instance->CR2 : \ 1001 (__HANDLE__)->Instance->CR3)) & (1U <<\ 1002 (((uint16_t)(__INTERRUPT__)) &\ 1003 UART_IT_MASK))) != RESET) ? SET : RESET) 1004 1005 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1006 * @param __HANDLE__ specifies the UART Handle. 1007 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1008 * to clear the corresponding interrupt 1009 * This parameter can be one of the following values: 1010 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1011 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1012 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1013 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1014 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1015 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 1016 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1017 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1018 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1019 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1020 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1021 * @retval None 1022 */ 1023 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1024 1025 /** @brief Set a specific UART request flag. 1026 * @param __HANDLE__ specifies the UART Handle. 1027 * @param __REQ__ specifies the request flag to set 1028 * This parameter can be one of the following values: 1029 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1030 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1031 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1032 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1033 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1034 * @retval None 1035 */ 1036 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 1037 1038 /** @brief Enable the UART one bit sample method. 1039 * @param __HANDLE__ specifies the UART Handle. 1040 * @retval None 1041 */ 1042 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1043 1044 /** @brief Disable the UART one bit sample method. 1045 * @param __HANDLE__ specifies the UART Handle. 1046 * @retval None 1047 */ 1048 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1049 1050 /** @brief Enable UART. 1051 * @param __HANDLE__ specifies the UART Handle. 1052 * @retval None 1053 */ 1054 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1055 1056 /** @brief Disable UART. 1057 * @param __HANDLE__ specifies the UART Handle. 1058 * @retval None 1059 */ 1060 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1061 1062 /** @brief Enable CTS flow control. 1063 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1064 * without need to call HAL_UART_Init() function. 1065 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1066 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1067 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1068 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1069 * - macro could only be called when corresponding UART instance is disabled 1070 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1071 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1072 * @param __HANDLE__ specifies the UART Handle. 1073 * @retval None 1074 */ 1075 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1076 do{ \ 1077 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1078 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1079 } while(0U) 1080 1081 /** @brief Disable CTS flow control. 1082 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1083 * without need to call HAL_UART_Init() function. 1084 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1085 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1086 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1087 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1088 * - macro could only be called when corresponding UART instance is disabled 1089 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1090 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1091 * @param __HANDLE__ specifies the UART Handle. 1092 * @retval None 1093 */ 1094 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1095 do{ \ 1096 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1097 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1098 } while(0U) 1099 1100 /** @brief Enable RTS flow control. 1101 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1102 * without need to call HAL_UART_Init() function. 1103 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1104 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1105 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1106 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1107 * - macro could only be called when corresponding UART instance is disabled 1108 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1109 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1110 * @param __HANDLE__ specifies the UART Handle. 1111 * @retval None 1112 */ 1113 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1114 do{ \ 1115 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1116 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1117 } while(0U) 1118 1119 /** @brief Disable RTS flow control. 1120 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1121 * without need to call HAL_UART_Init() function. 1122 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1123 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1124 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1125 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1126 * - macro could only be called when corresponding UART instance is disabled 1127 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1128 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1129 * @param __HANDLE__ specifies the UART Handle. 1130 * @retval None 1131 */ 1132 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1133 do{ \ 1134 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1135 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1136 } while(0U) 1137 /** 1138 * @} 1139 */ 1140 1141 /* Private macros --------------------------------------------------------*/ 1142 /** @defgroup UART_Private_Macros UART Private Macros 1143 * @{ 1144 */ 1145 1146 1147 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1148 * @param __PCLK__ UART clock. 1149 * @param __BAUD__ Baud rate set by the user. 1150 * @retval Division result 1151 */ 1152 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1153 1154 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1155 * @param __PCLK__ UART clock. 1156 * @param __BAUD__ Baud rate set by the user. 1157 * @retval Division result 1158 */ 1159 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__)) 1160 1161 1162 /** @brief Check UART Baud rate. 1163 * @param __BAUDRATE__ Baudrate specified by the user. 1164 * The maximum Baud Rate is derived from the maximum clock on F3 (i.e. 72 MHz) 1165 * divided by the smallest oversampling used on the USART (i.e. 8) 1166 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1167 */ 1168 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 9000001U) 1169 1170 /** @brief Check UART assertion time. 1171 * @param __TIME__ 5-bit value assertion time. 1172 * @retval Test result (TRUE or FALSE). 1173 */ 1174 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1175 1176 /** @brief Check UART deassertion time. 1177 * @param __TIME__ 5-bit value deassertion time. 1178 * @retval Test result (TRUE or FALSE). 1179 */ 1180 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1181 1182 /** 1183 * @brief Ensure that UART frame number of stop bits is valid. 1184 * @param __STOPBITS__ UART frame number of stop bits. 1185 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1186 */ 1187 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1188 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1189 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1190 ((__STOPBITS__) == UART_STOPBITS_2)) 1191 1192 1193 /** 1194 * @brief Ensure that UART frame parity is valid. 1195 * @param __PARITY__ UART frame parity. 1196 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1197 */ 1198 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1199 ((__PARITY__) == UART_PARITY_EVEN) || \ 1200 ((__PARITY__) == UART_PARITY_ODD)) 1201 1202 /** 1203 * @brief Ensure that UART hardware flow control is valid. 1204 * @param __CONTROL__ UART hardware flow control. 1205 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1206 */ 1207 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1208 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1209 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1210 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1211 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1212 1213 /** 1214 * @brief Ensure that UART communication mode is valid. 1215 * @param __MODE__ UART communication mode. 1216 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1217 */ 1218 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1219 1220 /** 1221 * @brief Ensure that UART state is valid. 1222 * @param __STATE__ UART state. 1223 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1224 */ 1225 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1226 ((__STATE__) == UART_STATE_ENABLE)) 1227 1228 /** 1229 * @brief Ensure that UART oversampling is valid. 1230 * @param __SAMPLING__ UART oversampling. 1231 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1232 */ 1233 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1234 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1235 1236 /** 1237 * @brief Ensure that UART frame sampling is valid. 1238 * @param __ONEBIT__ UART frame sampling. 1239 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1240 */ 1241 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1242 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1243 1244 /** 1245 * @brief Ensure that UART auto Baud rate detection mode is valid. 1246 * @param __MODE__ UART auto Baud rate detection mode. 1247 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1248 */ 1249 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1250 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1251 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1252 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1253 1254 /** 1255 * @brief Ensure that UART receiver timeout setting is valid. 1256 * @param __TIMEOUT__ UART receiver timeout setting. 1257 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1258 */ 1259 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1260 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1261 1262 /** @brief Check the receiver timeout value. 1263 * @note The maximum UART receiver timeout value is 0xFFFFFF. 1264 * @param __TIMEOUTVALUE__ receiver timeout value. 1265 * @retval Test result (TRUE or FALSE) 1266 */ 1267 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 1268 1269 /** 1270 * @brief Ensure that UART LIN state is valid. 1271 * @param __LIN__ UART LIN state. 1272 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1273 */ 1274 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1275 ((__LIN__) == UART_LIN_ENABLE)) 1276 1277 /** 1278 * @brief Ensure that UART LIN break detection length is valid. 1279 * @param __LENGTH__ UART LIN break detection length. 1280 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1281 */ 1282 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1283 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1284 1285 /** 1286 * @brief Ensure that UART DMA TX state is valid. 1287 * @param __DMATX__ UART DMA TX state. 1288 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1289 */ 1290 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1291 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1292 1293 /** 1294 * @brief Ensure that UART DMA RX state is valid. 1295 * @param __DMARX__ UART DMA RX state. 1296 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1297 */ 1298 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1299 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1300 1301 /** 1302 * @brief Ensure that UART half-duplex state is valid. 1303 * @param __HDSEL__ UART half-duplex state. 1304 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1305 */ 1306 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1307 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1308 1309 /** 1310 * @brief Ensure that UART wake-up method is valid. 1311 * @param __WAKEUP__ UART wake-up method . 1312 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1313 */ 1314 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1315 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1316 1317 /** 1318 * @brief Ensure that UART request parameter is valid. 1319 * @param __PARAM__ UART request parameter. 1320 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1321 */ 1322 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1323 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1324 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1325 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1326 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1327 1328 /** 1329 * @brief Ensure that UART advanced features initialization is valid. 1330 * @param __INIT__ UART advanced features initialization. 1331 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1332 */ 1333 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1334 UART_ADVFEATURE_TXINVERT_INIT | \ 1335 UART_ADVFEATURE_RXINVERT_INIT | \ 1336 UART_ADVFEATURE_DATAINVERT_INIT | \ 1337 UART_ADVFEATURE_SWAP_INIT | \ 1338 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1339 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1340 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1341 UART_ADVFEATURE_MSBFIRST_INIT)) 1342 1343 /** 1344 * @brief Ensure that UART frame TX inversion setting is valid. 1345 * @param __TXINV__ UART frame TX inversion setting. 1346 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1347 */ 1348 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1349 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1350 1351 /** 1352 * @brief Ensure that UART frame RX inversion setting is valid. 1353 * @param __RXINV__ UART frame RX inversion setting. 1354 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1355 */ 1356 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1357 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1358 1359 /** 1360 * @brief Ensure that UART frame data inversion setting is valid. 1361 * @param __DATAINV__ UART frame data inversion setting. 1362 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1363 */ 1364 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1365 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1366 1367 /** 1368 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1369 * @param __SWAP__ UART frame RX/TX pins swap setting. 1370 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1371 */ 1372 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1373 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1374 1375 /** 1376 * @brief Ensure that UART frame overrun setting is valid. 1377 * @param __OVERRUN__ UART frame overrun setting. 1378 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1379 */ 1380 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1381 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1382 1383 /** 1384 * @brief Ensure that UART auto Baud rate state is valid. 1385 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1386 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1387 */ 1388 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \ 1389 UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1390 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1391 1392 /** 1393 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1394 * @param __DMA__ UART DMA enabling or disabling on error setting. 1395 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1396 */ 1397 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1398 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1399 1400 /** 1401 * @brief Ensure that UART frame MSB first setting is valid. 1402 * @param __MSBFIRST__ UART frame MSB first setting. 1403 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1404 */ 1405 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1406 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1407 1408 /** 1409 * @brief Ensure that UART stop mode state is valid. 1410 * @param __STOPMODE__ UART stop mode state. 1411 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1412 */ 1413 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1414 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1415 1416 /** 1417 * @brief Ensure that UART mute mode state is valid. 1418 * @param __MUTE__ UART mute mode state. 1419 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1420 */ 1421 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1422 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1423 1424 /** 1425 * @brief Ensure that UART wake-up selection is valid. 1426 * @param __WAKE__ UART wake-up selection. 1427 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1428 */ 1429 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1430 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1431 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1432 1433 /** 1434 * @brief Ensure that UART driver enable polarity is valid. 1435 * @param __POLARITY__ UART driver enable polarity. 1436 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1437 */ 1438 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1439 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1440 1441 1442 /** 1443 * @} 1444 */ 1445 1446 /* Include UART HAL Extended module */ 1447 #include "stm32f3xx_hal_uart_ex.h" 1448 1449 /* Exported functions --------------------------------------------------------*/ 1450 /** @addtogroup UART_Exported_Functions UART Exported Functions 1451 * @{ 1452 */ 1453 1454 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1455 * @{ 1456 */ 1457 1458 /* Initialization and de-initialization functions ****************************/ 1459 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1460 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1461 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1462 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1463 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1464 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1465 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1466 1467 /* Callbacks Register/UnRegister functions ***********************************/ 1468 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1469 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 1470 pUART_CallbackTypeDef pCallback); 1471 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1472 1473 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); 1474 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); 1475 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1476 1477 /** 1478 * @} 1479 */ 1480 1481 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1482 * @{ 1483 */ 1484 1485 /* IO operation functions *****************************************************/ 1486 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); 1487 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1488 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1489 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1490 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1491 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1492 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1493 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1494 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1495 /* Transfer Abort functions */ 1496 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1497 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1498 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1499 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1500 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1501 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1502 1503 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1504 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1505 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1506 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1507 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1508 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1509 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1510 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1511 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1512 1513 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); 1514 1515 /** 1516 * @} 1517 */ 1518 1519 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1520 * @{ 1521 */ 1522 1523 /* Peripheral Control functions ************************************************/ 1524 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 1525 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 1526 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 1527 1528 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1529 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1530 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1531 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1532 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1533 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1534 1535 /** 1536 * @} 1537 */ 1538 1539 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1540 * @{ 1541 */ 1542 1543 /* Peripheral State and Errors functions **************************************************/ 1544 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart); 1545 uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart); 1546 1547 /** 1548 * @} 1549 */ 1550 1551 /** 1552 * @} 1553 */ 1554 1555 /* Private functions -----------------------------------------------------------*/ 1556 /** @addtogroup UART_Private_Functions UART Private Functions 1557 * @{ 1558 */ 1559 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1560 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 1561 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1562 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1563 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1564 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 1565 uint32_t Tickstart, uint32_t Timeout); 1566 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1567 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1568 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1569 1570 /** 1571 * @} 1572 */ 1573 1574 /* Private variables -----------------------------------------------------------*/ 1575 /** 1576 * @} 1577 */ 1578 1579 /** 1580 * @} 1581 */ 1582 1583 #ifdef __cplusplus 1584 } 1585 #endif 1586 1587 #endif /* STM32F3xx_HAL_UART_H */ 1588 1589
