1 /**
2 ******************************************************************************
3 * @file stm32f2xx_hal_iwdg.c
4 * @author MCD Application Team
5 * @brief IWDG HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Independent Watchdog (IWDG) peripheral:
8 * + Initialization and Start functions
9 * + IO operation functions
10 *
11 @verbatim
12 ==============================================================================
13 ##### IWDG Generic features #####
14 ==============================================================================
15 [..]
16 (+) The IWDG can be started by either software or hardware (configurable
17 through option byte).
18
19 (+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays
20 active even if the main clock fails.
21
22 (+) Once the IWDG is started, the LSI is forced ON and both cannot be
23 disabled. The counter starts counting down from the reset value (0xFFF).
24 When it reaches the end of count value (0x000) a reset signal is
25 generated (IWDG reset).
26
27 (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
28 the IWDG_RLR value is reloaded into the counter and the watchdog reset
29 is prevented.
30
31 (+) The IWDG is implemented in the VDD voltage domain that is still functional
32 in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY).
33 IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
34 reset occurs.
35
36 (+) Debug mode: When the microcontroller enters debug mode (core halted),
37 the IWDG counter either continues to work normally or stops, depending
38 on DBG_IWDG_STOP configuration bit in DBG module, accessible through
39 __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros.
40
41 [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
42 The IWDG timeout may vary due to LSI clock frequency dispersion.
43 STM32F2xx devices provide the capability to measure the LSI clock
44 frequency (LSI clock is internally connected to TIM5 CH4 input capture).
45 The measured value can be used to have an IWDG timeout with an
46 acceptable accuracy.
47
48 [..] Default timeout value (necessary for IWDG_SR status register update):
49 Constant LSI_VALUE is defined based on the nominal LSI clock frequency.
50 This frequency being subject to variations as mentioned above, the
51 default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT
52 below) may become too short or too long.
53 In such cases, this default timeout value can be tuned by redefining
54 the constant LSI_VALUE at user-application level (based, for instance,
55 on the measured LSI clock frequency as explained above).
56
57 ##### How to use this driver #####
58 ==============================================================================
59 [..]
60 (#) Use IWDG using HAL_IWDG_Init() function to :
61 (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
62 clock is forced ON and IWDG counter starts counting down.
63 (++) Enable write access to configuration registers:
64 IWDG_PR and IWDG_RLR.
65 (++) Configure the IWDG prescaler and counter reload value. This reload
66 value will be loaded in the IWDG counter each time the watchdog is
67 reloaded, then the IWDG will start counting down from this value.
68 (++) Wait for status flags to be reset.
69
70 (#) Then the application program must refresh the IWDG counter at regular
71 intervals during normal operation to prevent an MCU reset, using
72 HAL_IWDG_Refresh() function.
73
74 *** IWDG HAL driver macros list ***
75 ====================================
76 [..]
77 Below the list of most used macros in IWDG HAL driver:
78 (+) __HAL_IWDG_START: Enable the IWDG peripheral
79 (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
80 the reload register
81
82 @endverbatim
83 ******************************************************************************
84 * @attention
85 *
86 * <h2><center>© Copyright (c) 2016 STMicroelectronics.
87 * All rights reserved.</center></h2>
88 *
89 * This software component is licensed by ST under BSD 3-Clause license,
90 * the "License"; You may not use this file except in compliance with the
91 * License. You may obtain a copy of the License at:
92 * opensource.org/licenses/BSD-3-Clause
93 *
94 ******************************************************************************
95 */
96
97 /* Includes ------------------------------------------------------------------*/
98 #include "stm32f2xx_hal.h"
99
100 /** @addtogroup STM32F2xx_HAL_Driver
101 * @{
102 */
103
104 #ifdef HAL_IWDG_MODULE_ENABLED
105 /** @addtogroup IWDG
106 * @brief IWDG HAL module driver.
107 * @{
108 */
109
110 /* Private typedef -----------------------------------------------------------*/
111 /* Private define ------------------------------------------------------------*/
112 /** @defgroup IWDG_Private_Defines IWDG Private Defines
113 * @{
114 */
115 /* Status register needs up to 5 LSI clock periods divided by the clock
116 prescaler to be updated. The number of LSI clock periods is upper-rounded to
117 6 for the timeout value calculation.
118 The timeout value is calculated using the highest prescaler (256) and
119 the LSI_VALUE constant. The value of this constant can be changed by the user
120 to take into account possible LSI clock period variations.
121 The timeout value is multiplied by 1000 to be converted in milliseconds.
122 LSI startup time is also considered here by adding LSI_STARTUP_TIMEOUT
123 converted in milliseconds. */
124 #define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL))
125 #define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_RVU | IWDG_SR_PVU)
126 /**
127 * @}
128 */
129
130 /* Private macro -------------------------------------------------------------*/
131 /* Private variables ---------------------------------------------------------*/
132 /* Private function prototypes -----------------------------------------------*/
133 /* Exported functions --------------------------------------------------------*/
134
135 /** @addtogroup IWDG_Exported_Functions
136 * @{
137 */
138
139 /** @addtogroup IWDG_Exported_Functions_Group1
140 * @brief Initialization and Start functions.
141 *
142 @verbatim
143 ===============================================================================
144 ##### Initialization and Start functions #####
145 ===============================================================================
146 [..] This section provides functions allowing to:
147 (+) Initialize the IWDG according to the specified parameters in the
148 IWDG_InitTypeDef of associated handle.
149 (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
150 is reloaded in order to exit function with correct time base.
151
152 @endverbatim
153 * @{
154 */
155
156 /**
157 * @brief Initialize the IWDG according to the specified parameters in the
158 * IWDG_InitTypeDef and start watchdog. Before exiting function,
159 * watchdog is refreshed in order to have correct time base.
160 * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
161 * the configuration information for the specified IWDG module.
162 * @retval HAL status
163 */
HAL_IWDG_Init(IWDG_HandleTypeDef * hiwdg)164 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
165 {
166 uint32_t tickstart;
167
168 /* Check the IWDG handle allocation */
169 if (hiwdg == NULL)
170 {
171 return HAL_ERROR;
172 }
173
174 /* Check the parameters */
175 assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
176 assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
177 assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
178
179 /* Enable IWDG. LSI is turned on automatically */
180 __HAL_IWDG_START(hiwdg);
181
182 /* Enable write access to IWDG_PR and IWDG_RLR registers by writing
183 0x5555 in KR */
184 IWDG_ENABLE_WRITE_ACCESS(hiwdg);
185
186 /* Write to IWDG registers the Prescaler & Reload values to work with */
187 hiwdg->Instance->PR = hiwdg->Init.Prescaler;
188 hiwdg->Instance->RLR = hiwdg->Init.Reload;
189
190 /* Check pending flag, if previous update not done, return timeout */
191 tickstart = HAL_GetTick();
192
193 /* Wait for register to be updated */
194 while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
195 {
196 if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
197 {
198 if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
199 {
200 return HAL_TIMEOUT;
201 }
202 }
203 }
204
205 /* Reload IWDG counter with value defined in the reload register */
206 __HAL_IWDG_RELOAD_COUNTER(hiwdg);
207
208 /* Return function status */
209 return HAL_OK;
210 }
211
212
213 /**
214 * @}
215 */
216
217
218 /** @addtogroup IWDG_Exported_Functions_Group2
219 * @brief IO operation functions
220 *
221 @verbatim
222 ===============================================================================
223 ##### IO operation functions #####
224 ===============================================================================
225 [..] This section provides functions allowing to:
226 (+) Refresh the IWDG.
227
228 @endverbatim
229 * @{
230 */
231
232 /**
233 * @brief Refresh the IWDG.
234 * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
235 * the configuration information for the specified IWDG module.
236 * @retval HAL status
237 */
HAL_IWDG_Refresh(IWDG_HandleTypeDef * hiwdg)238 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
239 {
240 /* Reload IWDG counter with value defined in the reload register */
241 __HAL_IWDG_RELOAD_COUNTER(hiwdg);
242
243 /* Return function status */
244 return HAL_OK;
245 }
246
247
248 /**
249 * @}
250 */
251
252 /**
253 * @}
254 */
255
256 #endif /* HAL_IWDG_MODULE_ENABLED */
257 /**
258 * @}
259 */
260
261 /**
262 * @}
263 */
264
265 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
266
