1 /**
2 ******************************************************************************
3 * @file stm32f2xx_ll_rng.h
4 * @author MCD Application Team
5 * @brief Header file of RNG LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>© Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32F2xx_LL_RNG_H
22 #define STM32F2xx_LL_RNG_H
23
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32f2xx.h"
30
31 /** @addtogroup STM32F2xx_LL_Driver
32 * @{
33 */
34
35 #if defined (RNG)
36
37 /** @defgroup RNG_LL RNG
38 * @{
39 */
40
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 /* Private constants ---------------------------------------------------------*/
44 /* Private macros ------------------------------------------------------------*/
45
46 /* Exported types ------------------------------------------------------------*/
47 /* Exported constants --------------------------------------------------------*/
48 /** @defgroup RNG_LL_Exported_Constants RNG Exported Constants
49 * @{
50 */
51
52
53 /** @defgroup RNG_LL_EC_GET_FLAG Get Flags Defines
54 * @brief Flags defines which can be used with LL_RNG_ReadReg function
55 * @{
56 */
57 #define LL_RNG_SR_DRDY RNG_SR_DRDY /*!< Register contains valid random data */
58 #define LL_RNG_SR_CECS RNG_SR_CECS /*!< Clock error current status */
59 #define LL_RNG_SR_SECS RNG_SR_SECS /*!< Seed error current status */
60 #define LL_RNG_SR_CEIS RNG_SR_CEIS /*!< Clock error interrupt status */
61 #define LL_RNG_SR_SEIS RNG_SR_SEIS /*!< Seed error interrupt status */
62 /**
63 * @}
64 */
65
66 /** @defgroup RNG_LL_EC_IT IT Defines
67 * @brief IT defines which can be used with LL_RNG_ReadReg and LL_RNG_WriteReg macros
68 * @{
69 */
70 #define LL_RNG_CR_IE RNG_CR_IE /*!< RNG Interrupt enable */
71 /**
72 * @}
73 */
74
75 /**
76 * @}
77 */
78
79 /* Exported macro ------------------------------------------------------------*/
80 /** @defgroup RNG_LL_Exported_Macros RNG Exported Macros
81 * @{
82 */
83
84 /** @defgroup RNG_LL_EM_WRITE_READ Common Write and read registers Macros
85 * @{
86 */
87
88 /**
89 * @brief Write a value in RNG register
90 * @param __INSTANCE__ RNG Instance
91 * @param __REG__ Register to be written
92 * @param __VALUE__ Value to be written in the register
93 * @retval None
94 */
95 #define LL_RNG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
96
97 /**
98 * @brief Read a value in RNG register
99 * @param __INSTANCE__ RNG Instance
100 * @param __REG__ Register to be read
101 * @retval Register value
102 */
103 #define LL_RNG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
104 /**
105 * @}
106 */
107
108 /**
109 * @}
110 */
111
112
113 /* Exported functions --------------------------------------------------------*/
114 /** @defgroup RNG_LL_Exported_Functions RNG Exported Functions
115 * @{
116 */
117 /** @defgroup RNG_LL_EF_Configuration RNG Configuration functions
118 * @{
119 */
120
121 /**
122 * @brief Enable Random Number Generation
123 * @rmtoll CR RNGEN LL_RNG_Enable
124 * @param RNGx RNG Instance
125 * @retval None
126 */
LL_RNG_Enable(RNG_TypeDef * RNGx)127 __STATIC_INLINE void LL_RNG_Enable(RNG_TypeDef *RNGx)
128 {
129 SET_BIT(RNGx->CR, RNG_CR_RNGEN);
130 }
131
132 /**
133 * @brief Disable Random Number Generation
134 * @rmtoll CR RNGEN LL_RNG_Disable
135 * @param RNGx RNG Instance
136 * @retval None
137 */
LL_RNG_Disable(RNG_TypeDef * RNGx)138 __STATIC_INLINE void LL_RNG_Disable(RNG_TypeDef *RNGx)
139 {
140 CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN);
141 }
142
143 /**
144 * @brief Check if Random Number Generator is enabled
145 * @rmtoll CR RNGEN LL_RNG_IsEnabled
146 * @param RNGx RNG Instance
147 * @retval State of bit (1 or 0).
148 */
LL_RNG_IsEnabled(RNG_TypeDef * RNGx)149 __STATIC_INLINE uint32_t LL_RNG_IsEnabled(RNG_TypeDef *RNGx)
150 {
151 return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL);
152 }
153
154 /**
155 * @}
156 */
157
158 /** @defgroup RNG_LL_EF_FLAG_Management FLAG Management
159 * @{
160 */
161
162 /**
163 * @brief Indicate if the RNG Data ready Flag is set or not
164 * @rmtoll SR DRDY LL_RNG_IsActiveFlag_DRDY
165 * @param RNGx RNG Instance
166 * @retval State of bit (1 or 0).
167 */
LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef * RNGx)168 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef *RNGx)
169 {
170 return ((READ_BIT(RNGx->SR, RNG_SR_DRDY) == (RNG_SR_DRDY)) ? 1UL : 0UL);
171 }
172
173 /**
174 * @brief Indicate if the Clock Error Current Status Flag is set or not
175 * @rmtoll SR CECS LL_RNG_IsActiveFlag_CECS
176 * @param RNGx RNG Instance
177 * @retval State of bit (1 or 0).
178 */
LL_RNG_IsActiveFlag_CECS(RNG_TypeDef * RNGx)179 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(RNG_TypeDef *RNGx)
180 {
181 return ((READ_BIT(RNGx->SR, RNG_SR_CECS) == (RNG_SR_CECS)) ? 1UL : 0UL);
182 }
183
184 /**
185 * @brief Indicate if the Seed Error Current Status Flag is set or not
186 * @rmtoll SR SECS LL_RNG_IsActiveFlag_SECS
187 * @param RNGx RNG Instance
188 * @retval State of bit (1 or 0).
189 */
LL_RNG_IsActiveFlag_SECS(RNG_TypeDef * RNGx)190 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(RNG_TypeDef *RNGx)
191 {
192 return ((READ_BIT(RNGx->SR, RNG_SR_SECS) == (RNG_SR_SECS)) ? 1UL : 0UL);
193 }
194
195 /**
196 * @brief Indicate if the Clock Error Interrupt Status Flag is set or not
197 * @rmtoll SR CEIS LL_RNG_IsActiveFlag_CEIS
198 * @param RNGx RNG Instance
199 * @retval State of bit (1 or 0).
200 */
LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef * RNGx)201 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef *RNGx)
202 {
203 return ((READ_BIT(RNGx->SR, RNG_SR_CEIS) == (RNG_SR_CEIS)) ? 1UL : 0UL);
204 }
205
206 /**
207 * @brief Indicate if the Seed Error Interrupt Status Flag is set or not
208 * @rmtoll SR SEIS LL_RNG_IsActiveFlag_SEIS
209 * @param RNGx RNG Instance
210 * @retval State of bit (1 or 0).
211 */
LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef * RNGx)212 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef *RNGx)
213 {
214 return ((READ_BIT(RNGx->SR, RNG_SR_SEIS) == (RNG_SR_SEIS)) ? 1UL : 0UL);
215 }
216
217 /**
218 * @brief Clear Clock Error interrupt Status (CEIS) Flag
219 * @rmtoll SR CEIS LL_RNG_ClearFlag_CEIS
220 * @param RNGx RNG Instance
221 * @retval None
222 */
LL_RNG_ClearFlag_CEIS(RNG_TypeDef * RNGx)223 __STATIC_INLINE void LL_RNG_ClearFlag_CEIS(RNG_TypeDef *RNGx)
224 {
225 WRITE_REG(RNGx->SR, ~RNG_SR_CEIS);
226 }
227
228 /**
229 * @brief Clear Seed Error interrupt Status (SEIS) Flag
230 * @rmtoll SR SEIS LL_RNG_ClearFlag_SEIS
231 * @param RNGx RNG Instance
232 * @retval None
233 */
LL_RNG_ClearFlag_SEIS(RNG_TypeDef * RNGx)234 __STATIC_INLINE void LL_RNG_ClearFlag_SEIS(RNG_TypeDef *RNGx)
235 {
236 WRITE_REG(RNGx->SR, ~RNG_SR_SEIS);
237 }
238
239 /**
240 * @}
241 */
242
243 /** @defgroup RNG_LL_EF_IT_Management IT Management
244 * @{
245 */
246
247 /**
248 * @brief Enable Random Number Generator Interrupt
249 * (applies for either Seed error, Clock Error or Data ready interrupts)
250 * @rmtoll CR IE LL_RNG_EnableIT
251 * @param RNGx RNG Instance
252 * @retval None
253 */
LL_RNG_EnableIT(RNG_TypeDef * RNGx)254 __STATIC_INLINE void LL_RNG_EnableIT(RNG_TypeDef *RNGx)
255 {
256 SET_BIT(RNGx->CR, RNG_CR_IE);
257 }
258
259 /**
260 * @brief Disable Random Number Generator Interrupt
261 * (applies for either Seed error, Clock Error or Data ready interrupts)
262 * @rmtoll CR IE LL_RNG_DisableIT
263 * @param RNGx RNG Instance
264 * @retval None
265 */
LL_RNG_DisableIT(RNG_TypeDef * RNGx)266 __STATIC_INLINE void LL_RNG_DisableIT(RNG_TypeDef *RNGx)
267 {
268 CLEAR_BIT(RNGx->CR, RNG_CR_IE);
269 }
270
271 /**
272 * @brief Check if Random Number Generator Interrupt is enabled
273 * (applies for either Seed error, Clock Error or Data ready interrupts)
274 * @rmtoll CR IE LL_RNG_IsEnabledIT
275 * @param RNGx RNG Instance
276 * @retval State of bit (1 or 0).
277 */
LL_RNG_IsEnabledIT(RNG_TypeDef * RNGx)278 __STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(RNG_TypeDef *RNGx)
279 {
280 return ((READ_BIT(RNGx->CR, RNG_CR_IE) == (RNG_CR_IE)) ? 1UL : 0UL);
281 }
282
283 /**
284 * @}
285 */
286
287 /** @defgroup RNG_LL_EF_Data_Management Data Management
288 * @{
289 */
290
291 /**
292 * @brief Return32-bit Random Number value
293 * @rmtoll DR RNDATA LL_RNG_ReadRandData32
294 * @param RNGx RNG Instance
295 * @retval Generated 32-bit random value
296 */
LL_RNG_ReadRandData32(RNG_TypeDef * RNGx)297 __STATIC_INLINE uint32_t LL_RNG_ReadRandData32(RNG_TypeDef *RNGx)
298 {
299 return (uint32_t)(READ_REG(RNGx->DR));
300 }
301
302 /**
303 * @}
304 */
305
306 #if defined(USE_FULL_LL_DRIVER)
307 /** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions
308 * @{
309 */
310 ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx);
311
312 /**
313 * @}
314 */
315 #endif /* USE_FULL_LL_DRIVER */
316
317 /**
318 * @}
319 */
320
321 /**
322 * @}
323 */
324
325 #endif /* RNG */
326
327 /**
328 * @}
329 */
330
331 #ifdef __cplusplus
332 }
333 #endif
334
335 #endif /* __STM32F2xx_LL_RNG_H */
336
337 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
338
