1 /**
2   ******************************************************************************
3   * @file    stm32f1xx.h
4   * @author  MCD Application Team
5   * @brief   CMSIS STM32F1xx Device Peripheral Access Layer Header File.
6   *
7   *          The file is the unique include file that the application programmer
8   *          is using in the C source code, usually in main.c. This file contains:
9   *            - Configuration section that allows to select:
10   *              - The STM32F1xx device used in the target application
11   *              - To use or not the peripheral�s drivers in application code(i.e.
12   *                code will be based on direct access to peripheral�s registers
13   *                rather than drivers API), this option is controlled by
14   *                "#define USE_HAL_DRIVER"
15   *
16   ******************************************************************************
17   * @attention
18   *
19   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
20   * All rights reserved.</center></h2>
21   *
22   * This software component is licensed by ST under BSD 3-Clause license,
23   * the "License"; You may not use this file except in compliance with the
24   * License. You may obtain a copy of the License at:
25   *                        opensource.org/licenses/BSD-3-Clause
26   *
27   ******************************************************************************
28   */
29 
30 /** @addtogroup CMSIS
31   * @{
32   */
33 
34 /** @addtogroup stm32f1xx
35   * @{
36   */
37 
38 #ifndef __STM32F1XX_H
39 #define __STM32F1XX_H
40 
41 #ifdef __cplusplus
42  extern "C" {
43 #endif /* __cplusplus */
44 
45 /** @addtogroup Library_configuration_section
46   * @{
47   */
48 
49 /**
50   * @brief STM32 Family
51   */
52 #if !defined (STM32F1)
53 #define STM32F1
54 #endif /* STM32F1 */
55 
56 /* Uncomment the line below according to the target STM32L device used in your
57    application
58   */
59 
60 #if !defined (STM32F100xB) && !defined (STM32F100xE) && !defined (STM32F101x6) && \
61     !defined (STM32F101xB) && !defined (STM32F101xE) && !defined (STM32F101xG) && !defined (STM32F102x6) && !defined (STM32F102xB) && !defined (STM32F103x6) && \
62     !defined (STM32F103xB) && !defined (STM32F103xE) && !defined (STM32F103xG) && !defined (STM32F105xC) && !defined (STM32F107xC)
63   /* #define STM32F100xB  */   /*!< STM32F100C4, STM32F100R4, STM32F100C6, STM32F100R6, STM32F100C8, STM32F100R8, STM32F100V8, STM32F100CB, STM32F100RB and STM32F100VB */
64   /* #define STM32F100xE */    /*!< STM32F100RC, STM32F100VC, STM32F100ZC, STM32F100RD, STM32F100VD, STM32F100ZD, STM32F100RE, STM32F100VE and STM32F100ZE */
65   /* #define STM32F101x6  */   /*!< STM32F101C4, STM32F101R4, STM32F101T4, STM32F101C6, STM32F101R6 and STM32F101T6 Devices */
66   /* #define STM32F101xB  */   /*!< STM32F101C8, STM32F101R8, STM32F101T8, STM32F101V8, STM32F101CB, STM32F101RB, STM32F101TB and STM32F101VB */
67   /* #define STM32F101xE */    /*!< STM32F101RC, STM32F101VC, STM32F101ZC, STM32F101RD, STM32F101VD, STM32F101ZD, STM32F101RE, STM32F101VE and STM32F101ZE */
68   /* #define STM32F101xG  */   /*!< STM32F101RF, STM32F101VF, STM32F101ZF, STM32F101RG, STM32F101VG and STM32F101ZG */
69   /* #define STM32F102x6 */    /*!< STM32F102C4, STM32F102R4, STM32F102C6 and STM32F102R6 */
70   /* #define STM32F102xB  */   /*!< STM32F102C8, STM32F102R8, STM32F102CB and STM32F102RB */
71   /* #define STM32F103x6  */   /*!< STM32F103C4, STM32F103R4, STM32F103T4, STM32F103C6, STM32F103R6 and STM32F103T6 */
72   /* #define STM32F103xB  */   /*!< STM32F103C8, STM32F103R8, STM32F103T8, STM32F103V8, STM32F103CB, STM32F103RB, STM32F103TB and STM32F103VB */
73   /* #define STM32F103xE */    /*!< STM32F103RC, STM32F103VC, STM32F103ZC, STM32F103RD, STM32F103VD, STM32F103ZD, STM32F103RE, STM32F103VE and STM32F103ZE */
74   /* #define STM32F103xG  */   /*!< STM32F103RF, STM32F103VF, STM32F103ZF, STM32F103RG, STM32F103VG and STM32F103ZG */
75   /* #define STM32F105xC */    /*!< STM32F105R8, STM32F105V8, STM32F105RB, STM32F105VB, STM32F105RC and STM32F105VC */
76   /* #define STM32F107xC  */   /*!< STM32F107RB, STM32F107VB, STM32F107RC and STM32F107VC */
77 #endif
78 
79 /*  Tip: To avoid modifying this file each time you need to switch between these
80         devices, you can define the device in your toolchain compiler preprocessor.
81   */
82 
83 #if !defined  (USE_HAL_DRIVER)
84 /**
85  * @brief Comment the line below if you will not use the peripherals drivers.
86    In this case, these drivers will not be included and the application code will
87    be based on direct access to peripherals registers
88    */
89   /*#define USE_HAL_DRIVER */
90 #endif /* USE_HAL_DRIVER */
91 
92 /**
93   * @brief CMSIS Device version number V4.3.3
94   */
95 #define __STM32F1_CMSIS_VERSION_MAIN   (0x04) /*!< [31:24] main version */
96 #define __STM32F1_CMSIS_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
97 #define __STM32F1_CMSIS_VERSION_SUB2   (0x03) /*!< [15:8]  sub2 version */
98 #define __STM32F1_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */
99 #define __STM32F1_CMSIS_VERSION        ((__STM32F1_CMSIS_VERSION_MAIN << 24)\
100                                        |(__STM32F1_CMSIS_VERSION_SUB1 << 16)\
101                                        |(__STM32F1_CMSIS_VERSION_SUB2 << 8 )\
102                                        |(__STM32F1_CMSIS_VERSION_RC))
103 
104 /**
105   * @}
106   */
107 
108 /** @addtogroup Device_Included
109   * @{
110   */
111 
112 #if defined(STM32F100xB)
113   #include "stm32f100xb.h"
114 #elif defined(STM32F100xE)
115   #include "stm32f100xe.h"
116 #elif defined(STM32F101x6)
117   #include "stm32f101x6.h"
118 #elif defined(STM32F101xB)
119   #include "stm32f101xb.h"
120 #elif defined(STM32F101xE)
121   #include "stm32f101xe.h"
122 #elif defined(STM32F101xG)
123   #include "stm32f101xg.h"
124 #elif defined(STM32F102x6)
125   #include "stm32f102x6.h"
126 #elif defined(STM32F102xB)
127   #include "stm32f102xb.h"
128 #elif defined(STM32F103x6)
129   #include "stm32f103x6.h"
130 #elif defined(STM32F103xB)
131   #include "stm32f103xb.h"
132 #elif defined(STM32F103xE)
133   #include "stm32f103xe.h"
134 #elif defined(STM32F103xG)
135   #include "stm32f103xg.h"
136 #elif defined(STM32F105xC)
137   #include "stm32f105xc.h"
138 #elif defined(STM32F107xC)
139   #include "stm32f107xc.h"
140 #else
141  #error "Please select first the target STM32F1xx device used in your application (in stm32f1xx.h file)"
142 #endif
143 
144 /**
145   * @}
146   */
147 
148 /** @addtogroup Exported_types
149   * @{
150   */
151 typedef enum
152 {
153   RESET = 0,
154   SET = !RESET
155 } FlagStatus, ITStatus;
156 
157 typedef enum
158 {
159   DISABLE = 0,
160   ENABLE = !DISABLE
161 } FunctionalState;
162 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
163 
164 typedef enum
165 {
166   SUCCESS = 0U,
167   ERROR = !SUCCESS
168 } ErrorStatus;
169 
170 /**
171   * @}
172   */
173 
174 
175 /** @addtogroup Exported_macros
176   * @{
177   */
178 #define SET_BIT(REG, BIT)     ((REG) |= (BIT))
179 
180 #define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
181 
182 #define READ_BIT(REG, BIT)    ((REG) & (BIT))
183 
184 #define CLEAR_REG(REG)        ((REG) = (0x0))
185 
186 #define WRITE_REG(REG, VAL)   ((REG) = (VAL))
187 
188 #define READ_REG(REG)         ((REG))
189 
190 #define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
191 
192 #define POSITION_VAL(VAL)     (__CLZ(__RBIT(VAL)))
193 
194 /* Use of CMSIS compiler intrinsics for register exclusive access */
195 /* Atomic 32-bit register access macro to set one or several bits */
196 #define ATOMIC_SET_BIT(REG, BIT)                             \
197   do {                                                       \
198     uint32_t val;                                            \
199     do {                                                     \
200       val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT);       \
201     } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
202   } while(0)
203 
204 /* Atomic 32-bit register access macro to clear one or several bits */
205 #define ATOMIC_CLEAR_BIT(REG, BIT)                           \
206   do {                                                       \
207     uint32_t val;                                            \
208     do {                                                     \
209       val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT);      \
210     } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
211   } while(0)
212 
213 /* Atomic 32-bit register access macro to clear and set one or several bits */
214 #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)                          \
215   do {                                                                     \
216     uint32_t val;                                                          \
217     do {                                                                   \
218       val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
219     } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U);               \
220   } while(0)
221 
222 /* Atomic 16-bit register access macro to set one or several bits */
223 #define ATOMIC_SETH_BIT(REG, BIT)                            \
224   do {                                                       \
225     uint16_t val;                                            \
226     do {                                                     \
227       val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT);       \
228     } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
229   } while(0)
230 
231 /* Atomic 16-bit register access macro to clear one or several bits */
232 #define ATOMIC_CLEARH_BIT(REG, BIT)                          \
233   do {                                                       \
234     uint16_t val;                                            \
235     do {                                                     \
236       val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT);      \
237     } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
238   } while(0)
239 
240 /* Atomic 16-bit register access macro to clear and set one or several bits */
241 #define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK)                         \
242   do {                                                                     \
243     uint16_t val;                                                          \
244     do {                                                                   \
245       val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
246     } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U);               \
247   } while(0)
248 
249 
250 /**
251   * @}
252   */
253 
254 #if defined (USE_HAL_DRIVER)
255  #include "stm32f1xx_hal.h"
256 #endif /* USE_HAL_DRIVER */
257 
258 
259 #ifdef __cplusplus
260 }
261 #endif /* __cplusplus */
262 
263 #endif /* __STM32F1xx_H */
264 /**
265   * @}
266   */
267 
268 /**
269   * @}
270   */
271 
272 
273 
274 
275 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
276