1 /** 2 ****************************************************************************** 3 * @file stm32u5xx_hal_tim_ex.h 4 * @author MCD Application Team 5 * @brief Header file of TIM HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2021 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32U5xx_HAL_TIM_EX_H 21 #define STM32U5xx_HAL_TIM_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32u5xx_hal_def.h" 29 30 /** @addtogroup STM32U5xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup TIMEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief TIM Hall sensor Configuration Structure definition 45 */ 46 47 typedef struct 48 { 49 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. 50 This parameter can be a value of @ref TIM_Input_Capture_Polarity */ 51 52 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. 53 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ 54 55 uint32_t IC1Filter; /*!< Specifies the input capture filter. 56 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ 57 58 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 59 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 60 } TIM_HallSensor_InitTypeDef; 61 62 /** 63 * @brief TIM Break/Break2 input configuration 64 */ 65 typedef struct 66 { 67 uint32_t Source; /*!< Specifies the source of the timer break input. 68 This parameter can be a value of @ref TIMEx_Break_Input_Source */ 69 uint32_t Enable; /*!< Specifies whether or not the break input source is enabled. 70 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */ 71 uint32_t Polarity; /*!< Specifies the break input source polarity. 72 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity */ 73 } TIMEx_BreakInputConfigTypeDef; 74 75 /** 76 * @brief TIM Encoder index configuration 77 */ 78 typedef struct 79 { 80 uint32_t Polarity; /*!< TIM Encoder index polarity.This parameter can be a value of @ref TIMEx_Encoder_Index_Polarity */ 81 82 uint32_t Prescaler; /*!< TIM Encoder index prescaler.This parameter can be a value of @ref TIMEx_Encoder_Index_Prescaler */ 83 84 uint32_t Filter; /*!< TIM Encoder index filter.This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ 85 86 uint32_t Blanking; /*!< Specifies whether or not the encoder index event is conditioned by TI3 or TI4 input.This parameter can be a value of @ref TIMEx_Encoder_Index_Blanking */ 87 88 FunctionalState FirstIndexEnable; /*!< Specifies whether or not the encoder first index is enabled.This parameter value can be ENABLE or DISABLE. */ 89 90 uint32_t Position; /*!< Specifies in which AB input configuration the index event resets the counter.This parameter can be a value of @ref TIMEx_Encoder_Index_Position */ 91 92 uint32_t Direction; /*!< Specifies in which counter direction the index event resets the counter.This parameter can be a value of @ref TIMEx_Encoder_Index_Direction */ 93 94 } TIMEx_EncoderIndexConfigTypeDef; 95 96 /** 97 * @} 98 */ 99 /* End of exported types -----------------------------------------------------*/ 100 101 /* Exported constants --------------------------------------------------------*/ 102 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants 103 * @{ 104 */ 105 106 /** @defgroup TIMEx_Remap TIM Extended Remapping 107 * @{ 108 */ 109 #define TIM_TIM1_ETR_GPIO 0x00000000UL /*!< TIM1_ETR is not connected to I/O */ 110 #define TIM_TIM1_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< TIM1_ETR is connected to COMP1 output */ 111 #define TIM_TIM1_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< TIM1_ETR is connected to COMP2 output */ 112 #define TIM_TIM1_ETR_MSIK (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM1_ETR is connected to MSIK */ 113 #define TIM_TIM1_ETR_HSI TIM1_AF1_ETRSEL_2 /*!< TIM1_ETR is connected to HSI */ 114 #define TIM_TIM1_ETR_MSIS (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM1_ETR is connected to MSI */ 115 #define TIM_TIM1_ETR_ADC1_AWD1 (TIM1_AF1_ETRSEL_3) /*!< TIM1_ETR is connected to ADC1 AWD1 */ 116 #define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /*!< TIM1_ETR is connected to ADC1 AWD2 */ 117 #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /*!< TIM1_ETR is connected to ADC1 AWD3 */ 118 #define TIM_TIM1_ETR_ADC4_AWD1 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM1_ETR is connected to ADC4 AWD1 */ 119 #define TIM_TIM1_ETR_ADC4_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /*!< TIM1_ETR is connected to ADC4 AWD2 */ 120 #define TIM_TIM1_ETR_ADC4_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM1_ETR is connected to ADC4 AWD3 */ 121 122 #define TIM_TIM2_ETR_GPIO 0x00000000UL /*!< TIM2_ETR is not connected to I/O */ 123 #define TIM_TIM2_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< TIM2_ETR is connected to COMP1 output */ 124 #define TIM_TIM2_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< TIM2_ETR is connected to COMP2 output */ 125 #define TIM_TIM2_ETR_MSIK (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to MSIK */ 126 #define TIM_TIM2_ETR_HSI TIM1_AF1_ETRSEL_2 /*!< TIM2_ETR is connected to HSI */ 127 #define TIM_TIM2_ETR_MSIS (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to MSIS */ 128 #define TIM_TIM2_ETR_TIM3_ETR TIM1_AF1_ETRSEL_3 /*!< TIM2_ETR is connected to TIM3 ETR */ 129 #define TIM_TIM2_ETR_TIM4_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to TIM4 ETR */ 130 #define TIM_TIM2_ETR_TIM5_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /*!< TIM2_ETR is connected to TIM5 ETR */ 131 #define TIM_TIM2_ETR_LSE (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to LSE */ 132 133 #define TIM_TIM3_ETR_GPIO 0x00000000UL /*!< TIM3_ETR is not connected to I/O */ 134 #define TIM_TIM3_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< TIM3_ETR is connected to COMP1 output */ 135 #define TIM_TIM3_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< TIM3_ETR is connected to COMP2 output */ 136 #define TIM_TIM3_ETR_MSIK (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM3_ETR is connected to MSIK */ 137 #define TIM_TIM3_ETR_HSI TIM1_AF1_ETRSEL_2 /*!< TIM3_ETR is connected to HSI */ 138 #define TIM_TIM3_ETR_MSIS (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM3_ETR is connected to MSIS */ 139 #define TIM_TIM3_ETR_TIM2_ETR TIM1_AF1_ETRSEL_3 /*!< TIM3_ETR is connected to TIM2 ETR */ 140 #define TIM_TIM3_ETR_TIM4_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /*!< TIM3_ETR is connected to TIM4 ETR */ 141 #define TIM_TIM3_ETR_ADC1_AWD1 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1| TIM1_AF1_ETRSEL_0) /*!< TIM3_ETR is connected to ADC1 AWD1 */ 142 #define TIM_TIM3_ETR_ADC1_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /*!< TIM3_ETR is connected to ADC1 AWD2 */ 143 #define TIM_TIM3_ETR_ADC1_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM3_ETR is connected to ADC1 AWD3 */ 144 145 #define TIM_TIM4_ETR_GPIO 0x00000000UL /*!< TIM4_ETR is not connected to I/O */ 146 #define TIM_TIM4_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< TIM4_ETR is connected to COMP1 output */ 147 #define TIM_TIM4_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< TIM4_ETR is connected to COMP2 output */ 148 #define TIM_TIM4_ETR_MSIK (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM4_ETR is connected to MSIK */ 149 #define TIM_TIM4_ETR_HSI TIM1_AF1_ETRSEL_2 /*!< TIM4_ETR is connected to HSI */ 150 #define TIM_TIM4_ETR_MSIS (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM4_ETR is connected to MSIS */ 151 #define TIM_TIM4_ETR_TIM3_ETR TIM1_AF1_ETRSEL_3 /*!< TIM4_ETR is connected to TIM3 ETR */ 152 #define TIM_TIM4_ETR_TIM5_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /*!< TIM4_ETR is connected to TIM5 ETR */ 153 154 #define TIM_TIM5_ETR_GPIO 0x00000000UL /*!< TIM5_ETR is not connected to I/O */ 155 #define TIM_TIM5_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< TIM5_ETR is connected to COMP1 output */ 156 #define TIM_TIM5_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< TIM5_ETR is connected to COMP2 output */ 157 #define TIM_TIM5_ETR_MSIK (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM5_ETR is connected to MSIK */ 158 #define TIM_TIM5_ETR_HSI TIM1_AF1_ETRSEL_2 /*!< TIM5_ETR is connected to HSI */ 159 #define TIM_TIM5_ETR_MSIS (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM5_ETR is connected to MSIS */ 160 #define TIM_TIM5_ETR_TIM2_ETR TIM1_AF1_ETRSEL_3 /*!< TIM5_ETR is connected to TIM2 ETR */ 161 #define TIM_TIM5_ETR_TIM3_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /*!< TIM5_ETR is connected to TIM3 ETR */ 162 163 #define TIM_TIM8_ETR_GPIO 0x00000000UL /*!< TIM8_ETR is not connected to I/O */ 164 #define TIM_TIM8_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< TIM8_ETR is connected to COMP1 output */ 165 #define TIM_TIM8_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< TIM8_ETR is connected to COMP2 output */ 166 #define TIM_TIM8_ETR_MSIK (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM8_ETR is connected to MSIK */ 167 #define TIM_TIM8_ETR_HSI TIM1_AF1_ETRSEL_2 /*!< TIM8_ETR is connected to HSI */ 168 #define TIM_TIM8_ETR_MSIS (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM8_ETR is connected to MSIS */ 169 #define TIM_TIM8_ETR_ADC1_AWD1 TIM1_AF1_ETRSEL_3 /*!< TIM8_ETR is connected to ADC1 AWD1 */ 170 #define TIM_TIM8_ETR_ADC1_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /*!< TIM8_ETR is connected to ADC1 AWD2 */ 171 #define TIM_TIM8_ETR_ADC1_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /*!< TIM8_ETR is connected to ADC1 AWD3 */ 172 #define TIM_TIM8_ETR_ADC4_AWD1 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM8_ETR is connected to ADC4 AWD1 */ 173 #define TIM_TIM8_ETR_ADC4_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /*!< TIM8_ETR is connected to ADC4 AWD2 */ 174 #define TIM_TIM8_ETR_ADC4_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM8_ETR is connected to ADC4 AWD3 */ 175 /** 176 * @} 177 */ 178 179 /** @defgroup TIMEx_Break_Input TIM Extended Break input 180 * @{ 181 */ 182 #define TIM_BREAKINPUT_BRK 0x00000001U /*!< Timer break input */ 183 #define TIM_BREAKINPUT_BRK2 0x00000002U /*!< Timer break2 input */ 184 /** 185 * @} 186 */ 187 188 /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source 189 * @{ 190 */ 191 #define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /*!< An external source (GPIO) is connected to the BKIN pin */ 192 #define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /*!< The COMP1 output is connected to the break input */ 193 #define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /*!< The COMP2 output is connected to the break input */ 194 #define TIM_BREAKINPUTSOURCE_MDF1 0x00000008U /*!< The analog watchdog output of the MDF1 peripheral is connected to the break input */ 195 /** 196 * @} 197 */ 198 199 /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling 200 * @{ 201 */ 202 #define TIM_BREAKINPUTSOURCE_DISABLE 0x00000000U /*!< Break input source is disabled */ 203 #define TIM_BREAKINPUTSOURCE_ENABLE 0x00000001U /*!< Break input source is enabled */ 204 /** 205 * @} 206 */ 207 208 /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity 209 * @{ 210 */ 211 #define TIM_BREAKINPUTSOURCE_POLARITY_LOW 0x00000001U /*!< Break input source is active low */ 212 #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH 0x00000000U /*!< Break input source is active_high */ 213 /** 214 * @} 215 */ 216 217 /** @defgroup TIMEx_Timer_Input_Selection TIM Extended Timer input selection 218 * @{ 219 */ 220 #define TIM_TIM1_TI1_GPIO 0x00000000UL /*!< TIM1_TI1 is connected to GPIO */ 221 #define TIM_TIM1_TI1_COMP1 TIM_TISEL_TI1SEL_0 /*!< TIM1_TI1 is connected to COMP1 OUT */ 222 #define TIM_TIM1_TI1_COMP2 TIM_TISEL_TI1SEL_1 /*!< TIM1_TI1 is connected to COMP2 OUT */ 223 224 #define TIM_TIM2_TI1_GPIO 0x00000000UL /*!< TIM2_TI1 is connected to GPIO */ 225 #define TIM_TIM2_TI1_COMP1 TIM_TISEL_TI1SEL_0 /*!< TIM2_TI1 is connected to COMP1 OUT */ 226 #define TIM_TIM2_TI1_COMP2 TIM_TISEL_TI1SEL_1 /*!< TIM2_TI1 is connected to COMP2 OUT */ 227 #define TIM_TIM2_TI2_GPIO 0x00000000UL /*!< TIM2_TI2 is connected to GPIO */ 228 #define TIM_TIM2_TI2_COMP1 TIM_TISEL_TI2SEL_0 /*!< TIM2_TI2 is connected to COMP1 OUT */ 229 #define TIM_TIM2_TI2_COMP2 TIM_TISEL_TI2SEL_1 /*!< TIM2_TI2 is connected to COMP2 OUT */ 230 #define TIM_TIM2_TI4_GPIO 0x00000000UL /*!< TIM2_TI4 is connected to GPIO */ 231 #define TIM_TIM2_TI4_COMP1 TIM_TISEL_TI4SEL_0 /*!< TIM2_TI4 is connected to COMP1 OUT */ 232 #define TIM_TIM2_TI4_COMP2 TIM_TISEL_TI4SEL_1 /*!< TIM2_TI4 is connected to COMP2 OUT */ 233 234 #define TIM_TIM3_TI1_GPIO 0x00000000UL /*!< TIM3_TI1 is connected to GPIO */ 235 #define TIM_TIM3_TI1_COMP1 TIM_TISEL_TI1SEL_0 /*!< TIM3_TI1 is connected to COMP1 OUT */ 236 #define TIM_TIM3_TI1_COMP2 TIM_TISEL_TI1SEL_1 /*!< TIM3_TI1 is connected to COMP2 OUT */ 237 #define TIM_TIM3_TI2_GPIO 0x00000000UL /*!< TIM3_TI2 is connected to GPIO */ 238 #define TIM_TIM3_TI2_COMP1 TIM_TISEL_TI2SEL_0 /*!< TIM3_TI2 is connected to COMP1 OUT */ 239 #define TIM_TIM3_TI2_COMP2 TIM_TISEL_TI2SEL_1 /*!< TIM3_TI2 is connected to COMP2 OUT */ 240 241 #define TIM_TIM4_TI1_GPIO 0x00000000UL /*!< TIM4_TI1 is connected to GPIO */ 242 #define TIM_TIM4_TI1_COMP1 TIM_TISEL_TI1SEL_0 /*!< TIM4_TI1 is connected to COMP1 OUT */ 243 #define TIM_TIM4_TI1_COMP2 TIM_TISEL_TI1SEL_1 /*!< TIM4_TI1 is connected to COMP2 OUT */ 244 #define TIM_TIM4_TI2_GPIO 0x00000000UL /*!< TIM4_TI2 is connected to GPIO */ 245 #define TIM_TIM4_TI2_COMP1 TIM_TISEL_TI2SEL_0 /*!< TIM4_TI2 is connected to COMP1 OUT */ 246 #define TIM_TIM4_TI2_COMP2 TIM_TISEL_TI2SEL_1 /*!< TIM4_TI2 is connected to COMP2 OUT */ 247 248 #define TIM_TIM5_TI1_GPIO 0x00000000UL /*!< TIM5_TI1 is connected to GPIO */ 249 #define TIM_TIM5_TI1_LSI TIM_TISEL_TI1SEL_0 /*!< TIM5_TI1 is connected to LSI */ 250 #define TIM_TIM5_TI1_LSE TIM_TISEL_TI1SEL_1 /*!< TIM5_TI1 is connected to LSE */ 251 #define TIM_TIM5_TI1_RTC_WKUP (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM5_TI1 is connected to RTC Wakeup */ 252 #define TIM_TIM5_TI1_COMP1 TIM_TISEL_TI1SEL_2 /*!< TIM5_COMP1 is connected to COMP1 OUT */ 253 #define TIM_TIM5_TI1_COMP2 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /*!< TIM5_COMP2 is connected to COMP2 OUT */ 254 255 #define TIM_TIM5_TI2_GPIO 0x00000000UL /*!< TIM5_TI2 is connected to GPIO */ 256 #define TIM_TIM5_TI2_COMP1 TIM_TISEL_TI2SEL_0 /*!< TIM5_TI2 is connected to COMP1 OUT */ 257 #define TIM_TIM5_TI2_COMP2 TIM_TISEL_TI2SEL_1 /*!< TIM5_TI2 is connected to COMP2 OUT */ 258 259 #define TIM_TIM8_TI1_GPIO 0x00000000UL /*!< TIM8_TI1 is connected to GPIO */ 260 #define TIM_TIM8_TI1_COMP1 TIM_TISEL_TI1SEL_0 /*!< TIM8_TI1 is connected to COMP1 OUT */ 261 #define TIM_TIM8_TI1_COMP2 TIM_TISEL_TI1SEL_1 /*!< TIM8_TI1 is connected to COMP2 OUT */ 262 263 #define TIM_TIM15_TI1_GPIO 0x00000000UL /*!< TIM15_TI1 is connected to GPIO */ 264 #define TIM_TIM15_TI1_LSE TIM_TISEL_TI1SEL_0 /*!< TIM15_TI1 is connected to LSE */ 265 #define TIM_TIM15_TI1_COMP1 TIM_TISEL_TI1SEL_1 /*!< TIM15_TI1 is connected to COMP1 OUT */ 266 #define TIM_TIM15_TI1_COMP2 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM15_TI1 is connected to COMP2 OUT */ 267 #define TIM_TIM15_TI2_GPIO 0x00000000UL /*!< TIM15_TI2 is connected to GPIO */ 268 #define TIM_TIM15_TI2_COMP2 TIM_TISEL_TI2SEL_0 /*!< TIM15_TI2 is connected to COMP2 OUT */ 269 270 #define TIM_TIM16_TI1_GPIO 0x00000000UL /*!< TIM16_TI1 is connected to GPIO */ 271 #define TIM_TIM16_TI1_MCO TIM_TISEL_TI1SEL_1 /*!< TIM16_TI1 is connected to MCO */ 272 #define TIM_TIM16_TI1_HSE_DIV32 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM16_TI1 is connected to HSE/32 */ 273 #define TIM_TIM16_TI1_RTC_WKUP TIM_TISEL_TI1SEL_2 /*!< TIM16_TI1 is connected to RTC Wakeup */ 274 #define TIM_TIM16_TI1_LSE (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /*!< TIM16_TI1 is connected to LSE */ 275 #define TIM_TIM16_TI1_LSI (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1) /*!< TIM16_TI1 is connected to LSI */ 276 #define TIM_TIM16_TI1_MSIS_1024 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM16_TI1 is connected to MSIS/1024 */ 277 #define TIM_TIM16_TI1_MSIS_4 TIM_TISEL_TI1SEL_3 /*!< TIM16_TI1 is connected to MSIS/4 */ 278 #define TIM_TIM16_TI1_HSI_256 (TIM_TISEL_TI1SEL_3 | TIM_TISEL_TI1SEL_0) /*!< TIM16_TI1 is connected to HSI/256 */ 279 280 #define TIM_TIM17_TI1_GPIO 0x00000000UL /*!< TIM17_TI1 is connected to GPIO */ 281 #define TIM_TIM17_TI1_MCO TIM_TISEL_TI1SEL_1 /*!< TIM17_TI1 is connected to MCO */ 282 #define TIM_TIM17_TI1_HSE_DIV32 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM17_TI1 is connected to HSE/32 */ 283 #define TIM_TIM17_TI1_RTC_WKUP TIM_TISEL_TI1SEL_2 /*!< TIM17_TI1 is connected to RTC Wakeup */ 284 #define TIM_TIM17_TI1_LSE (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /*!< TIM17_TI1 is connected to LSE */ 285 #define TIM_TIM17_TI1_LSI (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1) /*!< TIM17_TI1 is connected to LSI */ 286 #define TIM_TIM17_TI1_MSIS_1024 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM17_TI1 is connected to MSIS/1024 */ 287 #define TIM_TIM17_TI1_MSIS_4 TIM_TISEL_TI1SEL_3 /*!< TIM17_TI1 is connected to MSIS/4 */ 288 #define TIM_TIM17_TI1_HSI_256 (TIM_TISEL_TI1SEL_3 | TIM_TISEL_TI1SEL_0) /*!< TIM17_TI1 is connected to HSI/256 */ 289 /** 290 * @} 291 */ 292 293 /** @defgroup TIMEx_SMS_Preload_Enable TIM Extended Bitfield SMS preload enabling 294 * @{ 295 */ 296 #define TIM_SMS_PRELOAD_SOURCE_UPDATE 0x00000000U /*!< Prelaod of SMS bitfield is disabled */ 297 #define TIM_SMS_PRELOAD_SOURCE_INDEX TIM_SMCR_SMSPS /*!< Preload of SMS bitfield is enabled */ 298 /** 299 * @} 300 */ 301 302 /** @defgroup TIMEx_Encoder_Index_Blanking TIM Extended Encoder index blanking 303 * @{ 304 */ 305 #define TIM_ENCODERINDEX_BLANKING_DISABLE 0x00000000U /*!< Encoder index blanking is disabled */ 306 #define TIM_ENCODERINDEX_BLANKING_TI3 TIM_ECR_IBLK_0 /*!< Encoder index blanking is enabled on TI3 */ 307 #define TIM_ENCODERINDEX_BLANKING_TI4 TIM_ECR_IBLK_1 /*!< Encoder index blanking is enabled on TI4 */ 308 309 /** 310 * @} 311 */ 312 313 /** @defgroup TIMEx_Encoder_Index_Position TIM Extended Encoder index position 314 * @{ 315 */ 316 #define TIM_ENCODERINDEX_POSITION_00 0x00000000U /*!< Encoder index position is AB=00 */ 317 #define TIM_ENCODERINDEX_POSITION_01 TIM_ECR_IPOS_0 /*!< Encoder index position is AB=01 */ 318 #define TIM_ENCODERINDEX_POSITION_10 TIM_ECR_IPOS_1 /*!< Encoder index position is AB=10 */ 319 #define TIM_ENCODERINDEX_POSITION_11 (TIM_ECR_IPOS_1 | TIM_ECR_IPOS_0) /*!< Encoder index position is AB=11 */ 320 #define TIM_ENCODERINDEX_POSITION_0 0x00000000U /*!< In directional clock mode or clock plus direction mode, index resets the counter when clock is 0 */ 321 #define TIM_ENCODERINDEX_POSITION_1 TIM_ECR_IPOS_0 /*!< In directional clock mode or clock plus direction mode, index resets the counter when clock is 1 */ 322 /** 323 * @} 324 */ 325 326 /** @defgroup TIMEx_Encoder_Index_Direction TIM Extended Encoder index direction 327 * @{ 328 */ 329 #define TIM_ENCODERINDEX_DIRECTION_UP_DOWN 0x00000000U /*!< Index resets the counter whatever the direction */ 330 #define TIM_ENCODERINDEX_DIRECTION_UP TIM_ECR_IDIR_0 /*!< Index resets the counter when up-counting only */ 331 #define TIM_ENCODERINDEX_DIRECTION_DOWN TIM_ECR_IDIR_1 /*!< Index resets the counter when down-counting only */ 332 /** 333 * @} 334 */ 335 336 /** @defgroup TIMEx_Encoder_Index_Polarity TIM Extended Encoder index polarity 337 * @{ 338 */ 339 #define TIM_ENCODERINDEX_POLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx pin */ 340 #define TIM_ENCODERINDEX_POLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx pin */ 341 /** 342 * @} 343 */ 344 345 /** @defgroup TIMEx_Encoder_Index_Prescaler TIM Extended Encodder index prescaler 346 * @{ 347 */ 348 #define TIM_ENCODERINDEX_PRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */ 349 #define TIM_ENCODERINDEX_PRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR pin: Capture performed once every 2 events. */ 350 #define TIM_ENCODERINDEX_PRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR pin: Capture performed once every 4 events. */ 351 #define TIM_ENCODERINDEX_PRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR pin: Capture performed once every 8 events. */ 352 /** 353 * @} 354 */ 355 356 /** 357 * @} 358 */ 359 /* End of exported constants -------------------------------------------------*/ 360 361 /* Exported macro ------------------------------------------------------------*/ 362 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros 363 * @{ 364 */ 365 366 /** 367 * @brief HELPER macro calculating the prescaler value to achieve the required counter clock frequency. 368 * @note ex: @ref __HAL_TIM_CALC_PSC(80000000, 1000000); 369 * @param __TIMCLK__ timer input clock frequency (in Hz) 370 * @param __CNTCLK__ counter clock frequency (in Hz) 371 * @retval Prescaler value (between Min_Data=0 and Max_Data=65535) 372 */ 373 #define __HAL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__) \ 374 ((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)((__TIMCLK__)/(__CNTCLK__) - 1U) : 0U 375 376 /** 377 * @brief HELPER macro calculating the auto-reload value to achieve the required output signal frequency. 378 * @note ex: @ref __HAL_TIM_CALC_PERIOD(1000000, 0, 10000); 379 * @param __TIMCLK__ timer input clock frequency (in Hz) 380 * @param __PSC__ prescaler 381 * @param __FREQ__ output signal frequency (in Hz) 382 * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535) 383 */ 384 #define __HAL_TIM_CALC_PERIOD(__TIMCLK__, __PSC__, __FREQ__) \ 385 (((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? ((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U)) - 1U) : 0U 386 387 /** 388 * @brief HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required 389 * output signal frequency. 390 * @note ex: @ref __HAL_TIM_CALC_PERIOD_DITHER(1000000, 0, 10000); 391 * @note This macro should be used only if dithering is already enabled 392 * @param __TIMCLK__ timer input clock frequency (in Hz) 393 * @param __PSC__ prescaler 394 * @param __FREQ__ output signal frequency (in Hz) 395 * @retval Auto-reload value (between Min_Data=0 and Max_Data=65519) 396 */ 397 #define __HAL_TIM_CALC_PERIOD_DITHER(__TIMCLK__, __PSC__, __FREQ__) \ 398 (((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? \ 399 (uint32_t)(((uint64_t)(__TIMCLK__)*16/((__FREQ__) * ((__PSC__) + 1U)) - 16U)) : 0U 400 401 /** 402 * @brief HELPER macro calculating the compare value required to achieve the required timer output compare 403 * active/inactive delay. 404 * @note ex: @ref __HAL_TIM_CALC_PULSE(1000000, 0, 10); 405 * @param __TIMCLK__ timer input clock frequency (in Hz) 406 * @param __PSC__ prescaler 407 * @param __DELAY__ timer output compare active/inactive delay (in us) 408 * @retval Compare value (between Min_Data=0 and Max_Data=65535) 409 */ 410 #define __HAL_TIM_CALC_PULSE(__TIMCLK__, __PSC__, __DELAY__) \ 411 ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \ 412 / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) 413 414 /** 415 * @brief HELPER macro calculating the compare value, with dithering feature enabled, to achieve the required timer 416 * output compare active/inactive delay. 417 * @note ex: @ref __HAL_TIM_CALC_PULSE_DITHER(1000000, 0, 10); 418 * @note This macro should be used only if dithering is already enabled 419 * @param __TIMCLK__ timer input clock frequency (in Hz) 420 * @param __PSC__ prescaler 421 * @param __DELAY__ timer output compare active/inactive delay (in us) 422 * @retval Compare value (between Min_Data=0 and Max_Data=65519) 423 */ 424 #define __HAL_TIM_CALC_PULSE_DITHER(__TIMCLK__, __PSC__, __DELAY__) \ 425 ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__) * 16U) \ 426 / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) 427 428 /** 429 * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration 430 * (when the timer operates in one pulse mode). 431 * @note ex: @ref __HAL_TIM_CALC_PERIOD_BY_DELAY(1000000, 0, 10, 20); 432 * @param __TIMCLK__ timer input clock frequency (in Hz) 433 * @param __PSC__ prescaler 434 * @param __DELAY__ timer output compare active/inactive delay (in us) 435 * @param __PULSE__ pulse duration (in us) 436 * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535) 437 */ 438 #define __HAL_TIM_CALC_PERIOD_BY_DELAY(__TIMCLK__, __PSC__, __DELAY__, __PULSE__) \ 439 ((uint32_t)(__HAL_TIM_CALC_PULSE((__TIMCLK__), (__PSC__), (__PULSE__)) \ 440 + __HAL_TIM_CALC_PULSE((__TIMCLK__), (__PSC__), (__DELAY__)))) 441 442 /** 443 * @brief HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required 444 * pulse duration (when the timer operates in one pulse mode). 445 * @note ex: @ref __HAL_TIM_CALC_PERIOD_DITHER_BY_DELAY(1000000, 0, 10, 20); 446 * @note This macro should be used only if dithering is already enabled 447 * @param __TIMCLK__ timer input clock frequency (in Hz) 448 * @param __PSC__ prescaler 449 * @param __DELAY__ timer output compare active/inactive delay (in us) 450 * @param __PULSE__ pulse duration (in us) 451 * @retval Auto-reload value (between Min_Data=0 and Max_Data=65519) 452 */ 453 #define __HAL_TIM_CALC_PERIOD_DITHER_BY_DELAY(__TIMCLK__, __PSC__, __DELAY__, __PULSE__) \ 454 ((uint32_t)(__HAL_TIM_CALC_PULSE_DITHER((__TIMCLK__), (__PSC__), (__PULSE__)) \ 455 + __HAL_TIM_CALC_PULSE_DITHER((__TIMCLK__), (__PSC__), (__DELAY__)))) 456 457 /** 458 * @} 459 */ 460 /* End of exported macro -----------------------------------------------------*/ 461 462 /* Private macro -------------------------------------------------------------*/ 463 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros 464 * @{ 465 */ 466 #define IS_TIM_REMAP(__REMAP__) ((((__REMAP__) & 0xFFFC3FFFU) == 0x00000000U)) 467 #define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \ 468 ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2)) 469 470 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ 471 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ 472 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \ 473 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_MDF1)) 474 475 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \ 476 ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE)) 477 478 #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \ 479 ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH)) 480 481 #define IS_TIM_TISEL(__TISEL__) ((((__TISEL__) & 0xF0F0F0F0U) == 0x00000000U)) 482 483 #define IS_TIM_TISEL_TIX_INSTANCE(INSTANCE, CHANNEL) \ 484 (IS_TIM_CCX_INSTANCE(INSTANCE, CHANNEL) && ((CHANNEL) < TIM_CHANNEL_5)) 485 486 #define IS_TIM_CLOCKSOURCE_INSTANCE(INSTANCE, __CLOCK__) \ 487 ((((INSTANCE) == TIM1) && \ 488 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 489 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 490 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 491 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 492 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 493 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 494 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 495 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 496 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 497 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 498 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 499 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 500 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 501 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8))) \ 502 || \ 503 (((INSTANCE) == TIM2) && \ 504 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 505 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 506 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 507 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 508 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 509 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 510 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 511 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 512 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 513 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 514 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 515 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 516 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 517 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 518 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11))) \ 519 || \ 520 (((INSTANCE) == TIM3) && \ 521 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 522 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 523 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 524 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 525 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 526 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 527 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 528 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 529 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 530 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 531 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 532 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 533 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 534 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8))) \ 535 || \ 536 (((INSTANCE) == TIM4) && \ 537 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 538 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 539 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 540 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 541 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 542 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 543 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 544 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 545 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 546 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 547 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 548 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 549 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 550 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8))) \ 551 || \ 552 (((INSTANCE) == TIM5) && \ 553 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 554 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 555 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 556 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 557 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 558 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 559 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 560 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 561 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 562 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 563 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 564 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 565 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 566 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8))) \ 567 || \ 568 (((INSTANCE) == TIM8) && \ 569 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 570 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 571 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 572 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 573 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 574 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 575 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 576 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 577 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 578 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 579 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 580 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 581 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 582 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8))) \ 583 || \ 584 (((INSTANCE) == TIM15) && \ 585 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 586 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 587 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 588 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 589 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 590 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 591 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 592 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 593 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 594 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 595 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 596 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8)))) 597 598 #define IS_TIM_TRIGGER_INSTANCE(INSTANCE, __SELECTION__) \ 599 ((((INSTANCE) == TIM1) && \ 600 (((__SELECTION__) == TIM_TS_ITR1) || \ 601 ((__SELECTION__) == TIM_TS_ITR2) || \ 602 ((__SELECTION__) == TIM_TS_ITR3) || \ 603 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 604 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 605 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 606 ((__SELECTION__) == TIM_TS_ETRF) || \ 607 ((__SELECTION__) == TIM_TS_ITR4) || \ 608 ((__SELECTION__) == TIM_TS_ITR5) || \ 609 ((__SELECTION__) == TIM_TS_ITR6) || \ 610 ((__SELECTION__) == TIM_TS_ITR7) || \ 611 ((__SELECTION__) == TIM_TS_ITR8))) \ 612 || \ 613 (((INSTANCE) == TIM2) && \ 614 (((__SELECTION__) == TIM_TS_ITR0) || \ 615 ((__SELECTION__) == TIM_TS_ITR2) || \ 616 ((__SELECTION__) == TIM_TS_ITR3) || \ 617 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 618 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 619 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 620 ((__SELECTION__) == TIM_TS_ETRF) || \ 621 ((__SELECTION__) == TIM_TS_ITR4) || \ 622 ((__SELECTION__) == TIM_TS_ITR5) || \ 623 ((__SELECTION__) == TIM_TS_ITR6) || \ 624 ((__SELECTION__) == TIM_TS_ITR7) || \ 625 ((__SELECTION__) == TIM_TS_ITR8))) \ 626 || \ 627 (((INSTANCE) == TIM3) && \ 628 (((__SELECTION__) == TIM_TS_ITR0) || \ 629 ((__SELECTION__) == TIM_TS_ITR1) || \ 630 ((__SELECTION__) == TIM_TS_ITR3) || \ 631 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 632 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 633 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 634 ((__SELECTION__) == TIM_TS_ETRF) || \ 635 ((__SELECTION__) == TIM_TS_ITR4) || \ 636 ((__SELECTION__) == TIM_TS_ITR5) || \ 637 ((__SELECTION__) == TIM_TS_ITR6) || \ 638 ((__SELECTION__) == TIM_TS_ITR7) || \ 639 ((__SELECTION__) == TIM_TS_ITR8))) \ 640 || \ 641 (((INSTANCE) == TIM4) && \ 642 (((__SELECTION__) == TIM_TS_ITR0) || \ 643 ((__SELECTION__) == TIM_TS_ITR1) || \ 644 ((__SELECTION__) == TIM_TS_ITR2) || \ 645 ((__SELECTION__) == TIM_TS_ITR4) || \ 646 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 647 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 648 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 649 ((__SELECTION__) == TIM_TS_ETRF) || \ 650 ((__SELECTION__) == TIM_TS_ITR5) || \ 651 ((__SELECTION__) == TIM_TS_ITR6) || \ 652 ((__SELECTION__) == TIM_TS_ITR7) || \ 653 ((__SELECTION__) == TIM_TS_ITR8))) \ 654 || \ 655 (((INSTANCE) == TIM5) && \ 656 (((__SELECTION__) == TIM_TS_ITR0) || \ 657 ((__SELECTION__) == TIM_TS_ITR1) || \ 658 ((__SELECTION__) == TIM_TS_ITR2) || \ 659 ((__SELECTION__) == TIM_TS_ITR3) || \ 660 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 661 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 662 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 663 ((__SELECTION__) == TIM_TS_ETRF) || \ 664 ((__SELECTION__) == TIM_TS_ITR5) || \ 665 ((__SELECTION__) == TIM_TS_ITR6) || \ 666 ((__SELECTION__) == TIM_TS_ITR7) || \ 667 ((__SELECTION__) == TIM_TS_ITR8))) \ 668 || \ 669 (((INSTANCE) == TIM8) && \ 670 (((__SELECTION__) == TIM_TS_ITR0) || \ 671 ((__SELECTION__) == TIM_TS_ITR1) || \ 672 ((__SELECTION__) == TIM_TS_ITR2) || \ 673 ((__SELECTION__) == TIM_TS_ITR3) || \ 674 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 675 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 676 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 677 ((__SELECTION__) == TIM_TS_ETRF) || \ 678 ((__SELECTION__) == TIM_TS_ITR4) || \ 679 ((__SELECTION__) == TIM_TS_ITR6) || \ 680 ((__SELECTION__) == TIM_TS_ITR7) || \ 681 ((__SELECTION__) == TIM_TS_ITR8))) \ 682 || \ 683 (((INSTANCE) == TIM15) && \ 684 (((__SELECTION__) == TIM_TS_ITR0) || \ 685 ((__SELECTION__) == TIM_TS_ITR1) || \ 686 ((__SELECTION__) == TIM_TS_ITR2) || \ 687 ((__SELECTION__) == TIM_TS_ITR3) || \ 688 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 689 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 690 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 691 ((__SELECTION__) == TIM_TS_ITR4) || \ 692 ((__SELECTION__) == TIM_TS_ITR5) || \ 693 ((__SELECTION__) == TIM_TS_ITR7) || \ 694 ((__SELECTION__) == TIM_TS_ITR8)))) 695 696 #define IS_TIM_INTERNAL_TRIGGEREVENT_INSTANCE(INSTANCE, __SELECTION__) \ 697 ((((INSTANCE) == TIM1) && \ 698 (((__SELECTION__) == TIM_TS_ITR1) || \ 699 ((__SELECTION__) == TIM_TS_ITR2) || \ 700 ((__SELECTION__) == TIM_TS_ITR3) || \ 701 ((__SELECTION__) == TIM_TS_ITR4) || \ 702 ((__SELECTION__) == TIM_TS_ITR5) || \ 703 ((__SELECTION__) == TIM_TS_ITR6) || \ 704 ((__SELECTION__) == TIM_TS_ITR7) || \ 705 ((__SELECTION__) == TIM_TS_ITR8) || \ 706 ((__SELECTION__) == TIM_TS_NONE))) \ 707 || \ 708 (((INSTANCE) == TIM2) && \ 709 (((__SELECTION__) == TIM_TS_ITR0) || \ 710 ((__SELECTION__) == TIM_TS_ITR2) || \ 711 ((__SELECTION__) == TIM_TS_ITR3) || \ 712 ((__SELECTION__) == TIM_TS_ITR4) || \ 713 ((__SELECTION__) == TIM_TS_ITR5) || \ 714 ((__SELECTION__) == TIM_TS_ITR6) || \ 715 ((__SELECTION__) == TIM_TS_ITR7) || \ 716 ((__SELECTION__) == TIM_TS_ITR8) || \ 717 ((__SELECTION__) == TIM_TS_ITR11)|| \ 718 ((__SELECTION__) == TIM_TS_NONE))) \ 719 || \ 720 (((INSTANCE) == TIM3) && \ 721 (((__SELECTION__) == TIM_TS_ITR0) || \ 722 ((__SELECTION__) == TIM_TS_ITR1) || \ 723 ((__SELECTION__) == TIM_TS_ITR3) || \ 724 ((__SELECTION__) == TIM_TS_ITR4) || \ 725 ((__SELECTION__) == TIM_TS_ITR5) || \ 726 ((__SELECTION__) == TIM_TS_ITR6) || \ 727 ((__SELECTION__) == TIM_TS_ITR7) || \ 728 ((__SELECTION__) == TIM_TS_ITR8) || \ 729 ((__SELECTION__) == TIM_TS_NONE))) \ 730 || \ 731 (((INSTANCE) == TIM4) && \ 732 (((__SELECTION__) == TIM_TS_ITR0) || \ 733 ((__SELECTION__) == TIM_TS_ITR1) || \ 734 ((__SELECTION__) == TIM_TS_ITR2) || \ 735 ((__SELECTION__) == TIM_TS_ITR4) || \ 736 ((__SELECTION__) == TIM_TS_ITR5) || \ 737 ((__SELECTION__) == TIM_TS_ITR6) || \ 738 ((__SELECTION__) == TIM_TS_ITR7) || \ 739 ((__SELECTION__) == TIM_TS_ITR8) || \ 740 ((__SELECTION__) == TIM_TS_NONE))) \ 741 || \ 742 (((INSTANCE) == TIM5) && \ 743 (((__SELECTION__) == TIM_TS_ITR0) || \ 744 ((__SELECTION__) == TIM_TS_ITR1) || \ 745 ((__SELECTION__) == TIM_TS_ITR2) || \ 746 ((__SELECTION__) == TIM_TS_ITR3) || \ 747 ((__SELECTION__) == TIM_TS_ITR5) || \ 748 ((__SELECTION__) == TIM_TS_ITR6) || \ 749 ((__SELECTION__) == TIM_TS_ITR7) || \ 750 ((__SELECTION__) == TIM_TS_ITR8) || \ 751 ((__SELECTION__) == TIM_TS_NONE))) \ 752 || \ 753 (((INSTANCE) == TIM8) && \ 754 (((__SELECTION__) == TIM_TS_ITR0) || \ 755 ((__SELECTION__) == TIM_TS_ITR1) || \ 756 ((__SELECTION__) == TIM_TS_ITR2) || \ 757 ((__SELECTION__) == TIM_TS_ITR3) || \ 758 ((__SELECTION__) == TIM_TS_ITR4) || \ 759 ((__SELECTION__) == TIM_TS_ITR6) || \ 760 ((__SELECTION__) == TIM_TS_ITR7) || \ 761 ((__SELECTION__) == TIM_TS_ITR8) || \ 762 ((__SELECTION__) == TIM_TS_NONE))) \ 763 || \ 764 (((INSTANCE) == TIM15) && \ 765 (((__SELECTION__) == TIM_TS_ITR0) || \ 766 ((__SELECTION__) == TIM_TS_ITR1) || \ 767 ((__SELECTION__) == TIM_TS_ITR2) || \ 768 ((__SELECTION__) == TIM_TS_ITR3) || \ 769 ((__SELECTION__) == TIM_TS_ITR4) || \ 770 ((__SELECTION__) == TIM_TS_ITR5) || \ 771 ((__SELECTION__) == TIM_TS_ITR7) || \ 772 ((__SELECTION__) == TIM_TS_ITR8) || \ 773 ((__SELECTION__) == TIM_TS_NONE)))) 774 775 #define IS_TIM_OC_CHANNEL_MODE(__MODE__, __CHANNEL__) \ 776 (IS_TIM_OC_MODE(__MODE__) \ 777 && ((((__MODE__) == TIM_OCMODE_DIRECTION_OUTPUT) || ((__MODE__) == TIM_OCMODE_PULSE_ON_COMPARE)) \ 778 ? (((__CHANNEL__) == TIM_CHANNEL_3) || ((__CHANNEL__) == TIM_CHANNEL_4)) : (1==1)) ) 779 780 #define IS_TIM_PULSEONCOMPARE_CHANNEL(__CHANNEL__) \ 781 (((__CHANNEL__) == TIM_CHANNEL_3) || \ 782 ((__CHANNEL__) == TIM_CHANNEL_4)) 783 784 #define IS_TIM_PULSEONCOMPARE_INSTANCE(INSTANCE) IS_TIM_CC3_INSTANCE(INSTANCE) 785 786 #define IS_TIM_PULSEONCOMPARE_WIDTH(__WIDTH__) ((__WIDTH__) <= 0xFFU) 787 788 #define IS_TIM_PULSEONCOMPARE_WIDTHPRESCALER(__PRESCALER__) ((__PRESCALER__) <= 0x7U) 789 790 #define IS_TIM_SLAVE_PRELOAD_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_SMS_PRELOAD_SOURCE_UPDATE) \ 791 || ((__SOURCE__) == TIM_SMS_PRELOAD_SOURCE_INDEX)) 792 793 #define IS_TIM_ENCODERINDEX_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_ENCODERINDEX_POLARITY_INVERTED) || \ 794 ((__POLARITY__) == TIM_ENCODERINDEX_POLARITY_NONINVERTED)) 795 796 #define IS_TIM_ENCODERINDEX_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV1) || \ 797 ((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV2) || \ 798 ((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV4) || \ 799 ((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV8)) 800 801 #define IS_TIM_ENCODERINDEX_FILTER(__FILTER__) ((__FILTER__) <= 0xFUL) 802 803 #define IS_TIM_ENCODERINDEX_POSITION(__POSITION__) (((__POSITION__) == TIM_ENCODERINDEX_POSITION_00) || \ 804 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_01) || \ 805 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_10) || \ 806 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_11) || \ 807 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_0) || \ 808 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_1)) 809 810 #define IS_TIM_ENCODERINDEX_DIRECTION(__DIRECTION__) (((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_UP_DOWN) || \ 811 ((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_UP) || \ 812 ((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_DOWN)) 813 814 #define IS_TIM_ENCODERINDEX_BLANKING(__BLANKING__) (((__BLANKING__) == TIM_ENCODERINDEX_BLANKING_DISABLE) || \ 815 ((__BLANKING__) == TIM_ENCODERINDEX_BLANKING_TI3) || \ 816 ((__BLANKING__) == TIM_ENCODERINDEX_BLANKING_TI4)) 817 818 /** 819 * @} 820 */ 821 /* End of private macro ------------------------------------------------------*/ 822 823 /* Exported functions --------------------------------------------------------*/ 824 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions 825 * @{ 826 */ 827 828 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions 829 * @brief Timer Hall Sensor functions 830 * @{ 831 */ 832 /* Timer Hall Sensor functions **********************************************/ 833 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig); 834 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); 835 836 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); 837 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); 838 839 /* Blocking mode: Polling */ 840 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); 841 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); 842 /* Non-Blocking mode: Interrupt */ 843 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); 844 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); 845 /* Non-Blocking mode: DMA */ 846 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); 847 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); 848 /** 849 * @} 850 */ 851 852 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions 853 * @brief Timer Complementary Output Compare functions 854 * @{ 855 */ 856 /* Timer Complementary Output Compare functions *****************************/ 857 /* Blocking mode: Polling */ 858 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 859 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 860 861 /* Non-Blocking mode: Interrupt */ 862 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 863 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 864 865 /* Non-Blocking mode: DMA */ 866 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); 867 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 868 /** 869 * @} 870 */ 871 872 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions 873 * @brief Timer Complementary PWM functions 874 * @{ 875 */ 876 /* Timer Complementary PWM functions ****************************************/ 877 /* Blocking mode: Polling */ 878 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 879 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 880 881 /* Non-Blocking mode: Interrupt */ 882 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 883 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 884 /* Non-Blocking mode: DMA */ 885 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); 886 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 887 /** 888 * @} 889 */ 890 891 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions 892 * @brief Timer Complementary One Pulse functions 893 * @{ 894 */ 895 /* Timer Complementary One Pulse functions **********************************/ 896 /* Blocking mode: Polling */ 897 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 898 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 899 900 /* Non-Blocking mode: Interrupt */ 901 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 902 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 903 /** 904 * @} 905 */ 906 907 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions 908 * @brief Peripheral Control functions 909 * @{ 910 */ 911 /* Extended Control functions ************************************************/ 912 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 913 uint32_t CommutationSource); 914 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 915 uint32_t CommutationSource); 916 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 917 uint32_t CommutationSource); 918 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, 919 TIM_MasterConfigTypeDef *sMasterConfig); 920 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, 921 TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); 922 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, 923 TIMEx_BreakInputConfigTypeDef *sBreakInputConfig); 924 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels); 925 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); 926 HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel); 927 HAL_StatusTypeDef HAL_TIMEx_EnableHSE32(TIM_HandleTypeDef *htim); 928 HAL_StatusTypeDef HAL_TIMEx_DisableHSE32(TIM_HandleTypeDef *htim); 929 930 HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput); 931 HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput); 932 HAL_StatusTypeDef HAL_TIMEx_DitheringEnable(TIM_HandleTypeDef *htim); 933 HAL_StatusTypeDef HAL_TIMEx_DitheringDisable(TIM_HandleTypeDef *htim); 934 HAL_StatusTypeDef HAL_TIMEx_OC_ConfigPulseOnCompare(TIM_HandleTypeDef *htim, uint32_t PulseWidthPrescaler, 935 uint32_t PulseWidth); 936 HAL_StatusTypeDef HAL_TIMEx_ConfigSlaveModePreload(TIM_HandleTypeDef *htim, uint32_t Source); 937 HAL_StatusTypeDef HAL_TIMEx_EnableSlaveModePreload(TIM_HandleTypeDef *htim); 938 HAL_StatusTypeDef HAL_TIMEx_DisableSlaveModePreload(TIM_HandleTypeDef *htim); 939 HAL_StatusTypeDef HAL_TIMEx_EnableDeadTimePreload(TIM_HandleTypeDef *htim); 940 HAL_StatusTypeDef HAL_TIMEx_DisableDeadTimePreload(TIM_HandleTypeDef *htim); 941 HAL_StatusTypeDef HAL_TIMEx_ConfigDeadTime(TIM_HandleTypeDef *htim, uint32_t Deadtime); 942 HAL_StatusTypeDef HAL_TIMEx_ConfigAsymmetricalDeadTime(TIM_HandleTypeDef *htim, uint32_t FallingDeadtime); 943 HAL_StatusTypeDef HAL_TIMEx_EnableAsymmetricalDeadTime(TIM_HandleTypeDef *htim); 944 HAL_StatusTypeDef HAL_TIMEx_DisableAsymmetricalDeadTime(TIM_HandleTypeDef *htim); 945 HAL_StatusTypeDef HAL_TIMEx_ConfigEncoderIndex(TIM_HandleTypeDef *htim, 946 TIMEx_EncoderIndexConfigTypeDef *sEncoderIndexConfig); 947 HAL_StatusTypeDef HAL_TIMEx_EnableEncoderIndex(TIM_HandleTypeDef *htim); 948 HAL_StatusTypeDef HAL_TIMEx_DisableEncoderIndex(TIM_HandleTypeDef *htim); 949 HAL_StatusTypeDef HAL_TIMEx_EnableEncoderFirstIndex(TIM_HandleTypeDef *htim); 950 HAL_StatusTypeDef HAL_TIMEx_DisableEncoderFirstIndex(TIM_HandleTypeDef *htim); 951 /** 952 * @} 953 */ 954 955 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions 956 * @brief Extended Callbacks functions 957 * @{ 958 */ 959 /* Extended Callback **********************************************************/ 960 void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim); 961 void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim); 962 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim); 963 void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim); 964 void HAL_TIMEx_EncoderIndexCallback(TIM_HandleTypeDef *htim); 965 void HAL_TIMEx_DirectionChangeCallback(TIM_HandleTypeDef *htim); 966 void HAL_TIMEx_IndexErrorCallback(TIM_HandleTypeDef *htim); 967 void HAL_TIMEx_TransitionErrorCallback(TIM_HandleTypeDef *htim); 968 /** 969 * @} 970 */ 971 972 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions 973 * @brief Extended Peripheral State functions 974 * @{ 975 */ 976 /* Extended Peripheral State functions ***************************************/ 977 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim); 978 HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim, uint32_t ChannelN); 979 /** 980 * @} 981 */ 982 983 /** 984 * @} 985 */ 986 /* End of exported functions -------------------------------------------------*/ 987 988 /* Private functions----------------------------------------------------------*/ 989 /** @addtogroup TIMEx_Private_Functions TIMEx Private Functions 990 * @{ 991 */ 992 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); 993 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma); 994 /** 995 * @} 996 */ 997 /* End of private functions --------------------------------------------------*/ 998 999 /** 1000 * @} 1001 */ 1002 1003 /** 1004 * @} 1005 */ 1006 1007 #ifdef __cplusplus 1008 } 1009 #endif 1010 1011 1012 #endif /* STM32U5xx_HAL_TIM_EX_H */ 1013
