1 /**
2 ******************************************************************************
3 * @file stm32mp1xx_hal_dac.c
4 * @author MCD Application Team
5 * @brief DAC HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Digital to Analog Converter (DAC) peripheral:
8 * + Initialization and de-initialization functions
9 * + IO operation functions
10 * + Peripheral Control functions
11 * + Peripheral State and Errors functions
12 *
13 *
14 @verbatim
15 ==============================================================================
16 ##### DAC Peripheral features #####
17 ==============================================================================
18 [..]
19 *** DAC Channels ***
20 ====================
21 [..]
22 STM32H7 devices integrate two 12-bit Digital Analog Converters.
23
24 The 2 converters (i.e. channel1 & channel2) can be used independently or simultaneously (dual mode):
25 (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip
26 peripherals (ex. OPAMPs, comparators).
27 (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip
28 peripherals (ex. OPAMPs, comparators).
29
30 *** DAC Triggers ***
31 ====================
32 [..]
33 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
34 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
35 [..]
36 Digital to Analog conversion can be triggered by:
37 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
38 The used pin (GPIOx_PIN_9) must be configured in input mode.
39
40
41 (#) Timers TRGO:TIM1,TIM2,TIM4, TIM5, TIM6, TIM7,TIM8 and TIM15
42 (DAC_TRIGGER_T1_TRGO, DAC_TRIGGER_T2_TRGO...)
43
44 (#) Timers TRGO: LPTIM1,LPTIM2
45 (DAC_TRIGGER_LP1_OUT,DAC_TRIGGER_LP2_OUT)
46 (#) Software using DAC_TRIGGER_SOFTWARE
47
48 *** DAC Buffer mode feature ***
49 ===============================
50 [..]
51 Each DAC channel integrates an output buffer that can be used to
52 reduce the output impedance, and to drive external loads directly
53 without having to add an external operational amplifier.
54 To enable, the output buffer use
55 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
56 [..]
57 (@) Refer to the device datasheet for more details about output
58 impedance value with and without output buffer.
59
60 *** DAC connect feature ***
61 ===============================
62 [..]
63 Each DAC channel can be connected internally.
64 To connect, use
65 sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_ENABLE;
66
67 *** GPIO configurations guidelines ***
68 ====================================
69 [..]
70 When a DAC channel is used (ex channel1 on PA4) and the other is not
71 (ex channel2 on PA5 is configured in Analog and disabled).
72 Channel1 may disturb channel2 as coupling effect.
73 Note that there is no coupling on channel2 as soon as channel2 is turned on.
74 Coupling on adjacent channel could be avoided as follows:
75 when unused PA5 is configured as INPUT PULL-UP or DOWN.
76 PA5 is configured in ANALOG just before it is turned on.
77
78 *** DAC Sample and Hold feature ***
79 ===================================
80 [..]
81 For each converter, 2 modes are supported: normal mode and
82 "sample and hold" mode (i.e. low power mode).
83 In the sample and hold mode, the DAC core converts data, then holds the
84 converted voltage on a capacitor. When not converting, the DAC cores and
85 buffer are completely turned off between samples and the DAC output is
86 tri-stated, therefore reducing the overall power consumption. A new
87 stabilization period is needed before each new conversion.
88 [..]
89 The sample and hold allow setting internal or external voltage @
90 low power consumption cost (output value can be at any given rate either
91 by CPU or DMA).
92 [..]
93 The Sample and hold block and registers uses either LSI & run in
94 several power modes: run mode, sleep mode, low power run, low power sleep
95 mode & stop1 mode.
96
97 Low power stop1 mode allows only static conversion.
98
99 To enable Sample and Hold mode
100 Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI &
101 RCC_LSI_ON parameters.
102
103 Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE
104 & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime,
105 DAC_HoldTime & DAC_RefreshTime.
106
107
108 *** DAC calibration feature ***
109 ===================================
110 [..]
111 (#) The 2 converters (channel1 & channel2) provide calibration capabilities.
112 (++) Calibration aims at correcting some offset of output buffer.
113 (++) The DAC uses either factory calibration settings OR user defined
114 calibration (trimming) settings (i.e. trimming mode).
115 (++) The user defined settings can be figured out using self calibration
116 handled by HAL_DACEx_SelfCalibrate.
117 (++) HAL_DACEx_SelfCalibrate:
118 (+++) Runs automatically the calibration.
119 (+++) Enables the user trimming mode
120 (+++) Updates a structure with trimming values with fresh calibration
121 results.
122 The user may store the calibration results for larger
123 (ex monitoring the trimming as a function of temperature
124 for instance)
125
126 *** DAC wave generation feature ***
127 ===================================
128 [..]
129 Both DAC channels can be used to generate:
130 (#) Noise wave
131 (#) Triangle wave
132
133 *** DAC data format ***
134 =======================
135 [..]
136 The DAC data format can be:
137 (#) 8-bit right alignment using DAC_ALIGN_8B_R
138 (#) 12-bit left alignment using DAC_ALIGN_12B_L
139 (#) 12-bit right alignment using DAC_ALIGN_12B_R
140
141 *** DAC data value to voltage correspondence ***
142 ================================================
143 [..]
144 The analog output voltage on each DAC channel pin is determined
145 by the following equation:
146 [..]
147 DAC_OUTx = VREF+ * DOR / 4095
148 (+) with DOR is the Data Output Register
149 [..]
150 VREF+ is the input voltage reference (refer to the device datasheet)
151 [..]
152 e.g. To set DAC_OUT1 to 0.7V:
153 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
154
155 *** DMA requests ***
156 =====================
157 [..]
158 A DMA request can be generated when an external trigger (but not
159 a software trigger) occurs if DMA requests are enabled using
160 HAL_DAC_Start_DMA().
161 DMA requests are mapped as following:
162 (#) DAC channel1: mapped on DMA_REQUEST_DAC1
163 (#) DAC channel2: mapped on DMA_REQUEST_DAC2
164 [..]
165 -@- For Dual mode and specific signal (Triangle and noise) generation please
166 refer to Extended Features Driver description
167
168 *** High frequency interface mode ***
169 =====================================
170 [..]
171 The high frequency interface informs DAC instance about the bus frequency in use.
172 It is mandatory information for DAC (as internal timing of DAC is bus frequency dependent)
173 provided thanks to parameter DAC_HighFrequency handled in HAL_DAC_ConfigChannel () function.
174 Use of DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC value of DAC_HighFrequency is recommended
175 function figured out the correct setting.
176 The high frequency mode is same for all converters of a same DAC instance. Either same
177 parameter DAC_HighFrequency is used for all DAC converters or again self
178 DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC detection parameter.
179
180 [..]
181
182 ##### How to use this driver #####
183 ==============================================================================
184 [..]
185 (+) DAC APB clock must be enabled to get write access to DAC
186 registers using HAL_DAC_Init()
187 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
188 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
189 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions.
190
191 *** Calibration mode IO operation ***
192 ======================================
193 [..]
194 (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset()
195 (+) Run the calibration using HAL_DACEx_SelfCalibrate()
196 (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming()
197
198 *** Polling mode IO operation ***
199 =================================
200 [..]
201 (+) Start the DAC peripheral using HAL_DAC_Start()
202 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
203 (+) Stop the DAC peripheral using HAL_DAC_Stop()
204
205 *** DMA mode IO operation ***
206 ==============================
207 [..]
208 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
209 of data to be transferred at each end of conversion.
210 (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1()or HAL_DACEx_ConvHalfCpltCallbackCh2()
211 function is executed and user can add his own code by customization of function pointer
212 HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2().
213 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1()or HAL_DACEx_ConvHalfCpltCallbackCh2()
214 function is executed and user can add his own code by customization of function pointer
215 HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2().
216 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can
217 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1.
218 (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
219 HAL_DAC_DMAUnderrunCallbackCh1()or HAL_DACEx_DMAUnderrunCallbackCh2()
220 function is executed and user can add his own code by customization of function pointer
221 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2()and
222 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1().
223 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
224
225 *** Callback registration ***
226 =============================================
227 [..]
228 The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1
229 allows the user to configure dynamically the driver callbacks.
230
231 Use Functions @ref HAL_DAC_RegisterCallback() to register a user callback,
232 it allows to register following callbacks:
233 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
234 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
235 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
236 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
237 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
238 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
239 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
240 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
241 (+) MspInitCallback : DAC MspInit.
242 (+) MspDeInitCallback : DAC MspdeInit.
243 This function takes as parameters the HAL peripheral handle, the Callback ID
244 and a pointer to the user callback function.
245
246 Use function @ref HAL_DAC_UnRegisterCallback() to reset a callback to the default
247 weak (surcharged) function. It allows to reset following callbacks:
248 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
249 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
250 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
251 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
252 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
253 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
254 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
255 (+) DMAUnderrunCallbackCh2 : callback when an error underrun occurs on Ch2.
256 (+) MspInitCallback : DAC MspInit.
257 (+) MspDeInitCallback : DAC MspdeInit.
258 (+) All Callbacks
259 This function) takes as parameters the HAL peripheral handle and the Callback ID.
260
261 By default, after the @ref HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET
262 all callbacks are reset to the corresponding legacy weak (surcharged) functions.
263 Exception done for MspInit and MspDeInit callbacks that are respectively
264 reset to the legacy weak (surcharged) functions in the @ref HAL_DAC_Init
265 and @ref HAL_DAC_DeInit only when these callbacks are null (not registered beforehand).
266 If not, MspInit or MspDeInit are not null, the @ref HAL_DAC_Init and @ref HAL_DAC_DeInit
267 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
268
269 Callbacks can be registered/unregistered in READY state only.
270 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
271 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
272 during the Init/DeInit.
273 In that case first register the MspInit/MspDeInit user callbacks
274 using @ref HAL_DAC_RegisterCallback before calling @ref HAL_DAC_DeInit
275 or @ref HAL_DAC_Init function.
276
277 When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or
278 not defined, the callback registering feature is not available
279 and weak (surcharged) callbacks are used.
280 *** DAC HAL driver macros list ***
281 =============================================
282 [..]
283 Below the list of most used macros in DAC HAL driver.
284
285 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
286 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
287 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
288 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
289
290 [..]
291 (@) You can refer to the DAC HAL driver header file for more useful macros
292
293 @endverbatim
294 ******************************************************************************
295 * @attention
296 *
297 * <h2><center>© Copyright (c) 2019 STMicroelectronics.
298 * All rights reserved.</center></h2>
299 *
300 * This software component is licensed by ST under BSD 3-Clause license,
301 * the "License"; You may not use this file except in compliance with the
302 * License. You may obtain a copy of the License at:
303 * opensource.org/licenses/BSD-3-Clause
304 *
305 ******************************************************************************
306 */
307
308
309 /* Includes ------------------------------------------------------------------*/
310 #include "stm32mp1xx_hal.h"
311
312 /** @addtogroup STM32MP1xx_HAL_Driver
313 * @{
314 */
315
316 /** @defgroup DAC DAC
317 * @brief DAC driver modules
318 * @{
319 */
320
321 #ifdef HAL_DAC_MODULE_ENABLED
322
323 /* Private typedef -----------------------------------------------------------*/
324 /* Private define ------------------------------------------------------------*/
325 /* Private constants ---------------------------------------------------------*/
326 /** @addtogroup DAC_Private_Constants DAC Private Constants
327 * @{
328 */
329 #define TIMEOUT_DAC_CALIBCONFIG ((uint32_t)1) /* 1ms */
330 #define HFSEL_ENABLE_THRESHOLD_80MHZ ((uint32_t)80000000) /* 80 mHz */
331
332 /**
333 * @}
334 */
335
336 /* Private macro -------------------------------------------------------------*/
337 /* Private variables ---------------------------------------------------------*/
338 /* Private function prototypes -----------------------------------------------*/
339 /** @defgroup DAC_Private_Functions DAC Private Functions
340 * @{
341 */
342 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
343 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
344 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
345
346 /**
347 * @}
348 */
349 /* Exported functions ---------------------------------------------------------*/
350
351 /** @defgroup DAC_Exported_Functions DAC Exported Functions
352 * @{
353 */
354
355 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
356 * @brief Initialization and Configuration functions
357 *
358 @verbatim
359 ==============================================================================
360 ##### Initialization and de-initialization functions #####
361 ==============================================================================
362 [..] This section provides functions allowing to:
363 (+) Initialize and configure the DAC.
364 (+) De-initialize the DAC.
365
366 @endverbatim
367 * @{
368 */
369
370 /**
371 * @brief Initialize the DAC peripheral according to the specified parameters
372 * in the DAC_InitStruct and initialize the associated handle.
373 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
374 * the configuration information for the specified DAC.
375 * @retval HAL status
376 */
HAL_DAC_Init(DAC_HandleTypeDef * hdac)377 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac)
378 {
379 /* Check DAC handle */
380 if (hdac == NULL)
381 {
382 return HAL_ERROR;
383 }
384 /* Check the parameters */
385 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
386
387 if (hdac->State == HAL_DAC_STATE_RESET)
388 {
389 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
390 /* Init the DAC Callback settings */
391 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
392 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
393 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
394 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
395
396 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
397 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
398 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
399 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
400
401 if (hdac->MspInitCallback == NULL)
402 {
403 hdac->MspInitCallback = HAL_DAC_MspInit;
404 }
405 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
406 /* Allocate lock resource and initialize it */
407 hdac->Lock = HAL_UNLOCKED;
408 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
409 /* Init the low level hardware */
410 hdac->MspInitCallback(hdac);
411 #else
412 /* Init the low level hardware */
413 HAL_DAC_MspInit(hdac);
414 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
415 }
416
417 /* Initialize the DAC state*/
418 hdac->State = HAL_DAC_STATE_BUSY;
419
420 /* Set DAC error code to none */
421 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
422
423 /* Initialize the DAC state*/
424 hdac->State = HAL_DAC_STATE_READY;
425
426 /* Return function status */
427 return HAL_OK;
428 }
429
430 /**
431 * @brief Deinitialize the DAC peripheral registers to their default reset values.
432 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
433 * the configuration information for the specified DAC.
434 * @retval HAL status
435 */
HAL_DAC_DeInit(DAC_HandleTypeDef * hdac)436 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac)
437 {
438 /* Check DAC handle */
439 if (hdac == NULL)
440 {
441 return HAL_ERROR;
442 }
443
444 /* Check the parameters */
445 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
446
447 /* Change DAC state */
448 hdac->State = HAL_DAC_STATE_BUSY;
449
450 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
451 if (hdac->MspDeInitCallback == NULL)
452 {
453 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
454 }
455 /* DeInit the low level hardware */
456 hdac->MspDeInitCallback(hdac);
457 #else
458 /* DeInit the low level hardware */
459 HAL_DAC_MspDeInit(hdac);
460 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
461
462 /* Set DAC error code to none */
463 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
464
465 /* Change DAC state */
466 hdac->State = HAL_DAC_STATE_RESET;
467
468 /* Release Lock */
469 __HAL_UNLOCK(hdac);
470
471 /* Return function status */
472 return HAL_OK;
473 }
474
475 /**
476 * @brief Initialize the DAC MSP.
477 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
478 * the configuration information for the specified DAC.
479 * @retval None
480 */
HAL_DAC_MspInit(DAC_HandleTypeDef * hdac)481 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac)
482 {
483 /* Prevent unused argument(s) compilation warning */
484 UNUSED(hdac);
485 /* NOTE : This function should not be modified, when the callback is needed,
486 the HAL_DAC_MspInit could be implemented in the user file
487 */
488 }
489
490 /**
491 * @brief DeInitialize the DAC MSP.
492 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
493 * the configuration information for the specified DAC.
494 * @retval None
495 */
HAL_DAC_MspDeInit(DAC_HandleTypeDef * hdac)496 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac)
497 {
498 /* Prevent unused argument(s) compilation warning */
499 UNUSED(hdac);
500 /* NOTE : This function should not be modified, when the callback is needed,
501 the HAL_DAC_MspDeInit could be implemented in the user file
502 */
503 }
504
505 /**
506 * @}
507 */
508
509 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
510 * @brief IO operation functions
511 *
512 @verbatim
513 ==============================================================================
514 ##### IO operation functions #####
515 ==============================================================================
516 [..] This section provides functions allowing to:
517 (+) Start conversion.
518 (+) Stop conversion.
519 (+) Start conversion and enable DMA transfer.
520 (+) Stop conversion and disable DMA transfer.
521 (+) Set the specified data holding register value for DAC channel.
522
523
524 @endverbatim
525 * @{
526 */
527
528 /**
529 * @brief Enable DAC and start conversion of channel.
530 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
531 * the configuration information for the specified DAC.
532 * @param Channel The selected DAC channel.
533 * This parameter can be one of the following values:
534 * @arg DAC_CHANNEL_1: DAC Channel1 selected
535 * @arg DAC_CHANNEL_2: DAC Channel2 selected
536 * @retval HAL status
537 */
HAL_DAC_Start(DAC_HandleTypeDef * hdac,uint32_t Channel)538 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel)
539 {
540
541 /* Check the parameters */
542 assert_param(IS_DAC_CHANNEL(Channel));
543
544 /* Process locked */
545 __HAL_LOCK(hdac);
546
547 /* Change DAC state */
548 hdac->State = HAL_DAC_STATE_BUSY;
549
550 /* Enable the Peripheral */
551 __HAL_DAC_ENABLE(hdac, Channel);
552
553 if (Channel == DAC_CHANNEL_1)
554 {
555
556 /* Check if software trigger enabled */
557 if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_CR_TEN1)
558 {
559 /* Enable the selected DAC software conversion */
560 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
561 }
562 }
563 else
564 {
565 /* Check if software trigger enabled */
566 if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == DAC_CR_TEN2)
567 {
568 /* Enable the selected DAC software conversion*/
569 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
570 }
571 }
572
573 /* Change DAC state */
574 hdac->State = HAL_DAC_STATE_READY;
575
576 /* Process unlocked */
577 __HAL_UNLOCK(hdac);
578
579 /* Return function status */
580 return HAL_OK;
581 }
582
583 /**
584 * @brief Disable DAC and stop conversion of channel.
585 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
586 * the configuration information for the specified DAC.
587 * @param Channel The selected DAC channel.
588 * This parameter can be one of the following values:
589 * @arg DAC_CHANNEL_1: DAC Channel1 selected
590 * @arg DAC_CHANNEL_2: DAC Channel2 selected
591 * @retval HAL status
592 */
HAL_DAC_Stop(DAC_HandleTypeDef * hdac,uint32_t Channel)593 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel)
594 {
595 /* Check the parameters */
596 assert_param(IS_DAC_CHANNEL(Channel));
597
598 /* Disable the Peripheral */
599 __HAL_DAC_DISABLE(hdac, Channel);
600
601 /* Change DAC state */
602 hdac->State = HAL_DAC_STATE_READY;
603
604 /* Return function status */
605 return HAL_OK;
606 }
607
608 /**
609 * @brief Enable DAC and start conversion of channel.
610 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
611 * the configuration information for the specified DAC.
612 * @param Channel The selected DAC channel.
613 * This parameter can be one of the following values:
614 * @arg DAC_CHANNEL_1: DAC Channel1 selected
615 * @arg DAC_CHANNEL_2: DAC Channel2 selected
616 * @param pData The destination peripheral Buffer address.
617 * @param Length The length of data to be transferred from memory to DAC peripheral
618 * @param Alignment Specifies the data alignment for DAC channel.
619 * This parameter can be one of the following values:
620 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
621 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
622 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
623 * @retval HAL status
624 */
HAL_DAC_Start_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t * pData,uint32_t Length,uint32_t Alignment)625 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length, uint32_t Alignment)
626 {
627 uint32_t tmpreg = 0;
628 HAL_StatusTypeDef status = HAL_OK;
629 HAL_StatusTypeDef status_callee;
630
631 /* Check the parameters */
632 assert_param(IS_DAC_CHANNEL(Channel));
633 assert_param(IS_DAC_ALIGN(Alignment));
634
635 /* Process locked */
636 __HAL_LOCK(hdac);
637
638 /* Change DAC state */
639 hdac->State = HAL_DAC_STATE_BUSY;
640
641 if (Channel == DAC_CHANNEL_1)
642 {
643 /* Set the DMA transfer complete callback for channel1 */
644 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
645
646 /* Set the DMA half transfer complete callback for channel1 */
647 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
648
649 /* Set the DMA error callback for channel1 */
650 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
651
652 /* Enable the selected DAC channel1 DMA request */
653 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
654
655 /* Case of use of channel 1 */
656 switch (Alignment)
657 {
658 case DAC_ALIGN_12B_R:
659 /* Get DHR12R1 address */
660 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
661 break;
662 case DAC_ALIGN_12B_L:
663 /* Get DHR12L1 address */
664 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
665 break;
666 case DAC_ALIGN_8B_R:
667 /* Get DHR8R1 address */
668 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
669 break;
670 default:
671 break;
672 }
673 }
674 else
675 {
676 /* Set the DMA transfer complete callback for channel2 */
677 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
678
679 /* Set the DMA half transfer complete callback for channel2 */
680 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
681
682 /* Set the DMA error callback for channel2 */
683 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
684
685 /* Enable the selected DAC channel2 DMA request */
686 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
687
688 /* Case of use of channel 2 */
689 switch (Alignment)
690 {
691 case DAC_ALIGN_12B_R:
692 /* Get DHR12R2 address */
693 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
694 break;
695 case DAC_ALIGN_12B_L:
696 /* Get DHR12L2 address */
697 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
698 break;
699 case DAC_ALIGN_8B_R:
700 /* Get DHR8R2 address */
701 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
702 break;
703 default:
704 break;
705 }
706 }
707
708 /* Enable the DMA Stream */
709 if (Channel == DAC_CHANNEL_1)
710 {
711 /* Enable the DAC DMA underrun interrupt */
712 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
713
714 /* Enable the DMA Stream */
715 status_callee = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
716 }
717 else
718 {
719 /* Enable the DAC DMA underrun interrupt */
720 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
721
722 /* Enable the DMA Stream */
723 status_callee = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
724 }
725
726 /* Check if DMA Channel effectively enabled */
727 if (status_callee != HAL_OK)
728 {
729 /* Process Unlocked */
730 __HAL_UNLOCK(hdac);
731
732 /* Update DAC state machine to error */
733 hdac->State = HAL_DAC_STATE_ERROR;
734
735 /* update function status */
736 status = HAL_ERROR;
737 }
738 else
739 {
740 /* Process Unlocked */
741 __HAL_UNLOCK(hdac);
742
743 /* Enable the Peripheral */
744 __HAL_DAC_ENABLE(hdac, Channel);
745
746 /* Change DAC state */
747 hdac->State = HAL_DAC_STATE_READY;
748 }
749
750 /* Return function status */
751 return status;
752 }
753
754 /**
755 * @brief Disable DAC and stop conversion of channel.
756 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
757 * the configuration information for the specified DAC.
758 * @param Channel The selected DAC channel.
759 * This parameter can be one of the following values:
760 * @arg DAC_CHANNEL_1: DAC Channel1 selected
761 * @arg DAC_CHANNEL_2: DAC Channel2 selected
762 * @retval HAL status
763 */
HAL_DAC_Stop_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel)764 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel)
765 {
766 HAL_StatusTypeDef status;
767
768 /* Check the parameters */
769 assert_param(IS_DAC_CHANNEL(Channel));
770
771 /* Disable the selected DAC channel DMA request */
772 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << Channel);
773
774 /* Disable the Peripheral */
775 __HAL_DAC_DISABLE(hdac, Channel);
776
777 /* Disable the DMA stream */
778 /* Channel1 is used */
779 if (Channel == DAC_CHANNEL_1)
780 {
781 /* Disable the DMA stream */
782 status = HAL_DMA_Abort(hdac->DMA_Handle1);
783 /* Disable the DAC DMA underrun interrupt */
784 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
785 }
786 else /* Channel2 is used for */
787 {
788 /* Disable the DMA stream */
789 status = HAL_DMA_Abort(hdac->DMA_Handle2);
790 /* Disable the DAC DMA underrun interrupt */
791 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
792 }
793
794 /* Check if DMA Channel effectively disabled */
795 if (status != HAL_OK)
796 {
797 /* Update DAC state machine to error */
798 hdac->State = HAL_DAC_STATE_ERROR;
799 }
800 else
801 {
802 /* Change DAC state */
803 hdac->State = HAL_DAC_STATE_READY;
804 }
805
806 /* Return function status */
807 return status;
808 }
809
810 /**
811 * @brief Handle DAC interrupt request
812 * This function uses the interruption of DMA
813 * underrun.
814 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
815 * the configuration information for the specified DAC.
816 * @retval None
817 */
HAL_DAC_IRQHandler(DAC_HandleTypeDef * hdac)818 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac)
819 {
820 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
821 {
822 /* Check underrun flag of DAC channel 1 */
823 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
824 {
825 /* Change DAC state to error state */
826 hdac->State = HAL_DAC_STATE_ERROR;
827
828 /* Set DAC error code to chanel1 DMA underrun error */
829 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
830
831 /* Clear the underrun flag */
832 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1);
833
834 /* Disable the selected DAC channel1 DMA request */
835 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
836
837 /* Error callback */
838 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
839 hdac->DMAUnderrunCallbackCh1(hdac);
840 #else
841 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
842 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
843 }
844 }
845 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
846 {
847 /* Check underrun flag of DAC channel 2 */
848 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
849 {
850 /* Change DAC state to error state */
851 hdac->State = HAL_DAC_STATE_ERROR;
852
853 /* Set DAC error code to channel2 DMA underrun error */
854 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
855
856 /* Clear the underrun flag */
857 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2);
858
859 /* Disable the selected DAC channel1 DMA request */
860 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
861
862 /* Error callback */
863 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
864 hdac->DMAUnderrunCallbackCh2(hdac);
865 #else
866 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
867 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
868 }
869 }
870 }
871
872 /**
873 * @brief Set the specified data holding register value for DAC channel.
874 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
875 * the configuration information for the specified DAC.
876 * @param Channel The selected DAC channel.
877 * This parameter can be one of the following values:
878 * @arg DAC_CHANNEL_1: DAC Channel1 selected
879 * @arg DAC_CHANNEL_2: DAC Channel2 selected
880 * @param Alignment Specifies the data alignment.
881 * This parameter can be one of the following values:
882 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
883 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
884 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
885 * @param Data Data to be loaded in the selected data holding register.
886 * @retval HAL status
887 */
HAL_DAC_SetValue(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t Alignment,uint32_t Data)888 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
889 {
890 __IO uint32_t tmp = 0;
891
892 /* Check the parameters */
893 assert_param(IS_DAC_CHANNEL(Channel));
894 assert_param(IS_DAC_ALIGN(Alignment));
895 assert_param(IS_DAC_DATA(Data));
896
897 tmp = (uint32_t)hdac->Instance;
898 if (Channel == DAC_CHANNEL_1)
899 {
900 tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
901 }
902 else
903 {
904 tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
905 }
906
907 /* Set the DAC channel selected data holding register */
908 *(__IO uint32_t *) tmp = Data;
909
910 /* Return function status */
911 return HAL_OK;
912 }
913
914 /**
915 * @brief Conversion complete callback in non-blocking mode for Channel1
916 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
917 * the configuration information for the specified DAC.
918 * @retval None
919 */
HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef * hdac)920 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac)
921 {
922 /* Prevent unused argument(s) compilation warning */
923 UNUSED(hdac);
924
925 /* NOTE : This function should not be modified, when the callback is needed,
926 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
927 */
928 }
929
930 /**
931 * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1
932 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
933 * the configuration information for the specified DAC.
934 * @retval None
935 */
HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef * hdac)936 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac)
937 {
938 /* Prevent unused argument(s) compilation warning */
939 UNUSED(hdac);
940
941 /* NOTE : This function should not be modified, when the callback is needed,
942 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
943 */
944 }
945
946 /**
947 * @brief Error DAC callback for Channel1.
948 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
949 * the configuration information for the specified DAC.
950 * @retval None
951 */
HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef * hdac)952 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
953 {
954 /* Prevent unused argument(s) compilation warning */
955 UNUSED(hdac);
956
957 /* NOTE : This function should not be modified, when the callback is needed,
958 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
959 */
960 }
961
962 /**
963 * @brief DMA underrun DAC callback for channel1.
964 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
965 * the configuration information for the specified DAC.
966 * @retval None
967 */
HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef * hdac)968 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
969 {
970 /* Prevent unused argument(s) compilation warning */
971 UNUSED(hdac);
972
973 /* NOTE : This function should not be modified, when the callback is needed,
974 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
975 */
976 }
977
978 /**
979 * @}
980 */
981
982 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
983 * @brief Peripheral Control functions
984 *
985 @verbatim
986 ==============================================================================
987 ##### Peripheral Control functions #####
988 ==============================================================================
989 [..] This section provides functions allowing to:
990 (+) Configure channels.
991 (+) Get result of conversion.
992
993 @endverbatim
994 * @{
995 */
996
997
998 /**
999 * @brief Return the last data output value of the selected DAC channel.
1000 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1001 * the configuration information for the specified DAC.
1002 * @param Channel The selected DAC channel.
1003 * This parameter can be one of the following values:
1004 * @arg DAC_CHANNEL_1: DAC Channel1 selected
1005 * @arg DAC_CHANNEL_2: DAC Channel2 selected
1006 * @retval The selected DAC channel data output value.
1007 */
HAL_DAC_GetValue(DAC_HandleTypeDef * hdac,uint32_t Channel)1008 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel)
1009 {
1010 /* Check the parameters */
1011 assert_param(IS_DAC_CHANNEL(Channel));
1012
1013 /* Returns the DAC channel data output register value */
1014 if (Channel == DAC_CHANNEL_1)
1015 {
1016 return hdac->Instance->DOR1;
1017 }
1018 else
1019 {
1020 return hdac->Instance->DOR2;
1021 }
1022 }
1023 /**
1024 * @brief Configure the selected DAC channel.
1025 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1026 * the configuration information for the specified DAC.
1027 * @param sConfig DAC configuration structure.
1028 * @param Channel The selected DAC channel.
1029 * This parameter can be one of the following values:
1030 * @arg DAC_CHANNEL_1: DAC Channel1 selected
1031 * @arg DAC_CHANNEL_2: DAC Channel2 selected
1032 * @retval HAL status
1033 */
HAL_DAC_ConfigChannel(DAC_HandleTypeDef * hdac,DAC_ChannelConfTypeDef * sConfig,uint32_t Channel)1034 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
1035 {
1036 uint32_t tmpreg1, tmpreg2;
1037 uint32_t tickstart = 0;
1038 uint32_t pclk1freq = 0;
1039
1040 /* Check the DAC parameters */
1041 assert_param(IS_DAC_HIGH_FREQUENCY_MODE(sConfig->DAC_HighFrequency));
1042 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
1043 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
1044 assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral));
1045 assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming));
1046 if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER)
1047 {
1048 assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue));
1049 }
1050 assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold));
1051 if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE)
1052 {
1053 assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime));
1054 assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime));
1055 assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime));
1056 }
1057 assert_param(IS_DAC_CHANNEL(Channel));
1058
1059 /* Process locked */
1060 __HAL_LOCK(hdac);
1061
1062 /* Change DAC state */
1063 hdac->State = HAL_DAC_STATE_BUSY;
1064
1065 if (sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
1066 /* Sample on old configuration */
1067 {
1068 /* SampleTime */
1069 if (Channel == DAC_CHANNEL_1)
1070 {
1071 /* Get timeout */
1072 tickstart = HAL_GetTick();
1073
1074
1075 /* SHSR1 can be written when BWST1 equals RESET */
1076 while (((hdac->Instance->SR) & DAC_SR_BWST1) != 0U)
1077 {
1078 /* Check for the Timeout */
1079 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1080 {
1081 /* Update error code */
1082 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1083
1084 /* Change the DMA state */
1085 hdac->State = HAL_DAC_STATE_TIMEOUT;
1086
1087 return HAL_TIMEOUT;
1088 }
1089 }
1090 HAL_Delay(1);
1091 hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1092 }
1093 else /* Channel 2 */
1094 {
1095 /* SHSR2 can be written when BWST2 equals RESET */
1096
1097 while (((hdac->Instance->SR) & DAC_SR_BWST2) != 0U)
1098 {
1099 /* Check for the Timeout */
1100 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1101 {
1102 /* Update error code */
1103 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1104
1105 /* Change the DMA state */
1106 hdac->State = HAL_DAC_STATE_TIMEOUT;
1107
1108 return HAL_TIMEOUT;
1109 }
1110 }
1111 HAL_Delay(1U);
1112 hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1113 }
1114 /* HoldTime */
1115 hdac->Instance->SHHR = (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime) << Channel;
1116 /* RefreshTime */
1117 hdac->Instance->SHRR = (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime) << Channel;
1118 }
1119
1120 if (sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
1121 /* USER TRIMMING */
1122 {
1123 /* Get the DAC CCR value */
1124 tmpreg1 = hdac->Instance->CCR;
1125 /* Clear trimming value */
1126 tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << Channel);
1127 /* Configure for the selected trimming offset */
1128 tmpreg2 = sConfig->DAC_TrimmingValue;
1129 /* Calculate CCR register value depending on DAC_Channel */
1130 tmpreg1 |= tmpreg2 << Channel;
1131 /* Write to DAC CCR */
1132 hdac->Instance->CCR = tmpreg1;
1133 }
1134 /* else factory trimming is used (factory setting are available at reset)*/
1135 /* SW Nothing has nothing to do */
1136
1137 /* Get the DAC MCR value */
1138 tmpreg1 = hdac->Instance->MCR;
1139 /* Clear DAC_MCR_MODE2_0, DAC_MCR_MODE2_1 and DAC_MCR_MODE2_2 bits */
1140 tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << Channel);
1141 /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
1142 tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | sConfig->DAC_ConnectOnChipPeripheral);
1143 /* Calculate MCR register value depending on DAC_Channel */
1144 tmpreg1 |= tmpreg2 << Channel;
1145 /* Write to DAC MCR */
1146 hdac->Instance->MCR = tmpreg1;
1147
1148 /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
1149 CLEAR_BIT(hdac->Instance->CR, DAC_CR_CEN1 << Channel);
1150
1151 /* Get the DAC CR value */
1152 tmpreg1 = hdac->Instance->CR;
1153 /* Clear TENx, TSELx, WAVEx and MAMPx bits */
1154 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << Channel);
1155 /* Configure for the selected DAC channel: trigger */
1156 /* Set TSELx and TENx bits according to DAC_Trigger value */
1157 tmpreg2 = (sConfig->DAC_Trigger);
1158 /* Calculate CR register value depending on DAC_Channel */
1159 tmpreg1 |= tmpreg2 << Channel;
1160
1161 if (DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ == sConfig->DAC_HighFrequency)
1162 {
1163 tmpreg1 |= DAC_CR_HFSEL;
1164 }
1165 else
1166 {
1167 if (DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE == sConfig->DAC_HighFrequency)
1168 {
1169 tmpreg1 &= ~(DAC_CR_HFSEL);
1170 }
1171 else /* Automatic selection */
1172 {
1173 pclk1freq = HAL_RCC_GetPCLK1Freq();
1174 if (pclk1freq > HFSEL_ENABLE_THRESHOLD_80MHZ)
1175 {
1176 /* High frequency enable when HCLK frequency higher than 80 */
1177 tmpreg1 |= DAC_CR_HFSEL;
1178 }
1179 else
1180 {
1181 /* High frequency disable when HCLK frequency higher than 80 */
1182 tmpreg1 &= ~(DAC_CR_HFSEL);
1183 }
1184 }
1185 }
1186
1187 /* Write to DAC CR */
1188 hdac->Instance->CR = tmpreg1;
1189
1190 /* Disable wave generation */
1191 hdac->Instance->CR &= ~(DAC_CR_WAVE1 << Channel);
1192
1193 /* Change DAC state */
1194 hdac->State = HAL_DAC_STATE_READY;
1195
1196 /* Process unlocked */
1197 __HAL_UNLOCK(hdac);
1198
1199 /* Return function status */
1200 return HAL_OK;
1201 }
1202
1203
1204
1205 /**
1206 * @}
1207 */
1208
1209 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
1210 * @brief Peripheral State and Errors functions
1211 *
1212 @verbatim
1213 ==============================================================================
1214 ##### Peripheral State and Errors functions #####
1215 ==============================================================================
1216 [..]
1217 This subsection provides functions allowing to
1218 (+) Check the DAC state.
1219 (+) Check the DAC Errors.
1220
1221 @endverbatim
1222 * @{
1223 */
1224
1225 /**
1226 * @brief return the DAC handle state
1227 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1228 * the configuration information for the specified DAC.
1229 * @retval HAL state
1230 */
HAL_DAC_GetState(DAC_HandleTypeDef * hdac)1231 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac)
1232 {
1233 /* Return DAC handle state */
1234 return hdac->State;
1235 }
1236
1237 /**
1238 * @brief Return the DAC error code
1239 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1240 * the configuration information for the specified DAC.
1241 * @retval DAC Error Code
1242 */
HAL_DAC_GetError(DAC_HandleTypeDef * hdac)1243 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
1244 {
1245 return hdac->ErrorCode;
1246 }
1247
1248 /**
1249 * @}
1250 */
1251 /** @addtogroup DAC_Exported_Functions_Group5 Register Callback
1252 * @{
1253 */
1254 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1255 /**
1256 * @brief Register a User DAC Callback
1257 * To be used instead of the weak (surcharged) predefined callback
1258 * @param hdac DAC handle
1259 * @param CallbackId ID of the callback to be registered
1260 * This parameter can be one of the following values:
1261 * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID
1262 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID
1263 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1264 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1265 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1266 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1267 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1268 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1269 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1270 * @arg @ref HAL_DAC_MSP_INIT_CB_ID DAC MSP Init Callback ID
1271 * @arg @ref HAL_DAC_MSP_DEINIT_CB_ID DAC MSP DeInit Callback ID
1272 *
1273 * @param pCallback pointer to the Callback function
1274 * @retval status
1275 */
HAL_DAC_RegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackId,pDAC_CallbackTypeDef pCallback)1276 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackId, pDAC_CallbackTypeDef pCallback)
1277 {
1278 HAL_StatusTypeDef status = HAL_OK;
1279
1280 if (pCallback == NULL)
1281 {
1282 /* Update the error code */
1283 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1284 return HAL_ERROR;
1285 }
1286
1287 /* Process locked */
1288 __HAL_LOCK(hdac);
1289
1290 if (hdac->State == HAL_DAC_STATE_READY)
1291 {
1292 switch (CallbackId)
1293 {
1294 case HAL_DAC_CH1_COMPLETE_CB_ID :
1295 hdac->ConvCpltCallbackCh1 = pCallback;
1296 break;
1297 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1298 hdac->ConvHalfCpltCallbackCh1 = pCallback;
1299 break;
1300 case HAL_DAC_CH1_ERROR_ID :
1301 hdac->ErrorCallbackCh1 = pCallback;
1302 break;
1303 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1304 hdac->DMAUnderrunCallbackCh1 = pCallback;
1305 break;
1306 case HAL_DAC_CH2_COMPLETE_CB_ID :
1307 hdac->ConvCpltCallbackCh2 = pCallback;
1308 break;
1309 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1310 hdac->ConvHalfCpltCallbackCh2 = pCallback;
1311 break;
1312 case HAL_DAC_CH2_ERROR_ID :
1313 hdac->ErrorCallbackCh2 = pCallback;
1314 break;
1315 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1316 hdac->DMAUnderrunCallbackCh2 = pCallback;
1317 break;
1318 case HAL_DAC_MSP_INIT_CB_ID :
1319 hdac->MspInitCallback = pCallback;
1320 break;
1321 case HAL_DAC_MSP_DEINIT_CB_ID :
1322 hdac->MspDeInitCallback = pCallback;
1323 break;
1324 default :
1325 /* Update the error code */
1326 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1327 /* update return status */
1328 status = HAL_ERROR;
1329 break;
1330 }
1331 }
1332 else if (hdac->State == HAL_DAC_STATE_RESET)
1333 {
1334 switch (CallbackId)
1335 {
1336 case HAL_DAC_MSP_INIT_CB_ID :
1337 hdac->MspInitCallback = pCallback;
1338 break;
1339 case HAL_DAC_MSP_DEINIT_CB_ID :
1340 hdac->MspDeInitCallback = pCallback;
1341 break;
1342 default :
1343 /* Update the error code */
1344 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1345 /* update return status */
1346 status = HAL_ERROR;
1347 break;
1348 }
1349 }
1350 else
1351 {
1352 /* Update the error code */
1353 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1354 /* update return status */
1355 status = HAL_ERROR;
1356 }
1357
1358 /* Release Lock */
1359 __HAL_UNLOCK(hdac);
1360 return status;
1361 }
1362
1363 /**
1364 * @brief Unregister a User DAC Callback
1365 * DAC Callback is redirected to the weak (surcharged) predefined callback
1366 * @param hdac DAC handle
1367 * @param CallbackId ID of the callback to be unregistered
1368 * This parameter can be one of the following values:
1369 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 tranfer Complete Callback ID
1370 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1371 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1372 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1373 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1374 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1375 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1376 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1377 * @arg @ref HAL_DAC_MSP_INIT_CB_ID DAC MSP Init Callback ID
1378 * @arg @ref HAL_DAC_MSP_DEINIT_CB_ID DAC MSP DeInit Callback ID
1379 * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks
1380 * @retval status
1381 */
HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackId)1382 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackId)
1383 {
1384 HAL_StatusTypeDef status = HAL_OK;
1385
1386 /* Process locked */
1387 __HAL_LOCK(hdac);
1388
1389 if (hdac->State == HAL_DAC_STATE_READY)
1390 {
1391 switch (CallbackId)
1392 {
1393 case HAL_DAC_CH1_COMPLETE_CB_ID :
1394 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1395 break;
1396 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1397 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1398 break;
1399 case HAL_DAC_CH1_ERROR_ID :
1400 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1401 break;
1402 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1403 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1404 break;
1405 case HAL_DAC_CH2_COMPLETE_CB_ID :
1406 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1407 break;
1408 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1409 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1410 break;
1411 case HAL_DAC_CH2_ERROR_ID :
1412 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1413 break;
1414 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1415 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1416 break;
1417 case HAL_DAC_MSP_INIT_CB_ID :
1418 hdac->MspInitCallback = HAL_DAC_MspInit;
1419 break;
1420 case HAL_DAC_MSP_DEINIT_CB_ID :
1421 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1422 break;
1423 case HAL_DAC_ALL_CB_ID :
1424 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1425 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1426 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1427 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1428 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1429 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1430 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1431 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1432 hdac->MspInitCallback = HAL_DAC_MspInit;
1433 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1434 break;
1435 default :
1436 /* Update the error code */
1437 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1438 /* update return status */
1439 status = HAL_ERROR;
1440 break;
1441 }
1442 }
1443 else if (hdac->State == HAL_DAC_STATE_RESET)
1444 {
1445 switch (CallbackId)
1446 {
1447 case HAL_DAC_MSP_INIT_CB_ID :
1448 hdac->MspInitCallback = HAL_DAC_MspInit;
1449 break;
1450 case HAL_DAC_MSP_DEINIT_CB_ID :
1451 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1452 break;
1453 default :
1454 /* Update the error code */
1455 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1456 /* update return status */
1457 status = HAL_ERROR;
1458 break;
1459 }
1460 }
1461 else
1462 {
1463 /* Update the error code */
1464 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1465 /* update return status */
1466 status = HAL_ERROR;
1467 }
1468
1469 /* Release Lock */
1470 __HAL_UNLOCK(hdac);
1471 return status;
1472 }
1473 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1474 /**
1475 * @}
1476 */
1477
1478 /**
1479 * @}
1480 */
1481
1482
1483 /** @addtogroup DAC_Private_Functions
1484 * @{
1485 */
1486
1487 /**
1488 * @brief DMA conversion complete callback.
1489 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1490 * the configuration information for the specified DMA module.
1491 * @retval None
1492 */
DAC_DMAConvCpltCh1(DMA_HandleTypeDef * hdma)1493 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
1494 {
1495 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1496
1497 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1498 hdac->ConvCpltCallbackCh1(hdac);
1499 #else
1500 HAL_DAC_ConvCpltCallbackCh1(hdac);
1501 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1502
1503 hdac->State = HAL_DAC_STATE_READY;
1504 }
1505
1506 /**
1507 * @brief DMA half transfer complete callback.
1508 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1509 * the configuration information for the specified DMA module.
1510 * @retval None
1511 */
DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef * hdma)1512 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
1513 {
1514 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1515 /* Conversion complete callback */
1516 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1517 hdac->ConvHalfCpltCallbackCh1(hdac);
1518 #else
1519 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
1520 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1521 }
1522
1523 /**
1524 * @brief DMA error callback
1525 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1526 * the configuration information for the specified DMA module.
1527 * @retval None
1528 */
DAC_DMAErrorCh1(DMA_HandleTypeDef * hdma)1529 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
1530 {
1531 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1532
1533 /* Set DAC error code to DMA error */
1534 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
1535
1536 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1537 hdac->ErrorCallbackCh1(hdac);
1538 #else
1539 HAL_DAC_ErrorCallbackCh1(hdac);
1540 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1541
1542 hdac->State = HAL_DAC_STATE_READY;
1543 }
1544
1545 /**
1546 * @}
1547 */
1548
1549 #endif /* HAL_DAC_MODULE_ENABLED */
1550
1551 /**
1552 * @}
1553 */
1554
1555 /**
1556 * @}
1557 */
1558
1559 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1560
