1 /** 2 ****************************************************************************** 3 * @file stm32mp1xx_hal_dac.h 4 * @author MCD Application Team 5 * @brief Header file of DAC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32MP1xx_HAL_DAC_H 22 #define STM32MP1xx_HAL_DAC_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 29 /* Includes ------------------------------------------------------------------*/ 30 #include "stm32mp1xx_hal_def.h" 31 32 /** @addtogroup STM32MP1xx_HAL_Driver 33 * @{ 34 */ 35 36 /** @addtogroup DAC 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 42 /** @defgroup DAC_Exported_Types DAC Exported Types 43 * @{ 44 */ 45 46 /** 47 * @brief HAL State structures definition 48 */ 49 typedef enum 50 { 51 HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */ 52 HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */ 53 HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */ 54 HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */ 55 HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */ 56 57 } HAL_DAC_StateTypeDef; 58 59 /** 60 * @brief DAC handle Structure definition 61 */ 62 typedef struct __DAC_HandleTypeDef 63 { 64 DAC_TypeDef *Instance; /*!< Register base address */ 65 66 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ 67 68 HAL_LockTypeDef Lock; /*!< DAC locking object */ 69 70 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ 71 72 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ 73 74 __IO uint32_t ErrorCode; /*!< DAC Error code */ 75 76 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 77 void (* ConvCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 78 void (* ConvHalfCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 79 void (* ErrorCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 80 void (* DMAUnderrunCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 81 void (* ConvCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 82 void (* ConvHalfCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 83 void (* ErrorCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 84 void (* DMAUnderrunCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 85 86 void (* MspInitCallback)(struct __DAC_HandleTypeDef *hdac); 87 void (* MspDeInitCallback)(struct __DAC_HandleTypeDef *hdac); 88 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 89 90 } DAC_HandleTypeDef; 91 92 /** 93 * @brief DAC Configuration sample and hold Channel structure definition 94 */ 95 typedef struct 96 { 97 uint32_t DAC_SampleTime ; /*!< Specifies the Sample time for the selected channel. 98 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 99 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 100 101 uint32_t DAC_HoldTime ; /*!< Specifies the hold time for the selected channel 102 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 103 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 104 105 uint32_t DAC_RefreshTime ; /*!< Specifies the refresh time for the selected channel 106 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 107 This parameter must be a number between Min_Data = 0 and Max_Data = 255 */ 108 } 109 DAC_SampleAndHoldConfTypeDef; 110 111 /** 112 * @brief DAC Configuration regular Channel structure definition 113 */ 114 typedef struct 115 { 116 uint32_t DAC_HighFrequency; /*!< Specifies the frequency interface mode 117 This parameter can be a value of @ref DAC_HighFrequency */ 118 119 uint32_t DAC_SampleAndHold; /*!< Specifies whether the DAC mode. 120 This parameter can be a value of @ref DAC_SampleAndHold */ 121 122 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. 123 This parameter can be a value of @ref DAC_trigger_selection */ 124 125 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. 126 This parameter can be a value of @ref DAC_output_buffer */ 127 128 uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral . 129 This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */ 130 131 uint32_t DAC_UserTrimming; /*!< Specifies the trimming mode 132 This parameter must be a value of @ref DAC_UserTrimming 133 DAC_UserTrimming is either factory or user trimming */ 134 135 uint32_t DAC_TrimmingValue; /*!< Specifies the offset trimming value 136 i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER. 137 This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ 138 139 DAC_SampleAndHoldConfTypeDef DAC_SampleAndHoldConfig; /*!< Sample and Hold settings */ 140 141 } DAC_ChannelConfTypeDef; 142 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 143 /** 144 * @brief HAL DAC Callback ID enumeration definition 145 */ 146 typedef enum 147 { 148 HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */ 149 HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */ 150 HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */ 151 HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */ 152 HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /*!< DAC CH2 Complete Callback ID */ 153 HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /*!< DAC CH2 half Complete Callback ID */ 154 HAL_DAC_CH2_ERROR_ID = 0x06U, /*!< DAC CH2 error Callback ID */ 155 HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /*!< DAC CH2 underrun Callback ID */ 156 HAL_DAC_MSP_INIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */ 157 HAL_DAC_MSP_DEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */ 158 HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */ 159 } HAL_DAC_CallbackIDTypeDef; 160 161 /** 162 * @brief HAL DAC Callback pointer definition 163 */ 164 typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac); 165 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 166 167 /** 168 * @} 169 */ 170 171 /* Exported constants --------------------------------------------------------*/ 172 173 /** @defgroup DAC_Exported_Constants DAC Exported Constants 174 * @{ 175 */ 176 177 /** @defgroup DAC_Error_Code DAC Error Code 178 * @{ 179 */ 180 #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ 181 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */ 182 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */ 183 #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ 184 #define HAL_DAC_ERROR_TIMEOUT 0x08U /*!< Timeout error */ 185 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 186 #define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */ 187 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 188 /** 189 * @} 190 */ 191 192 /** @defgroup DAC_trigger_selection DAC trigger selection 193 * @{ 194 */ 195 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC_DHRxxxx register has been loaded, and not by external trigger */ 196 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */ 197 #define DAC_TRIGGER_T1_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM1 TRGO selected as external conversion trigger for DAC channel */ 198 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 199 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ 200 #define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_2 |DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ 201 #define DAC_TRIGGER_T6_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 202 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ 203 #define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ 204 #define DAC_TRIGGER_T15_TRGO ((uint32_t)(DAC_CR_TSEL1_3 | DAC_CR_TEN1)) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel */ 205 #define DAC_TRIGGER_LP1_OUT ((uint32_t)(DAC_CR_TSEL1_3 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< LP1 OUT TRGO selected as external conversion trigger for DAC channel */ 206 #define DAC_TRIGGER_LP2_OUT ((uint32_t)(DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< LP2 OUT TRGO selected as external conversion trigger for DAC channel */ 207 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 208 /** 209 * @} 210 */ 211 212 /** @defgroup DAC_output_buffer DAC output buffer 213 * @{ 214 */ 215 #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000) 216 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_MCR_MODE1_1) 217 218 /** 219 * @} 220 */ 221 222 /** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral 223 * @{ 224 */ 225 #define DAC_CHIPCONNECT_DISABLE ((uint32_t)0x00000000) 226 #define DAC_CHIPCONNECT_ENABLE ((uint32_t)DAC_MCR_MODE1_0) 227 228 /** 229 * @} 230 */ 231 232 /** @defgroup DAC_UserTrimming DAC User Trimming 233 * @{ 234 */ 235 236 #define DAC_TRIMMING_FACTORY ((uint32_t)0x00000000) /*!< Factory trimming */ 237 #define DAC_TRIMMING_USER ((uint32_t)0x00000001) /*!< User trimming */ 238 239 /** 240 * @} 241 */ 242 243 /** @defgroup DAC_SampleAndHold. Mode is Sample and hold (low power or normal) 244 * @{ 245 */ 246 #define DAC_SAMPLEANDHOLD_DISABLE ((uint32_t)0x00000000) 247 #define DAC_SAMPLEANDHOLD_ENABLE ((uint32_t)DAC_MCR_MODE1_2) 248 249 250 /** 251 * @} 252 */ 253 254 255 /** @defgroup DAC_Channel_selection DAC Channel selection 256 * @{ 257 */ 258 #define DAC_CHANNEL_1 ((uint32_t)0x00000000) 259 #define DAC_CHANNEL_2 ((uint32_t)0x00000010) 260 261 /** 262 * @} 263 */ 264 265 /** @defgroup DAC_data_alignment DAC data alignment 266 * @{ 267 */ 268 #define DAC_ALIGN_12B_R ((uint32_t)0x00000000) 269 #define DAC_ALIGN_12B_L ((uint32_t)0x00000004) 270 #define DAC_ALIGN_8B_R ((uint32_t)0x00000008) 271 /** 272 * @} 273 */ 274 275 /** @defgroup DAC_flags_definition DAC flags definition 276 * @{ 277 */ 278 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) 279 #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) 280 281 /** 282 * @} 283 */ 284 285 /** @defgroup DAC_IT_definition DAC IT definition 286 * @{ 287 */ 288 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) 289 #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) 290 291 /** 292 * @} 293 */ 294 295 /** @defgroup DAC_HighFrequency DAC high frequency interface mode 296 * @{ 297 */ 298 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE ((uint32_t)0x00000000) /*!< High frequency interface mode disabled */ 299 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ ((uint32_t)DAC_CR_HFSEL) /*!< High frequency interface mode enabled */ 300 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC ((uint32_t)0x00000002) /*!< High frequency interface mode automatic */ 301 302 /** 303 * @} 304 */ 305 306 /** 307 * @} 308 */ 309 310 /* Exported macro ------------------------------------------------------------*/ 311 312 /** @defgroup DAC_Exported_Macros DAC Exported Macros 313 * @{ 314 */ 315 316 /** @brief Reset DAC handle state. 317 * @param __HANDLE__: specifies the DAC handle. 318 * @retval None 319 */ 320 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 321 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \ 322 (__HANDLE__)->State = HAL_DAC_STATE_RESET; \ 323 (__HANDLE__)->MspInitCallback = NULL; \ 324 (__HANDLE__)->MspDeInitCallback = NULL; \ 325 } while(0) 326 #else 327 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) 328 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 329 330 /** @brief Enable the DAC channel. 331 * @param __HANDLE__: specifies the DAC handle. 332 * @param __DAC_Channel__: specifies the DAC channel 333 * @retval None 334 */ 335 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ 336 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__))) 337 338 /** @brief Disable the DAC channel. 339 * @param __HANDLE__: specifies the DAC handle 340 * @param __DAC_Channel__: specifies the DAC channel. 341 * @retval None 342 */ 343 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ 344 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__))) 345 346 /** @brief Set DHR12R1 alignment. 347 * @param __ALIGNMENT__: specifies the DAC alignment 348 * @retval None 349 */ 350 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000008) + (__ALIGNMENT__)) 351 352 /** @brief Set DHR12R2 alignment. 353 * @param __ALIGNMENT__: specifies the DAC alignment 354 * @retval None 355 */ 356 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000014) + (__ALIGNMENT__)) 357 358 /** @brief Set DHR12RD alignment. 359 * @param __ALIGNMENT__: specifies the DAC alignment 360 * @retval None 361 */ 362 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000020) + (__ALIGNMENT__)) 363 364 /** @brief Enable the DAC interrupt. 365 * @param __HANDLE__: specifies the DAC handle 366 * @param __INTERRUPT__: specifies the DAC interrupt. 367 * This parameter can be any combination of the following values: 368 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 369 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 370 * @retval None 371 */ 372 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) 373 374 /** @brief Disable the DAC interrupt. 375 * @param __HANDLE__: specifies the DAC handle 376 * @param __INTERRUPT__: specifies the DAC interrupt. 377 * This parameter can be any combination of the following values: 378 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 379 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 380 * @retval None 381 */ 382 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) 383 384 /** @brief Check whether the specified DAC interrupt source is enabled or not. 385 * @param __HANDLE__: DAC handle 386 * @param __INTERRUPT__: DAC interrupt source to check 387 * This parameter can be any combination of the following values: 388 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 389 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 390 * @retval State of interruption (SET or RESET) 391 */ 392 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) 393 394 /** @brief Get the selected DAC's flag status. 395 * @param __HANDLE__: specifies the DAC handle. 396 * @param __FLAG__: specifies the DAC flag to get. 397 * This parameter can be any combination of the following values: 398 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag 399 * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag 400 * @retval None 401 */ 402 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 403 404 /** @brief Clear the DAC's flag. 405 * @param __HANDLE__: specifies the DAC handle. 406 * @param __FLAG__: specifies the DAC flag to clear. 407 * This parameter can be any combination of the following values: 408 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag 409 * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag 410 * @retval None 411 */ 412 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) 413 414 /** 415 * @} 416 */ 417 418 /* Private macro -------------------------------------------------------------*/ 419 420 /** @defgroup DAC_Private_Macros DAC Private Macros 421 * @{ 422 */ 423 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ 424 ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) 425 426 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ 427 ((CHANNEL) == DAC_CHANNEL_2)) 428 429 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ 430 ((ALIGN) == DAC_ALIGN_12B_L) || \ 431 ((ALIGN) == DAC_ALIGN_8B_R)) 432 433 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0) 434 435 #define IS_DAC_REFRESHTIME(TIME) ((TIME) <= 0x000000FF) 436 437 /** 438 * @} 439 */ 440 441 /* Include DAC HAL Extended module */ 442 #include "stm32mp1xx_hal_dac_ex.h" 443 444 /* Exported functions --------------------------------------------------------*/ 445 446 /** @addtogroup DAC_Exported_Functions 447 * @{ 448 */ 449 450 /** @addtogroup DAC_Exported_Functions_Group1 451 * @{ 452 */ 453 /* Initialization and de-initialization functions *****************************/ 454 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac); 455 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac); 456 void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac); 457 void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac); 458 459 /** 460 * @} 461 */ 462 463 /** @addtogroup DAC_Exported_Functions_Group2 464 * @{ 465 */ 466 /* IO operation functions *****************************************************/ 467 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel); 468 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel); 469 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length, uint32_t Alignment); 470 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel); 471 472 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac); 473 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); 474 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac); 475 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac); 476 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); 477 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); 478 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 479 /* DAC callback registering/unregistering */ 480 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackId, pDAC_CallbackTypeDef pCallback); 481 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackId); 482 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 483 /** 484 * @} 485 */ 486 487 /** @addtogroup DAC_Exported_Functions_Group3 488 * @{ 489 */ 490 /* Peripheral Control functions ***********************************************/ 491 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel); 492 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel); 493 /** 494 * @} 495 */ 496 497 /** @addtogroup DAC_Exported_Functions_Group4 498 * @{ 499 */ 500 /* Peripheral State and Error functions ***************************************/ 501 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac); 502 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); 503 504 /** 505 * @} 506 */ 507 508 /** 509 * @} 510 */ 511 512 /** 513 * @} 514 */ 515 516 /** 517 * @} 518 */ 519 520 #ifdef __cplusplus 521 } 522 #endif 523 524 525 #endif /*STM32MP1xx_HAL_DAC_H */ 526 527 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 528 529
