1 /**
2 ******************************************************************************
3 * @file stm32l5xx_hal_dac.c
4 * @author MCD Application Team
5 * @brief DAC HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Digital to Analog Converter (DAC) peripheral:
8 * + Initialization and de-initialization functions
9 * + IO operation functions
10 * + Peripheral Control functions
11 * + Peripheral State and Errors functions
12 *
13 *
14 @verbatim
15 ==============================================================================
16 ##### DAC Peripheral features #####
17 ==============================================================================
18 [..]
19 *** DAC Channels ***
20 ====================
21 [..]
22 STM32L5 devices integrate two 12-bit Digital Analog Converters
23
24 The 2 converters (i.e. channel1 & channel2)
25 can be used independently or simultaneously (dual mode):
26 (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip
27 peripherals (ex. timers).
28 (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip
29 peripherals (ex. timers).
30
31 *** DAC Triggers ***
32 ====================
33 [..]
34 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
35 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
36 [..]
37 Digital to Analog conversion can be triggered by:
38 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
39 The used pin (GPIOx_PIN_9) must be configured in input mode.
40
41 (#) Timers TRGO: TIM1, TIM2, TIM3, TIM4, TIM6, TIM7, TIM8 and TIM15
42 (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T3_TRGO...)
43
44 (#) Software using DAC_TRIGGER_SOFTWARE
45
46 *** DAC Buffer mode feature ***
47 ===============================
48 [..]
49 Each DAC channel integrates an output buffer that can be used to
50 reduce the output impedance, and to drive external loads directly
51 without having to add an external operational amplifier.
52 To enable, the output buffer use
53 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
54 [..]
55 (@) Refer to the device datasheet for more details about output
56 impedance value with and without output buffer.
57
58 *** DAC connect feature ***
59 ===============================
60 [..]
61 Each DAC channel can be connected internally.
62 To connect, use
63 sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_ENABLE;
64
65 *** GPIO configurations guidelines ***
66 =====================
67 [..]
68 When a DAC channel is used (ex channel1 on PA4) and the other is not
69 (ex channel2 on PA5 is configured in Analog and disabled).
70 Channel1 may disturb channel2 as coupling effect.
71 Note that there is no coupling on channel2 as soon as channel2 is turned on.
72 Coupling on adjacent channel could be avoided as follows:
73 when unused PA5 is configured as INPUT PULL-UP or DOWN.
74 PA5 is configured in ANALOG just before it is turned on.
75
76 *** DAC Sample and Hold feature ***
77 ========================
78 [..]
79 For each converter, 2 modes are supported: normal mode and
80 "sample and hold" mode (i.e. low power mode).
81 In the sample and hold mode, the DAC core converts data, then holds the
82 converted voltage on a capacitor. When not converting, the DAC cores and
83 buffer are completely turned off between samples and the DAC output is
84 tri-stated, therefore reducing the overall power consumption. A new
85 stabilization period is needed before each new conversion.
86
87 The sample and hold allow setting internal or external voltage @
88 low power consumption cost (output value can be at any given rate either
89 by CPU or DMA).
90
91 The Sample and hold block and registers uses either LSI & run in
92 several power modes: run mode, sleep mode, low power run, low power sleep
93 mode & stop1 mode.
94
95 Low power stop1 mode allows only static conversion.
96
97 To enable Sample and Hold mode
98 Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI &
99 RCC_LSI_ON parameters.
100
101 Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE;
102 & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime,
103 DAC_HoldTime & DAC_RefreshTime;
104
105 *** DAC calibration feature ***
106 ===================================
107 [..]
108 (#) The 2 converters (channel1 & channel2) provide calibration capabilities.
109 (++) Calibration aims at correcting some offset of output buffer.
110 (++) The DAC uses either factory calibration settings OR user defined
111 calibration (trimming) settings (i.e. trimming mode).
112 (++) The user defined settings can be figured out using self calibration
113 handled by HAL_DACEx_SelfCalibrate.
114 (++) HAL_DACEx_SelfCalibrate:
115 (+++) Runs automatically the calibration.
116 (+++) Enables the user trimming mode
117 (+++) Updates a structure with trimming values with fresh calibration
118 results.
119 The user may store the calibration results for larger
120 (ex monitoring the trimming as a function of temperature
121 for instance)
122
123 *** DAC wave generation feature ***
124 ===================================
125 [..]
126 Both DAC channels can be used to generate
127 (#) Noise wave
128 (#) Triangle wave
129
130 *** DAC data format ***
131 =======================
132 [..]
133 The DAC data format can be:
134 (#) 8-bit right alignment using DAC_ALIGN_8B_R
135 (#) 12-bit left alignment using DAC_ALIGN_12B_L
136 (#) 12-bit right alignment using DAC_ALIGN_12B_R
137
138 *** DAC data value to voltage correspondence ***
139 ================================================
140 [..]
141 The analog output voltage on each DAC channel pin is determined
142 by the following equation:
143 [..]
144 DAC_OUTx = VREF+ * DOR / 4095
145 (+) with DOR is the Data Output Register
146 [..]
147 VEF+ is the input voltage reference (refer to the device datasheet)
148 [..]
149 e.g. To set DAC_OUT1 to 0.7V, use
150 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
151
152 *** DMA requests ***
153 =====================
154 [..]
155 A DMA request can be generated when an external trigger (but not a software trigger)
156 occurs if DMA requests are enabled using HAL_DAC_Start_DMA().
157 DMA requests are mapped as following:
158 (#) DAC channel1 mapped on DMA1/DMA2 request 7 (can be any DMA channel)
159 (#) DAC channel2 mapped on DMA1/DMA2 request 8 (can be any DMA channel)
160
161 *** High frequency interface mode ***
162 =====================================
163 [..]
164 The high frequency interface informs DAC instance about the bus frequency in use.
165 It is mandatory information for DAC (as internal timing of DAC is bus frequency dependent)
166 provided thanks to parameter DAC_HighFrequency handled in HAL_DAC_ConfigChannel () function.
167 Use of DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC value of DAC_HighFrequency is recommended
168 function figured out the correct setting.
169 The high frequency mode is same for all converters of a same DAC instance. Either same
170 parameter DAC_HighFrequency is used for all DAC converters or again self
171 DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC detection parameter.
172
173 [..]
174 (@) For Dual mode and specific signal (Triangle and noise) generation please
175 refer to Extended Features Driver description
176
177 ##### How to use this driver #####
178 ==============================================================================
179 [..]
180 (+) DAC APB clock must be enabled to get write access to DAC
181 registers using HAL_DAC_Init()
182 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
183 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
184 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions.
185
186 *** Calibration mode IO operation ***
187 ======================================
188 [..]
189 (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset()
190 (+) Run the calibration using HAL_DACEx_SelfCalibrate()
191 (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming()
192
193 *** Polling mode IO operation ***
194 =================================
195 [..]
196 (+) Start the DAC peripheral using HAL_DAC_Start()
197 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
198 (+) Stop the DAC peripheral using HAL_DAC_Stop()
199
200 *** DMA mode IO operation ***
201 ==============================
202 [..]
203 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
204 of data to be transferred at each end of conversion
205 First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue().
206 (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
207 function is executed and user can add his own code by customization of function pointer
208 HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
209 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
210 function is executed and user can add his own code by customization of function pointer
211 HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
212 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can
213 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
214 (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
215 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2()
216 function is executed and user can add his own code by customization of function pointer
217 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and
218 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1()
219 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
220
221 *** Callback registration ***
222 =============================================
223 [..]
224 The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1
225 allows the user to configure dynamically the driver callbacks.
226
227 Use Functions @ref HAL_DAC_RegisterCallback() to register a user callback,
228 it allows to register following callbacks:
229 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
230 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
231 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
232 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
233 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
234 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
235 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
236 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
237 (+) MspInitCallback : DAC MspInit.
238 (+) MspDeInitCallback : DAC MspdeInit.
239 This function takes as parameters the HAL peripheral handle, the Callback ID
240 and a pointer to the user callback function.
241
242 Use function @ref HAL_DAC_UnRegisterCallback() to reset a callback to the default
243 weak (surcharged) function. It allows to reset following callbacks:
244 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
245 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
246 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
247 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
248 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
249 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
250 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
251 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
252 (+) MspInitCallback : DAC MspInit.
253 (+) MspDeInitCallback : DAC MspdeInit.
254 (+) All Callbacks
255 This function) takes as parameters the HAL peripheral handle and the Callback ID.
256
257 By default, after the @ref HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET
258 all callbacks are reset to the corresponding legacy weak (surcharged) functions.
259 Exception done for MspInit and MspDeInit callbacks that are respectively
260 reset to the legacy weak (surcharged) functions in the @ref HAL_DAC_Init
261 and @ref HAL_DAC_DeInit only when these callbacks are null (not registered beforehand).
262 If not, MspInit or MspDeInit are not null, the @ref HAL_DAC_Init and @ref HAL_DAC_DeInit
263 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
264
265 Callbacks can be registered/unregistered in READY state only.
266 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
267 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
268 during the Init/DeInit.
269 In that case first register the MspInit/MspDeInit user callbacks
270 using @ref HAL_DAC_RegisterCallback before calling @ref HAL_DAC_DeInit
271 or @ref HAL_DAC_Init function.
272
273 When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or
274 not defined, the callback registering feature is not available
275 and weak (surcharged) callbacks are used.
276
277 *** DAC HAL driver macros list ***
278 =============================================
279 [..]
280 Below the list of most used macros in DAC HAL driver.
281
282 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
283 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
284 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
285 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
286
287 [..]
288 (@) You can refer to the DAC HAL driver header file for more useful macros
289
290 @endverbatim
291 ******************************************************************************
292 * @attention
293 *
294 * <h2><center>© Copyright (c) 2019 STMicroelectronics.
295 * All rights reserved.</center></h2>
296 *
297 * This software component is licensed by ST under BSD 3-Clause license,
298 * the "License"; You may not use this file except in compliance with the
299 * License. You may obtain a copy of the License at:
300 * opensource.org/licenses/BSD-3-Clause
301 *
302 ******************************************************************************
303 */
304
305 /* Includes ------------------------------------------------------------------*/
306 #include "stm32l5xx_hal.h"
307
308 /** @addtogroup STM32L5xx_HAL_Driver
309 * @{
310 */
311
312 #ifdef HAL_DAC_MODULE_ENABLED
313 #if defined(DAC1)
314
315 /** @defgroup DAC DAC
316 * @brief DAC driver modules
317 * @{
318 */
319
320 /* Private typedef -----------------------------------------------------------*/
321 /* Private define ------------------------------------------------------------*/
322 /* Private constants ---------------------------------------------------------*/
323 /** @addtogroup DAC_Private_Constants DAC Private Constants
324 * @{
325 */
326 #define TIMEOUT_DAC_CALIBCONFIG 1U /* 1 ms */
327 #define HFSEL_ENABLE_THRESHOLD_80MHZ 80000000U /* 80 MHz */
328
329 /**
330 * @}
331 */
332
333 /* Private macro -------------------------------------------------------------*/
334 /* Private variables ---------------------------------------------------------*/
335 /* Private function prototypes -----------------------------------------------*/
336 /* Exported functions -------------------------------------------------------*/
337
338 /** @defgroup DAC_Exported_Functions DAC Exported Functions
339 * @{
340 */
341
342 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
343 * @brief Initialization and Configuration functions
344 *
345 @verbatim
346 ==============================================================================
347 ##### Initialization and de-initialization functions #####
348 ==============================================================================
349 [..] This section provides functions allowing to:
350 (+) Initialize and configure the DAC.
351 (+) De-initialize the DAC.
352
353 @endverbatim
354 * @{
355 */
356
357 /**
358 * @brief Initialize the DAC peripheral according to the specified parameters
359 * in the DAC_InitStruct and initialize the associated handle.
360 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
361 * the configuration information for the specified DAC.
362 * @retval HAL status
363 */
HAL_DAC_Init(DAC_HandleTypeDef * hdac)364 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac)
365 {
366 /* Check DAC handle */
367 if (hdac == NULL)
368 {
369 return HAL_ERROR;
370 }
371 /* Check the parameters */
372 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
373
374 if (hdac->State == HAL_DAC_STATE_RESET)
375 {
376 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
377 /* Init the DAC Callback settings */
378 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
379 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
380 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
381 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
382
383 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
384 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
385 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
386 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
387
388 if (hdac->MspInitCallback == NULL)
389 {
390 hdac->MspInitCallback = HAL_DAC_MspInit;
391 }
392 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
393
394 /* Allocate lock resource and initialize it */
395 hdac->Lock = HAL_UNLOCKED;
396
397 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
398 /* Init the low level hardware */
399 hdac->MspInitCallback(hdac);
400 #else
401 /* Init the low level hardware */
402 HAL_DAC_MspInit(hdac);
403 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
404 }
405
406 /* Initialize the DAC state*/
407 hdac->State = HAL_DAC_STATE_BUSY;
408
409 /* Set DAC error code to none */
410 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
411
412 /* Initialize the DAC state*/
413 hdac->State = HAL_DAC_STATE_READY;
414
415 /* Return function status */
416 return HAL_OK;
417 }
418
419 /**
420 * @brief Deinitialize the DAC peripheral registers to their default reset values.
421 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
422 * the configuration information for the specified DAC.
423 * @retval HAL status
424 */
HAL_DAC_DeInit(DAC_HandleTypeDef * hdac)425 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac)
426 {
427 /* Check DAC handle */
428 if (hdac == NULL)
429 {
430 return HAL_ERROR;
431 }
432
433 /* Check the parameters */
434 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
435
436 /* Change DAC state */
437 hdac->State = HAL_DAC_STATE_BUSY;
438
439 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
440 if (hdac->MspDeInitCallback == NULL)
441 {
442 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
443 }
444 /* DeInit the low level hardware */
445 hdac->MspDeInitCallback(hdac);
446 #else
447 /* DeInit the low level hardware */
448 HAL_DAC_MspDeInit(hdac);
449 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
450
451 /* Set DAC error code to none */
452 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
453
454 /* Change DAC state */
455 hdac->State = HAL_DAC_STATE_RESET;
456
457 /* Release Lock */
458 __HAL_UNLOCK(hdac);
459
460 /* Return function status */
461 return HAL_OK;
462 }
463
464 /**
465 * @brief Initialize the DAC MSP.
466 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
467 * the configuration information for the specified DAC.
468 * @retval None
469 */
HAL_DAC_MspInit(DAC_HandleTypeDef * hdac)470 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac)
471 {
472 /* Prevent unused argument(s) compilation warning */
473 UNUSED(hdac);
474
475 /* NOTE : This function should not be modified, when the callback is needed,
476 the HAL_DAC_MspInit could be implemented in the user file
477 */
478 }
479
480 /**
481 * @brief DeInitialize the DAC MSP.
482 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
483 * the configuration information for the specified DAC.
484 * @retval None
485 */
HAL_DAC_MspDeInit(DAC_HandleTypeDef * hdac)486 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac)
487 {
488 /* Prevent unused argument(s) compilation warning */
489 UNUSED(hdac);
490
491 /* NOTE : This function should not be modified, when the callback is needed,
492 the HAL_DAC_MspDeInit could be implemented in the user file
493 */
494 }
495
496 /**
497 * @}
498 */
499
500 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
501 * @brief IO operation functions
502 *
503 @verbatim
504 ==============================================================================
505 ##### IO operation functions #####
506 ==============================================================================
507 [..] This section provides functions allowing to:
508 (+) Start conversion.
509 (+) Stop conversion.
510 (+) Start conversion and enable DMA transfer.
511 (+) Stop conversion and disable DMA transfer.
512 (+) Get result of conversion.
513
514 @endverbatim
515 * @{
516 */
517
518 /**
519 * @brief Enables DAC and starts conversion of channel.
520 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
521 * the configuration information for the specified DAC.
522 * @param Channel The selected DAC channel.
523 * This parameter can be one of the following values:
524 * @arg DAC_CHANNEL_1: DAC Channel1 selected
525 * @arg DAC_CHANNEL_2: DAC Channel2 selected
526 * @retval HAL status
527 */
HAL_DAC_Start(DAC_HandleTypeDef * hdac,uint32_t Channel)528 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel)
529 {
530 /* Check the parameters */
531 assert_param(IS_DAC_CHANNEL(Channel));
532
533 /* Process locked */
534 __HAL_LOCK(hdac);
535
536 /* Change DAC state */
537 hdac->State = HAL_DAC_STATE_BUSY;
538
539 /* Enable the Peripheral */
540 __HAL_DAC_ENABLE(hdac, Channel);
541
542 if (Channel == DAC_CHANNEL_1)
543 {
544 /* Check if software trigger enabled */
545 if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE)
546 {
547 /* Enable the selected DAC software conversion */
548 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
549 }
550 }
551 else
552 {
553 /* Check if software trigger enabled */
554 if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL)))
555 {
556 /* Enable the selected DAC software conversion*/
557 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
558 }
559 }
560
561 /* Change DAC state */
562 hdac->State = HAL_DAC_STATE_READY;
563
564 /* Process unlocked */
565 __HAL_UNLOCK(hdac);
566
567 /* Return function status */
568 return HAL_OK;
569 }
570
571 /**
572 * @brief Disables DAC and stop conversion of channel.
573 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
574 * the configuration information for the specified DAC.
575 * @param Channel The selected DAC channel.
576 * This parameter can be one of the following values:
577 * @arg DAC_CHANNEL_1: DAC Channel1 selected
578 * @arg DAC_CHANNEL_2: DAC Channel2 selected
579 * @retval HAL status
580 */
HAL_DAC_Stop(DAC_HandleTypeDef * hdac,uint32_t Channel)581 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel)
582 {
583 /* Check the parameters */
584 assert_param(IS_DAC_CHANNEL(Channel));
585
586 /* Disable the Peripheral */
587 __HAL_DAC_DISABLE(hdac, Channel);
588
589 /* Change DAC state */
590 hdac->State = HAL_DAC_STATE_READY;
591
592 /* Return function status */
593 return HAL_OK;
594 }
595
596 /**
597 * @brief Enables DAC and starts conversion of channel.
598 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
599 * the configuration information for the specified DAC.
600 * @param Channel The selected DAC channel.
601 * This parameter can be one of the following values:
602 * @arg DAC_CHANNEL_1: DAC Channel1 selected
603 * @arg DAC_CHANNEL_2: DAC Channel2 selected
604 * @param pData The destination peripheral Buffer address.
605 * @param Length The length of data to be transferred from memory to DAC peripheral
606 * @param Alignment Specifies the data alignment for DAC channel.
607 * This parameter can be one of the following values:
608 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
609 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
610 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
611 * @retval HAL status
612 */
HAL_DAC_Start_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t * pData,uint32_t Length,uint32_t Alignment)613 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
614 uint32_t Alignment)
615 {
616 HAL_StatusTypeDef status;
617 uint32_t tmpreg = 0U;
618
619 /* Check the parameters */
620 assert_param(IS_DAC_CHANNEL(Channel));
621 assert_param(IS_DAC_ALIGN(Alignment));
622
623 /* Process locked */
624 __HAL_LOCK(hdac);
625
626 /* Change DAC state */
627 hdac->State = HAL_DAC_STATE_BUSY;
628
629 if (Channel == DAC_CHANNEL_1)
630 {
631 /* Set the DMA transfer complete callback for channel1 */
632 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
633
634 /* Set the DMA half transfer complete callback for channel1 */
635 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
636
637 /* Set the DMA error callback for channel1 */
638 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
639
640 /* Enable the selected DAC channel1 DMA request */
641 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
642
643 /* Case of use of channel 1 */
644 switch (Alignment)
645 {
646 case DAC_ALIGN_12B_R:
647 /* Get DHR12R1 address */
648 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
649 break;
650 case DAC_ALIGN_12B_L:
651 /* Get DHR12L1 address */
652 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
653 break;
654 case DAC_ALIGN_8B_R:
655 /* Get DHR8R1 address */
656 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
657 break;
658 default:
659 break;
660 }
661 }
662 else
663 {
664 /* Set the DMA transfer complete callback for channel2 */
665 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
666
667 /* Set the DMA half transfer complete callback for channel2 */
668 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
669
670 /* Set the DMA error callback for channel2 */
671 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
672
673 /* Enable the selected DAC channel2 DMA request */
674 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
675
676 /* Case of use of channel 2 */
677 switch (Alignment)
678 {
679 case DAC_ALIGN_12B_R:
680 /* Get DHR12R2 address */
681 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
682 break;
683 case DAC_ALIGN_12B_L:
684 /* Get DHR12L2 address */
685 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
686 break;
687 case DAC_ALIGN_8B_R:
688 /* Get DHR8R2 address */
689 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
690 break;
691 default:
692 break;
693 }
694 }
695
696 /* Enable the DMA channel */
697 if (Channel == DAC_CHANNEL_1)
698 {
699 /* Enable the DAC DMA underrun interrupt */
700 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
701
702 /* Enable the DMA channel */
703 status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
704 }
705 else
706 {
707 /* Enable the DAC DMA underrun interrupt */
708 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
709
710 /* Enable the DMA channel */
711 status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
712 }
713
714 /* Process Unlocked */
715 __HAL_UNLOCK(hdac);
716
717 if (status == HAL_OK)
718 {
719 /* Enable the Peripheral */
720 __HAL_DAC_ENABLE(hdac, Channel);
721 }
722 else
723 {
724 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
725 }
726
727 /* Return function status */
728 return status;
729 }
730
731 /**
732 * @brief Disables DAC and stop conversion of channel.
733 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
734 * the configuration information for the specified DAC.
735 * @param Channel The selected DAC channel.
736 * This parameter can be one of the following values:
737 * @arg DAC_CHANNEL_1: DAC Channel1 selected
738 * @arg DAC_CHANNEL_2: DAC Channel2 selected
739 * @retval HAL status
740 */
HAL_DAC_Stop_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel)741 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel)
742 {
743 /* Check the parameters */
744 assert_param(IS_DAC_CHANNEL(Channel));
745
746 /* Disable the selected DAC channel DMA request */
747 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL));
748
749 /* Disable the Peripheral */
750 __HAL_DAC_DISABLE(hdac, Channel);
751
752 /* Disable the DMA channel */
753
754 /* Channel1 is used */
755 if (Channel == DAC_CHANNEL_1)
756 {
757 /* Disable the DMA channel */
758 (void)HAL_DMA_Abort(hdac->DMA_Handle1);
759
760 /* Disable the DAC DMA underrun interrupt */
761 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
762 }
763 else /* Channel2 is used for */
764 {
765 /* Disable the DMA channel */
766 (void)HAL_DMA_Abort(hdac->DMA_Handle2);
767
768 /* Disable the DAC DMA underrun interrupt */
769 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
770 }
771
772 /* Change DAC state */
773 hdac->State = HAL_DAC_STATE_READY;
774
775 /* Return function status */
776 return HAL_OK;
777 }
778
779 /**
780 * @brief Handles DAC interrupt request
781 * This function uses the interruption of DMA
782 * underrun.
783 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
784 * the configuration information for the specified DAC.
785 * @retval None
786 */
HAL_DAC_IRQHandler(DAC_HandleTypeDef * hdac)787 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac)
788 {
789 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
790 {
791 /* Check underrun flag of DAC channel 1 */
792 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
793 {
794 /* Change DAC state to error state */
795 hdac->State = HAL_DAC_STATE_ERROR;
796
797 /* Set DAC error code to chanel1 DMA underrun error */
798 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
799
800 /* Clear the underrun flag */
801 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1);
802
803 /* Disable the selected DAC channel1 DMA request */
804 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
805
806 /* Error callback */
807 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
808 hdac->DMAUnderrunCallbackCh1(hdac);
809 #else
810 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
811 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
812 }
813 }
814
815 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
816 {
817 /* Check underrun flag of DAC channel 2 */
818 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
819 {
820 /* Change DAC state to error state */
821 hdac->State = HAL_DAC_STATE_ERROR;
822
823 /* Set DAC error code to channel2 DMA underrun error */
824 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
825
826 /* Clear the underrun flag */
827 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2);
828
829 /* Disable the selected DAC channel2 DMA request */
830 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
831
832 /* Error callback */
833 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
834 hdac->DMAUnderrunCallbackCh2(hdac);
835 #else
836 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
837 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
838 }
839 }
840 }
841
842 /**
843 * @brief Set the specified data holding register value for DAC channel.
844 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
845 * the configuration information for the specified DAC.
846 * @param Channel The selected DAC channel.
847 * This parameter can be one of the following values:
848 * @arg DAC_CHANNEL_1: DAC Channel1 selected
849 * @arg DAC_CHANNEL_2: DAC Channel2 selected
850 * @param Alignment Specifies the data alignment.
851 * This parameter can be one of the following values:
852 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
853 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
854 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
855 * @param Data Data to be loaded in the selected data holding register.
856 * @retval HAL status
857 */
HAL_DAC_SetValue(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t Alignment,uint32_t Data)858 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
859 {
860 __IO uint32_t tmp = 0;
861
862 /* Check the parameters */
863 assert_param(IS_DAC_CHANNEL(Channel));
864 assert_param(IS_DAC_ALIGN(Alignment));
865 assert_param(IS_DAC_DATA(Data));
866
867 tmp = (uint32_t)hdac->Instance;
868 if (Channel == DAC_CHANNEL_1)
869 {
870 tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
871 }
872 else
873 {
874 tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
875 }
876
877 /* Set the DAC channel selected data holding register */
878 *(__IO uint32_t *) tmp = Data;
879
880 /* Return function status */
881 return HAL_OK;
882 }
883
884 /**
885 * @brief Conversion complete callback in non-blocking mode for Channel1
886 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
887 * the configuration information for the specified DAC.
888 * @retval None
889 */
HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef * hdac)890 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac)
891 {
892 /* Prevent unused argument(s) compilation warning */
893 UNUSED(hdac);
894
895 /* NOTE : This function should not be modified, when the callback is needed,
896 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
897 */
898 }
899
900 /**
901 * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1
902 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
903 * the configuration information for the specified DAC.
904 * @retval None
905 */
HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef * hdac)906 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac)
907 {
908 /* Prevent unused argument(s) compilation warning */
909 UNUSED(hdac);
910
911 /* NOTE : This function should not be modified, when the callback is needed,
912 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
913 */
914 }
915
916 /**
917 * @brief Error DAC callback for Channel1.
918 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
919 * the configuration information for the specified DAC.
920 * @retval None
921 */
HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef * hdac)922 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
923 {
924 /* Prevent unused argument(s) compilation warning */
925 UNUSED(hdac);
926
927 /* NOTE : This function should not be modified, when the callback is needed,
928 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
929 */
930 }
931
932 /**
933 * @brief DMA underrun DAC callback for channel1.
934 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
935 * the configuration information for the specified DAC.
936 * @retval None
937 */
HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef * hdac)938 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
939 {
940 /* Prevent unused argument(s) compilation warning */
941 UNUSED(hdac);
942
943 /* NOTE : This function should not be modified, when the callback is needed,
944 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
945 */
946 }
947
948 /**
949 * @}
950 */
951
952 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
953 * @brief Peripheral Control functions
954 *
955 @verbatim
956 ==============================================================================
957 ##### Peripheral Control functions #####
958 ==============================================================================
959 [..] This section provides functions allowing to:
960 (+) Configure channels.
961 (+) Set the specified data holding register value for DAC channel.
962
963 @endverbatim
964 * @{
965 */
966
967 /**
968 * @brief Returns the last data output value of the selected DAC channel.
969 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
970 * the configuration information for the specified DAC.
971 * @param Channel The selected DAC channel.
972 * This parameter can be one of the following values:
973 * @arg DAC_CHANNEL_1: DAC Channel1 selected
974 * @arg DAC_CHANNEL_2: DAC Channel2 selected
975 * @retval The selected DAC channel data output value.
976 */
HAL_DAC_GetValue(DAC_HandleTypeDef * hdac,uint32_t Channel)977 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel)
978 {
979 /* Check the parameters */
980 assert_param(IS_DAC_CHANNEL(Channel));
981
982 /* Returns the DAC channel data output register value */
983 if (Channel == DAC_CHANNEL_1)
984 {
985 return hdac->Instance->DOR1;
986 }
987 else
988 {
989 return hdac->Instance->DOR2;
990 }
991 }
992
993 /**
994 * @brief Configures the selected DAC channel.
995 * @note By calling this function, the high frequency interface mode (HFSEL bits)
996 * will be set. This parameter scope is the DAC instance. As the function
997 * is called for each channel, the @ref DAC_HighFrequency of @arg sConfig
998 * must be the same at each call.
999 * (or DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC self detect).
1000 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1001 * the configuration information for the specified DAC.
1002 * @param sConfig DAC configuration structure.
1003 * @param Channel The selected DAC channel.
1004 * This parameter can be one of the following values:
1005 * @arg DAC_CHANNEL_1: DAC Channel1 selected
1006 * @arg DAC_CHANNEL_2: DAC Channel2 selected
1007 * @retval HAL status
1008 */
HAL_DAC_ConfigChannel(DAC_HandleTypeDef * hdac,DAC_ChannelConfTypeDef * sConfig,uint32_t Channel)1009 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
1010 {
1011 uint32_t tmpreg1;
1012 uint32_t tmpreg2;
1013 uint32_t tickstart;
1014 uint32_t hclkfreq;
1015
1016 /* Check the DAC parameters */
1017 assert_param(IS_DAC_HIGH_FREQUENCY_MODE(sConfig->DAC_HighFrequency));
1018 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
1019 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
1020 assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral));
1021 assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming));
1022 if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER)
1023 {
1024 assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue));
1025 }
1026 assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold));
1027 if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE)
1028 {
1029 assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime));
1030 assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime));
1031 assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime));
1032 }
1033 assert_param(IS_DAC_CHANNEL(Channel));
1034
1035 /* Process locked */
1036 __HAL_LOCK(hdac);
1037
1038 /* Change DAC state */
1039 hdac->State = HAL_DAC_STATE_BUSY;
1040
1041 /* Sample and hold configuration */
1042 if (sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
1043 {
1044 /* Get timeout */
1045 tickstart = HAL_GetTick();
1046
1047 if (Channel == DAC_CHANNEL_1)
1048 {
1049 /* SHSR1 can be written when BWST1 is cleared */
1050 while (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1051 {
1052 /* Check for the Timeout */
1053 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1054 {
1055 /* New check to avoid false timeout detection in case of preemption */
1056 if(((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1057 {
1058 /* Update error code */
1059 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1060
1061 /* Change the DMA state */
1062 hdac->State = HAL_DAC_STATE_TIMEOUT;
1063
1064 return HAL_TIMEOUT;
1065 }
1066 }
1067 }
1068 HAL_Delay(1);
1069 hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1070 }
1071 else /* Channel 2 */
1072 {
1073 /* SHSR2 can be written when BWST2 is cleared */
1074 while (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1075 {
1076 /* Check for the Timeout */
1077 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1078 {
1079 /* New check to avoid false timeout detection in case of preemption */
1080 if(((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1081 {
1082 /* Update error code */
1083 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1084
1085 /* Change the DMA state */
1086 hdac->State = HAL_DAC_STATE_TIMEOUT;
1087
1088 return HAL_TIMEOUT;
1089 }
1090 }
1091 }
1092 HAL_Delay(1U);
1093 hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1094 }
1095
1096 /* HoldTime */
1097 MODIFY_REG(hdac->Instance->SHHR, DAC_SHHR_THOLD1 << (Channel & 0x10UL),
1098 (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime) << (Channel & 0x10UL));
1099 /* RefreshTime */
1100 MODIFY_REG(hdac->Instance->SHRR, DAC_SHRR_TREFRESH1 << (Channel & 0x10UL),
1101 (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime) << (Channel & 0x10UL));
1102 }
1103
1104 if (sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
1105 /* USER TRIMMING */
1106 {
1107 /* Get the DAC CCR value */
1108 tmpreg1 = hdac->Instance->CCR;
1109 /* Clear trimming value */
1110 tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << (Channel & 0x10UL));
1111 /* Configure for the selected trimming offset */
1112 tmpreg2 = sConfig->DAC_TrimmingValue;
1113 /* Calculate CCR register value depending on DAC_Channel */
1114 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1115 /* Write to DAC CCR */
1116 hdac->Instance->CCR = tmpreg1;
1117 }
1118 /* else factory trimming is used (factory setting are available at reset)*/
1119 /* SW Nothing has nothing to do */
1120
1121 /* Get the DAC MCR value */
1122 tmpreg1 = hdac->Instance->MCR;
1123 /* Clear DAC_MCR_MODEx bits */
1124 tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << (Channel & 0x10UL));
1125 /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
1126 tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | sConfig->DAC_ConnectOnChipPeripheral);
1127 /* Calculate MCR register value depending on DAC_Channel */
1128 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1129 /* Write to DAC MCR */
1130 hdac->Instance->MCR = tmpreg1;
1131
1132 /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
1133 CLEAR_BIT(hdac->Instance->CR, DAC_CR_CEN1 << (Channel & 0x10UL));
1134
1135 /* Get the DAC CR value */
1136 tmpreg1 = hdac->Instance->CR;
1137 /* Clear TENx, TSELx, WAVEx and MAMPx bits */
1138 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << (Channel & 0x10UL));
1139 /* Configure for the selected DAC channel: trigger */
1140 /* Set TSELx and TENx bits according to DAC_Trigger value */
1141 tmpreg2 = sConfig->DAC_Trigger;
1142 /* Calculate CR register value depending on DAC_Channel */
1143 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1144 if (DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ == sConfig->DAC_HighFrequency)
1145 {
1146 tmpreg1 |= DAC_CR_HFSEL;
1147 }
1148 else
1149 {
1150 if (DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE == sConfig->DAC_HighFrequency)
1151 {
1152 tmpreg1 &= ~(DAC_CR_HFSEL);
1153 }
1154 else /* Automatic selection */
1155 {
1156 hclkfreq = HAL_RCC_GetHCLKFreq();
1157 if (hclkfreq > HFSEL_ENABLE_THRESHOLD_80MHZ)
1158 {
1159 /* High frequency enable when HCLK frequency higher than 80 */
1160 tmpreg1 |= DAC_CR_HFSEL;
1161 }
1162 else
1163 {
1164 /* High frequency disable when HCLK frequency higher than 80 */
1165 tmpreg1 &= ~(DAC_CR_HFSEL);
1166 }
1167 }
1168 }
1169 /* Write to DAC CR */
1170 hdac->Instance->CR = tmpreg1;
1171 /* Disable wave generation */
1172 hdac->Instance->CR &= ~(DAC_CR_WAVE1 << (Channel & 0x10UL));
1173
1174 /* Change DAC state */
1175 hdac->State = HAL_DAC_STATE_READY;
1176
1177 /* Process unlocked */
1178 __HAL_UNLOCK(hdac);
1179
1180 /* Return function status */
1181 return HAL_OK;
1182 }
1183
1184 /**
1185 * @}
1186 */
1187
1188 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
1189 * @brief Peripheral State and Errors functions
1190 *
1191 @verbatim
1192 ==============================================================================
1193 ##### Peripheral State and Errors functions #####
1194 ==============================================================================
1195 [..]
1196 This subsection provides functions allowing to
1197 (+) Check the DAC state.
1198 (+) Check the DAC Errors.
1199
1200 @endverbatim
1201 * @{
1202 */
1203
1204 /**
1205 * @brief return the DAC handle state
1206 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1207 * the configuration information for the specified DAC.
1208 * @retval HAL state
1209 */
HAL_DAC_GetState(DAC_HandleTypeDef * hdac)1210 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac)
1211 {
1212 /* Return DAC handle state */
1213 return hdac->State;
1214 }
1215
1216
1217 /**
1218 * @brief Return the DAC error code
1219 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1220 * the configuration information for the specified DAC.
1221 * @retval DAC Error Code
1222 */
HAL_DAC_GetError(DAC_HandleTypeDef * hdac)1223 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
1224 {
1225 return hdac->ErrorCode;
1226 }
1227
1228 /**
1229 * @}
1230 */
1231
1232 /**
1233 * @}
1234 */
1235
1236 /** @addtogroup DAC_Exported_Functions
1237 * @{
1238 */
1239
1240 /** @addtogroup DAC_Exported_Functions_Group1
1241 * @{
1242 */
1243 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1244 /**
1245 * @brief Register a User DAC Callback
1246 * To be used instead of the weak (surcharged) predefined callback
1247 * @param hdac DAC handle
1248 * @param CallbackID ID of the callback to be registered
1249 * This parameter can be one of the following values:
1250 * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID
1251 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID
1252 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1253 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1254 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1255 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1256 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1257 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1258 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1259 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1260 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1261 *
1262 * @param pCallback pointer to the Callback function
1263 * @retval status
1264 */
HAL_DAC_RegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackID,pDAC_CallbackTypeDef pCallback)1265 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
1266 pDAC_CallbackTypeDef pCallback)
1267 {
1268 HAL_StatusTypeDef status = HAL_OK;
1269
1270 if (pCallback == NULL)
1271 {
1272 /* Update the error code */
1273 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1274 return HAL_ERROR;
1275 }
1276
1277 /* Process locked */
1278 __HAL_LOCK(hdac);
1279
1280 if (hdac->State == HAL_DAC_STATE_READY)
1281 {
1282 switch (CallbackID)
1283 {
1284 case HAL_DAC_CH1_COMPLETE_CB_ID :
1285 hdac->ConvCpltCallbackCh1 = pCallback;
1286 break;
1287 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1288 hdac->ConvHalfCpltCallbackCh1 = pCallback;
1289 break;
1290 case HAL_DAC_CH1_ERROR_ID :
1291 hdac->ErrorCallbackCh1 = pCallback;
1292 break;
1293 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1294 hdac->DMAUnderrunCallbackCh1 = pCallback;
1295 break;
1296 case HAL_DAC_CH2_COMPLETE_CB_ID :
1297 hdac->ConvCpltCallbackCh2 = pCallback;
1298 break;
1299 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1300 hdac->ConvHalfCpltCallbackCh2 = pCallback;
1301 break;
1302 case HAL_DAC_CH2_ERROR_ID :
1303 hdac->ErrorCallbackCh2 = pCallback;
1304 break;
1305 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1306 hdac->DMAUnderrunCallbackCh2 = pCallback;
1307 break;
1308 case HAL_DAC_MSPINIT_CB_ID :
1309 hdac->MspInitCallback = pCallback;
1310 break;
1311 case HAL_DAC_MSPDEINIT_CB_ID :
1312 hdac->MspDeInitCallback = pCallback;
1313 break;
1314 default :
1315 /* Update the error code */
1316 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1317 /* update return status */
1318 status = HAL_ERROR;
1319 break;
1320 }
1321 }
1322 else if (hdac->State == HAL_DAC_STATE_RESET)
1323 {
1324 switch (CallbackID)
1325 {
1326 case HAL_DAC_MSPINIT_CB_ID :
1327 hdac->MspInitCallback = pCallback;
1328 break;
1329 case HAL_DAC_MSPDEINIT_CB_ID :
1330 hdac->MspDeInitCallback = pCallback;
1331 break;
1332 default :
1333 /* Update the error code */
1334 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1335 /* update return status */
1336 status = HAL_ERROR;
1337 break;
1338 }
1339 }
1340 else
1341 {
1342 /* Update the error code */
1343 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1344 /* update return status */
1345 status = HAL_ERROR;
1346 }
1347
1348 /* Release Lock */
1349 __HAL_UNLOCK(hdac);
1350 return status;
1351 }
1352
1353 /**
1354 * @brief Unregister a User DAC Callback
1355 * DAC Callback is redirected to the weak (surcharged) predefined callback
1356 * @param hdac DAC handle
1357 * @param CallbackID ID of the callback to be unregistered
1358 * This parameter can be one of the following values:
1359 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 transfer Complete Callback ID
1360 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1361 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1362 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1363 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1364 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1365 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1366 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1367 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1368 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1369 * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks
1370 * @retval status
1371 */
HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackID)1372 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID)
1373 {
1374 HAL_StatusTypeDef status = HAL_OK;
1375
1376 /* Process locked */
1377 __HAL_LOCK(hdac);
1378
1379 if (hdac->State == HAL_DAC_STATE_READY)
1380 {
1381 switch (CallbackID)
1382 {
1383 case HAL_DAC_CH1_COMPLETE_CB_ID :
1384 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1385 break;
1386 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1387 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1388 break;
1389 case HAL_DAC_CH1_ERROR_ID :
1390 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1391 break;
1392 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1393 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1394 break;
1395 case HAL_DAC_CH2_COMPLETE_CB_ID :
1396 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1397 break;
1398 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1399 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1400 break;
1401 case HAL_DAC_CH2_ERROR_ID :
1402 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1403 break;
1404 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1405 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1406 break;
1407 case HAL_DAC_MSPINIT_CB_ID :
1408 hdac->MspInitCallback = HAL_DAC_MspInit;
1409 break;
1410 case HAL_DAC_MSPDEINIT_CB_ID :
1411 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1412 break;
1413 case HAL_DAC_ALL_CB_ID :
1414 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1415 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1416 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1417 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1418 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1419 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1420 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1421 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1422 hdac->MspInitCallback = HAL_DAC_MspInit;
1423 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1424 break;
1425 default :
1426 /* Update the error code */
1427 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1428 /* update return status */
1429 status = HAL_ERROR;
1430 break;
1431 }
1432 }
1433 else if (hdac->State == HAL_DAC_STATE_RESET)
1434 {
1435 switch (CallbackID)
1436 {
1437 case HAL_DAC_MSPINIT_CB_ID :
1438 hdac->MspInitCallback = HAL_DAC_MspInit;
1439 break;
1440 case HAL_DAC_MSPDEINIT_CB_ID :
1441 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1442 break;
1443 default :
1444 /* Update the error code */
1445 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1446 /* update return status */
1447 status = HAL_ERROR;
1448 break;
1449 }
1450 }
1451 else
1452 {
1453 /* Update the error code */
1454 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1455 /* update return status */
1456 status = HAL_ERROR;
1457 }
1458
1459 /* Release Lock */
1460 __HAL_UNLOCK(hdac);
1461 return status;
1462 }
1463 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1464
1465 /**
1466 * @}
1467 */
1468
1469 /**
1470 * @}
1471 */
1472
1473 /** @addtogroup DAC_Private_Functions
1474 * @{
1475 */
1476
1477 /**
1478 * @brief DMA conversion complete callback.
1479 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1480 * the configuration information for the specified DMA module.
1481 * @retval None
1482 */
DAC_DMAConvCpltCh1(DMA_HandleTypeDef * hdma)1483 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
1484 {
1485 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1486
1487 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1488 hdac->ConvCpltCallbackCh1(hdac);
1489 #else
1490 HAL_DAC_ConvCpltCallbackCh1(hdac);
1491 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1492
1493 hdac->State = HAL_DAC_STATE_READY;
1494 }
1495
1496 /**
1497 * @brief DMA half transfer complete callback.
1498 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1499 * the configuration information for the specified DMA module.
1500 * @retval None
1501 */
DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef * hdma)1502 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
1503 {
1504 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1505 /* Conversion complete callback */
1506 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1507 hdac->ConvHalfCpltCallbackCh1(hdac);
1508 #else
1509 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
1510 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1511 }
1512
1513 /**
1514 * @brief DMA error callback
1515 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1516 * the configuration information for the specified DMA module.
1517 * @retval None
1518 */
DAC_DMAErrorCh1(DMA_HandleTypeDef * hdma)1519 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
1520 {
1521 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1522
1523 /* Set DAC error code to DMA error */
1524 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
1525
1526 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1527 hdac->ErrorCallbackCh1(hdac);
1528 #else
1529 HAL_DAC_ErrorCallbackCh1(hdac);
1530 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1531
1532 hdac->State = HAL_DAC_STATE_READY;
1533 }
1534
1535 /**
1536 * @}
1537 */
1538
1539 /**
1540 * @}
1541 */
1542
1543 #endif /* DAC1 */
1544
1545 #endif /* HAL_DAC_MODULE_ENABLED */
1546
1547 /**
1548 * @}
1549 */
1550
1551 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1552
