1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_mmc.h 4 * @author MCD Application Team 5 * @brief Header file of MMC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32L4xx_HAL_MMC_H 22 #define STM32L4xx_HAL_MMC_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32l4xx_ll_sdmmc.h" 30 31 /** @addtogroup STM32L4xx_HAL_Driver 32 * @{ 33 */ 34 35 #if defined(SDMMC1) 36 37 /** @addtogroup MMC 38 * @brief MMC HAL module driver 39 * @{ 40 */ 41 42 /* Exported types ------------------------------------------------------------*/ 43 /** @defgroup MMC_Exported_Types MMC Exported Types 44 * @{ 45 */ 46 47 /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure 48 * @{ 49 */ 50 typedef enum 51 { 52 HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */ 53 HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */ 54 HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */ 55 HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */ 56 HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */ 57 HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */ 58 HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfert State */ 59 HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */ 60 }HAL_MMC_StateTypeDef; 61 /** 62 * @} 63 */ 64 65 /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure 66 * @{ 67 */ 68 typedef uint32_t HAL_MMC_CardStateTypeDef; 69 70 #define HAL_MMC_CARD_READY 0x00000001U /*!< Card state is ready */ 71 #define HAL_MMC_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state */ 72 #define HAL_MMC_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ 73 #define HAL_MMC_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ 74 #define HAL_MMC_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ 75 #define HAL_MMC_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ 76 #define HAL_MMC_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ 77 #define HAL_MMC_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ 78 #define HAL_MMC_CARD_ERROR 0x000000FFU /*!< Card response Error */ 79 /** 80 * @} 81 */ 82 83 /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition 84 * @{ 85 */ 86 #define MMC_InitTypeDef SDMMC_InitTypeDef 87 #define MMC_TypeDef SDMMC_TypeDef 88 89 /** 90 * @brief MMC Card Information Structure definition 91 */ 92 typedef struct 93 { 94 uint32_t CardType; /*!< Specifies the card Type */ 95 96 uint32_t Class; /*!< Specifies the class of the card class */ 97 98 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ 99 100 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ 101 102 uint32_t BlockSize; /*!< Specifies one block size in bytes */ 103 104 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ 105 106 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ 107 108 }HAL_MMC_CardInfoTypeDef; 109 110 /** 111 * @brief MMC handle Structure definition 112 */ 113 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 114 typedef struct __MMC_HandleTypeDef 115 #else 116 typedef struct 117 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 118 { 119 MMC_TypeDef *Instance; /*!< MMC registers base address */ 120 121 MMC_InitTypeDef Init; /*!< MMC required parameters */ 122 123 HAL_LockTypeDef Lock; /*!< MMC locking object */ 124 125 uint8_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */ 126 127 uint32_t TxXferSize; /*!< MMC Tx Transfer size */ 128 129 uint8_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */ 130 131 uint32_t RxXferSize; /*!< MMC Rx Transfer size */ 132 133 __IO uint32_t Context; /*!< MMC transfer context */ 134 135 __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */ 136 137 __IO uint32_t ErrorCode; /*!< MMC Card Error codes */ 138 139 #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx) 140 DMA_HandleTypeDef *hdmarx; /*!< MMC Rx DMA handle parameters */ 141 142 DMA_HandleTypeDef *hdmatx; /*!< MMC Tx DMA handle parameters */ 143 #endif /* !STM32L4P5xx && !STM32L4Q5xx && !STM32L4R5xx && !STM32L4R7xx && !STM32L4R9xx && !STM32L4S5xx && !STM32L4S7xx && !STM32L4S9xx */ 144 145 HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */ 146 147 uint32_t CSD[4U]; /*!< MMC card specific data table */ 148 149 uint32_t CID[4U]; /*!< MMC card identification number table */ 150 151 uint32_t Ext_CSD[128]; 152 153 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 154 void (* TxCpltCallback) (struct __MMC_HandleTypeDef *hmmc); 155 void (* RxCpltCallback) (struct __MMC_HandleTypeDef *hmmc); 156 void (* ErrorCallback) (struct __MMC_HandleTypeDef *hmmc); 157 void (* AbortCpltCallback) (struct __MMC_HandleTypeDef *hmmc); 158 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 159 void (* Read_DMADblBuf0CpltCallback) (struct __MMC_HandleTypeDef *hmmc); 160 void (* Read_DMADblBuf1CpltCallback) (struct __MMC_HandleTypeDef *hmmc); 161 void (* Write_DMADblBuf0CpltCallback) (struct __MMC_HandleTypeDef *hmmc); 162 void (* Write_DMADblBuf1CpltCallback) (struct __MMC_HandleTypeDef *hmmc); 163 #endif 164 165 void (* MspInitCallback) (struct __MMC_HandleTypeDef *hmmc); 166 void (* MspDeInitCallback) (struct __MMC_HandleTypeDef *hmmc); 167 #endif 168 }MMC_HandleTypeDef; 169 170 171 /** 172 * @} 173 */ 174 175 /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register 176 * @{ 177 */ 178 typedef struct 179 { 180 __IO uint8_t CSDStruct; /*!< CSD structure */ 181 __IO uint8_t SysSpecVersion; /*!< System specification version */ 182 __IO uint8_t Reserved1; /*!< Reserved */ 183 __IO uint8_t TAAC; /*!< Data read access time 1 */ 184 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ 185 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ 186 __IO uint16_t CardComdClasses; /*!< Card command classes */ 187 __IO uint8_t RdBlockLen; /*!< Max. read data block length */ 188 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ 189 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ 190 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ 191 __IO uint8_t DSRImpl; /*!< DSR implemented */ 192 __IO uint8_t Reserved2; /*!< Reserved */ 193 __IO uint32_t DeviceSize; /*!< Device Size */ 194 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ 195 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ 196 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ 197 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ 198 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ 199 __IO uint8_t EraseGrSize; /*!< Erase group size */ 200 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ 201 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ 202 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ 203 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ 204 __IO uint8_t WrSpeedFact; /*!< Write speed factor */ 205 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ 206 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ 207 __IO uint8_t Reserved3; /*!< Reserved */ 208 __IO uint8_t ContentProtectAppli; /*!< Content protection application */ 209 __IO uint8_t FileFormatGroup; /*!< File format group */ 210 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ 211 __IO uint8_t PermWrProtect; /*!< Permanent write protection */ 212 __IO uint8_t TempWrProtect; /*!< Temporary write protection */ 213 __IO uint8_t FileFormat; /*!< File format */ 214 __IO uint8_t ECC; /*!< ECC code */ 215 __IO uint8_t CSD_CRC; /*!< CSD CRC */ 216 __IO uint8_t Reserved4; /*!< Always 1 */ 217 218 }HAL_MMC_CardCSDTypeDef; 219 /** 220 * @} 221 */ 222 223 /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register 224 * @{ 225 */ 226 typedef struct 227 { 228 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ 229 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ 230 __IO uint32_t ProdName1; /*!< Product Name part1 */ 231 __IO uint8_t ProdName2; /*!< Product Name part2 */ 232 __IO uint8_t ProdRev; /*!< Product Revision */ 233 __IO uint32_t ProdSN; /*!< Product Serial Number */ 234 __IO uint8_t Reserved1; /*!< Reserved1 */ 235 __IO uint16_t ManufactDate; /*!< Manufacturing Date */ 236 __IO uint8_t CID_CRC; /*!< CID CRC */ 237 __IO uint8_t Reserved2; /*!< Always 1 */ 238 239 }HAL_MMC_CardCIDTypeDef; 240 /** 241 * @} 242 */ 243 244 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 245 /** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition 246 * @{ 247 */ 248 typedef enum 249 { 250 HAL_MMC_TX_CPLT_CB_ID = 0x00U, /*!< MMC Tx Complete Callback ID */ 251 HAL_MMC_RX_CPLT_CB_ID = 0x01U, /*!< MMC Rx Complete Callback ID */ 252 HAL_MMC_ERROR_CB_ID = 0x02U, /*!< MMC Error Callback ID */ 253 HAL_MMC_ABORT_CB_ID = 0x03U, /*!< MMC Abort Callback ID */ 254 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 255 HAL_MMC_READ_DMA_DBL_BUF0_CPLT_CB_ID = 0x04U, /*!< MMC Rx DMA Double Buffer 0 Complete Callback ID */ 256 HAL_MMC_READ_DMA_DBL_BUF1_CPLT_CB_ID = 0x05U, /*!< MMC Rx DMA Double Buffer 1 Complete Callback ID */ 257 HAL_MMC_WRITE_DMA_DBL_BUF0_CPLT_CB_ID = 0x06U, /*!< MMC Tx DMA Double Buffer 0 Complete Callback ID */ 258 HAL_MMC_WRITE_DMA_DBL_BUF1_CPLT_CB_ID = 0x07U, /*!< MMC Tx DMA Double Buffer 1 Complete Callback ID */ 259 #endif 260 261 HAL_MMC_MSP_INIT_CB_ID = 0x10U, /*!< MMC MspInit Callback ID */ 262 HAL_MMC_MSP_DEINIT_CB_ID = 0x11U /*!< MMC MspDeInit Callback ID */ 263 }HAL_MMC_CallbackIDTypeDef; 264 /** 265 * @} 266 */ 267 268 /** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition 269 * @{ 270 */ 271 typedef void (*pMMC_CallbackTypeDef) (MMC_HandleTypeDef *hmmc); 272 /** 273 * @} 274 */ 275 #endif 276 277 /** 278 * @} 279 */ 280 281 /* Exported constants --------------------------------------------------------*/ 282 /** @defgroup MMC_Exported_Constants Exported Constants 283 * @{ 284 */ 285 286 #define MMC_BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */ 287 288 /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition 289 * @{ 290 */ 291 #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ 292 #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ 293 #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ 294 #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ 295 #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ 296 #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ 297 #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ 298 #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ 299 #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the 300 number of transferred bytes does not match the block length */ 301 #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ 302 #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ 303 #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ 304 #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock 305 command or if there was an attempt to access a locked card */ 306 #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ 307 #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ 308 #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ 309 #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ 310 #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ 311 #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ 312 #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ 313 #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ 314 #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ 315 #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ 316 #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out 317 of erase sequence command was received */ 318 #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ 319 #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ 320 #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ 321 #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ 322 #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ 323 #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ 324 #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ 325 #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ 326 #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ 327 328 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 329 #define HAL_MMC_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ 330 #endif 331 /** 332 * @} 333 */ 334 335 /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration 336 * @{ 337 */ 338 #define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */ 339 #define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */ 340 #define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */ 341 #define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */ 342 #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */ 343 #define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */ 344 #define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */ 345 346 /** 347 * @} 348 */ 349 350 /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode 351 * @{ 352 */ 353 /** 354 * @brief 355 */ 356 #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< High voltage in byte mode */ 357 #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< Dual voltage in byte mode */ 358 #define MMC_LOW_VOLTAGE_RANGE 0x80000080U /*!< Low voltage in byte mode */ 359 #define eMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< High voltage in sector mode */ 360 #define eMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< Dual voltage in sector mode */ 361 #define eMMC_LOW_VOLTAGE_RANGE 0xC0000080U /*!< Low voltage in sector mode */ 362 #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U 363 /** 364 * @} 365 */ 366 367 /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards 368 * @{ 369 */ 370 #define MMC_LOW_CAPACITY_CARD ((uint32_t)0x00000000U) /*!< MMC Card Capacity <=2Gbytes */ 371 #define MMC_HIGH_CAPACITY_CARD ((uint32_t)0x00000001U) /*!< MMC Card Capacity >2Gbytes and <2Tbytes */ 372 373 /** 374 * @} 375 */ 376 377 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 378 /** @defgroup MMC_Exported_Constansts_Group5 MMC Erase Type 379 * @{ 380 */ 381 #define HAL_MMC_ERASE 0x00000000U /*!< Erase the erase groups identified by CMD35 & 36 */ 382 #define HAL_MMC_TRIM 0x00000001U /*!< Erase the write blocks identified by CMD35 & 36 */ 383 #define HAL_MMC_DISCARD 0x00000003U /*!< Discard the write blocks identified by CMD35 & 36 */ 384 #define HAL_MMC_SECURE_ERASE 0x80000000U /*!< Perform a secure purge according SRT on the erase groups identified by CMD35 & 36 */ 385 #define HAL_MMC_SECURE_TRIM_STEP1 0x80000001U /*!< Mark the write blocks identified by CMD35 & 36 for secure erase */ 386 #define HAL_MMC_SECURE_TRIM_STEP2 0x80008000U /*!< Perform a secure purge according SRT on the write blocks previously identified */ 387 388 #define IS_MMC_ERASE_TYPE(TYPE) (((TYPE) == HAL_MMC_ERASE) || \ 389 ((TYPE) == HAL_MMC_TRIM) || \ 390 ((TYPE) == HAL_MMC_DISCARD) || \ 391 ((TYPE) == HAL_MMC_SECURE_ERASE) || \ 392 ((TYPE) == HAL_MMC_SECURE_TRIM_STEP1) || \ 393 ((TYPE) == HAL_MMC_SECURE_TRIM_STEP2)) 394 /** 395 * @} 396 */ 397 398 /** @defgroup MMC_Exported_Constansts_Group6 MMC Secure Removal Type 399 * @{ 400 */ 401 #define HAL_MMC_SRT_ERASE 0x00000001U /*!< Information removed by an erase */ 402 #define HAL_MMC_SRT_WRITE_CHAR_ERASE 0x00000002U /*!< Information removed by an overwriting with a character followed by an erase */ 403 #define HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM 0x00000004U /*!< Information removed by an overwriting with a character, its complement then a random character */ 404 #define HAL_MMC_SRT_VENDOR_DEFINED 0x00000008U /*!< Information removed using a vendor defined */ 405 406 407 #define IS_MMC_SRT_TYPE(TYPE) (((TYPE) == HAL_MMC_SRT_ERASE) || \ 408 ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_ERASE) || \ 409 ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM) || \ 410 ((TYPE) == HAL_MMC_SRT_VENDOR_DEFINED)) 411 /** 412 * @} 413 */ 414 #endif /* defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) */ 415 416 /** 417 * @} 418 */ 419 420 /* Exported macro ------------------------------------------------------------*/ 421 /** @defgroup MMC_Exported_macros MMC Exported Macros 422 * @brief macros to handle interrupts and specific clock configurations 423 * @{ 424 */ 425 /** @brief Reset MMC handle state. 426 * @param __HANDLE__ : MMC handle. 427 * @retval None 428 */ 429 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 430 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) do { \ 431 (__HANDLE__)->State = HAL_MMC_STATE_RESET; \ 432 (__HANDLE__)->MspInitCallback = NULL; \ 433 (__HANDLE__)->MspDeInitCallback = NULL; \ 434 } while(0) 435 #else 436 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MMC_STATE_RESET) 437 #endif 438 439 #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx) 440 /** 441 * @brief Enable the MMC device. 442 * @retval None 443 */ 444 #define __HAL_MMC_ENABLE(__HANDLE__) __SDMMC_ENABLE((__HANDLE__)->Instance) 445 446 /** 447 * @brief Disable the MMC device. 448 * @retval None 449 */ 450 #define __HAL_MMC_DISABLE(__HANDLE__) __SDMMC_DISABLE((__HANDLE__)->Instance) 451 452 /** 453 * @brief Enable the SDMMC DMA transfer. 454 * @retval None 455 */ 456 #define __HAL_MMC_DMA_ENABLE(__HANDLE__) __SDMMC_DMA_ENABLE((__HANDLE__)->Instance) 457 458 /** 459 * @brief Disable the SDMMC DMA transfer. 460 * @retval None 461 */ 462 #define __HAL_MMC_DMA_DISABLE(__HANDLE__) __SDMMC_DMA_DISABLE((__HANDLE__)->Instance) 463 #endif 464 465 /** 466 * @brief Enable the MMC device interrupt. 467 * @param __HANDLE__ MMC Handle 468 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled. 469 * This parameter can be one or a combination of the following values: 470 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 471 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 472 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 473 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 474 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 475 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 476 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 477 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 478 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 479 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 480 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 481 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 482 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 483 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 484 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 485 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 486 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 487 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 488 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 489 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 490 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 491 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 492 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 493 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 494 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 495 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 496 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 497 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 498 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 499 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 500 * @retval None 501 */ 502 #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 503 504 /** 505 * @brief Disable the MMC device interrupt. 506 * @param __HANDLE__ MMC Handle 507 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled. 508 * This parameter can be one or a combination of the following values: 509 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 510 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 511 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 512 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 513 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 514 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 515 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 516 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 517 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 518 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 519 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 520 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 521 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 522 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 523 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 524 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 525 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 526 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 527 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 528 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 529 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 530 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 531 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 532 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 533 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 534 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 535 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 536 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 537 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 538 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 539 * @retval None 540 */ 541 #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 542 543 /** 544 * @brief Check whether the specified MMC flag is set or not. 545 * @param __HANDLE__ MMC Handle 546 * @param __FLAG__ specifies the flag to check. 547 * This parameter can be one of the following values: 548 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 549 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 550 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 551 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 552 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 553 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 554 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 555 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 556 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 557 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 558 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 559 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 560 * @arg SDMMC_FLAG_DPSMACT: Data path state machine active 561 * @arg SDMMC_FLAG_CPSMACT: Command path state machine active 562 * @arg SDMMC_FLAG_CMDACT: Command transfer in progress 563 * @arg SDMMC_FLAG_TXACT: Data transmit in progress 564 * @arg SDMMC_FLAG_RXACT: Data receive in progress 565 * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty 566 * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full 567 * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full 568 * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full 569 * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty 570 * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty 571 * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy) 572 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 573 * @arg SDMMC_FLAG_TXDAVL: Data available in transmit FIFO 574 * @arg SDMMC_FLAG_RXDAVL: Data available in receive FIFO 575 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 576 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 577 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 578 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 579 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 580 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 581 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 582 * @retval The new state of MMC FLAG (SET or RESET). 583 */ 584 #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) 585 586 /** 587 * @brief Clear the MMC's pending flags. 588 * @param __HANDLE__ MMC Handle 589 * @param __FLAG__ specifies the flag to clear. 590 * This parameter can be one or a combination of the following values: 591 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 592 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 593 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 594 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 595 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 596 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 597 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 598 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 599 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 600 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 601 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 602 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 603 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 604 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 605 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 606 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 607 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 608 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 609 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 610 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 611 * @retval None 612 */ 613 #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) 614 615 /** 616 * @brief Check whether the specified MMC interrupt has occurred or not. 617 * @param __HANDLE__ MMC Handle 618 * @param __INTERRUPT__ specifies the SDMMC interrupt source to check. 619 * This parameter can be one of the following values: 620 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 621 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 622 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 623 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 624 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 625 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 626 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 627 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 628 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 629 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 630 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 631 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 632 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 633 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 634 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 635 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 636 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 637 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 638 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 639 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 640 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 641 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 642 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 643 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 644 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 645 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 646 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 647 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 648 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 649 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 650 * @retval The new state of MMC IT (SET or RESET). 651 */ 652 #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 653 654 /** 655 * @brief Clear the MMC's interrupt pending bits. 656 * @param __HANDLE__ MMC Handle 657 * @param __INTERRUPT__ specifies the interrupt pending bit to clear. 658 * This parameter can be one or a combination of the following values: 659 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 660 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 661 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 662 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 663 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 664 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 665 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 666 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 667 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 668 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 669 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 670 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 671 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 672 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 673 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 674 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 675 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 676 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 677 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 678 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 679 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 680 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 681 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 682 * @retval None 683 */ 684 #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 685 686 /** 687 * @} 688 */ 689 690 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 691 /* Include MMC HAL Extension module */ 692 #include "stm32l4xx_hal_mmc_ex.h" 693 #endif 694 695 /* Exported functions --------------------------------------------------------*/ 696 /** @addtogroup MMC_Exported_Functions 697 * @{ 698 */ 699 700 /** @addtogroup MMC_Exported_Functions_Group1 701 * @{ 702 */ 703 HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc); 704 HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc); 705 HAL_StatusTypeDef HAL_MMC_DeInit (MMC_HandleTypeDef *hmmc); 706 void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc); 707 void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc); 708 709 /** 710 * @} 711 */ 712 713 /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions 714 * @{ 715 */ 716 /* Blocking mode: Polling */ 717 HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); 718 HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); 719 HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd); 720 /* Non-Blocking mode: IT */ 721 HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 722 HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 723 /* Non-Blocking mode: DMA */ 724 HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 725 HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 726 727 void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc); 728 729 /* Callback in non blocking modes (DMA) */ 730 void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc); 731 void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc); 732 void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc); 733 void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc); 734 735 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 736 /* MMC callback registering/unregistering */ 737 HAL_StatusTypeDef HAL_MMC_RegisterCallback (MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, pMMC_CallbackTypeDef pCallback); 738 HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId); 739 #endif 740 /** 741 * @} 742 */ 743 744 /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions 745 * @{ 746 */ 747 HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode); 748 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 749 HAL_StatusTypeDef HAL_MMC_ConfigSpeedBusOperation(MMC_HandleTypeDef *hmmc, uint32_t SpeedMode); 750 #endif 751 /** 752 * @} 753 */ 754 755 /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions 756 * @{ 757 */ 758 HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc); 759 HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID); 760 HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD); 761 HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo); 762 HAL_StatusTypeDef HAL_MMC_GetCardExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pExtCSD, uint32_t Timeout); 763 /** 764 * @} 765 */ 766 767 /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions 768 * @{ 769 */ 770 HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc); 771 uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc); 772 /** 773 * @} 774 */ 775 776 /** @defgroup MMC_Exported_Functions_Group6 Peripheral Abort management 777 * @{ 778 */ 779 HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc); 780 HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc); 781 /** 782 * @} 783 */ 784 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 785 /** @defgroup MMC_Exported_Functions_Group7 Peripheral Erase management 786 * @{ 787 */ 788 HAL_StatusTypeDef HAL_MMC_EraseSequence(MMC_HandleTypeDef *hmmc, uint32_t EraseType, uint32_t BlockStartAdd, uint32_t BlockEndAdd); 789 HAL_StatusTypeDef HAL_MMC_Sanitize(MMC_HandleTypeDef *hmmc); 790 HAL_StatusTypeDef HAL_MMC_ConfigSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t SRTMode); 791 HAL_StatusTypeDef HAL_MMC_GetSupportedSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t *SupportedSRT); 792 /** 793 * @} 794 */ 795 #endif /* defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) */ 796 797 /** 798 * @} 799 */ 800 801 /* Private types -------------------------------------------------------------*/ 802 /** @defgroup MMC_Private_Types MMC Private Types 803 * @{ 804 */ 805 806 /** 807 * @} 808 */ 809 810 /* Private defines -----------------------------------------------------------*/ 811 /** @defgroup MMC_Private_Defines MMC Private Defines 812 * @{ 813 */ 814 815 /** 816 * @} 817 */ 818 819 /* Private variables ---------------------------------------------------------*/ 820 /** @defgroup MMC_Private_Variables MMC Private Variables 821 * @{ 822 */ 823 824 /** 825 * @} 826 */ 827 828 /* Private constants ---------------------------------------------------------*/ 829 /** @defgroup MMC_Private_Constants MMC Private Constants 830 * @{ 831 */ 832 833 /** 834 * @} 835 */ 836 837 /* Private macros ------------------------------------------------------------*/ 838 /** @defgroup MMC_Private_Macros MMC Private Macros 839 * @{ 840 */ 841 842 /** 843 * @} 844 */ 845 846 /* Private functions prototypes ----------------------------------------------*/ 847 /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes 848 * @{ 849 */ 850 851 /** 852 * @} 853 */ 854 855 /* Private functions ---------------------------------------------------------*/ 856 /** @defgroup MMC_Private_Functions MMC Private Functions 857 * @{ 858 */ 859 860 /** 861 * @} 862 */ 863 864 865 /** 866 * @} 867 */ 868 869 /** 870 * @} 871 */ 872 873 #endif /* SDMMC1 */ 874 875 /** 876 * @} 877 */ 878 879 #ifdef __cplusplus 880 } 881 #endif 882 883 884 #endif /* STM32L4xx_HAL_MMC_H */ 885 886 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 887
