1 /** 2 ****************************************************************************** 3 * @file stm32h7xx_hal_flash.h 4 * @author MCD Application Team 5 * @brief Header file of FLASH HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32H7xx_HAL_FLASH_H 22 #define STM32H7xx_HAL_FLASH_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32h7xx_hal_def.h" 30 31 /** @addtogroup STM32H7xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup FLASH 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup FLASH_Exported_Types FLASH Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief FLASH Procedure structure definition 46 */ 47 typedef enum 48 { 49 FLASH_PROC_NONE = 0U, 50 FLASH_PROC_SECTERASE_BANK1, 51 FLASH_PROC_MASSERASE_BANK1, 52 FLASH_PROC_PROGRAM_BANK1, 53 FLASH_PROC_SECTERASE_BANK2, 54 FLASH_PROC_MASSERASE_BANK2, 55 FLASH_PROC_PROGRAM_BANK2, 56 FLASH_PROC_ALLBANK_MASSERASE 57 } FLASH_ProcedureTypeDef; 58 59 60 /** 61 * @brief FLASH handle Structure definition 62 */ 63 typedef struct 64 { 65 __IO FLASH_ProcedureTypeDef ProcedureOnGoing; /*!< Internal variable to indicate which procedure is ongoing or not in IT context */ 66 67 __IO uint32_t NbSectorsToErase; /*!< Internal variable to save the remaining sectors to erase in IT context */ 68 69 __IO uint32_t VoltageForErase; /*!< Internal variable to provide voltage range selected by user in IT context */ 70 71 __IO uint32_t Sector; /*!< Internal variable to define the current sector which is erasing */ 72 73 __IO uint32_t Address; /*!< Internal variable to save address selected for program */ 74 75 HAL_LockTypeDef Lock; /*!< FLASH locking object */ 76 77 __IO uint32_t ErrorCode; /*!< FLASH error code */ 78 79 }FLASH_ProcessTypeDef; 80 81 /** 82 * @} 83 */ 84 85 /* Exported constants --------------------------------------------------------*/ 86 /** @defgroup FLASH_Exported_Constants FLASH Exported Constants 87 * @{ 88 */ 89 90 /** @defgroup FLASH_Error_Code FLASH Error Code 91 * @brief FLASH Error Code 92 * @{ 93 */ 94 #define HAL_FLASH_ERROR_NONE 0x00000000U /*!< No error */ 95 96 #define HAL_FLASH_ERROR_WRP FLASH_FLAG_WRPERR /*!< Write Protection Error */ 97 #define HAL_FLASH_ERROR_PGS FLASH_FLAG_PGSERR /*!< Program Sequence Error */ 98 #define HAL_FLASH_ERROR_STRB FLASH_FLAG_STRBERR /*!< Strobe Error */ 99 #define HAL_FLASH_ERROR_INC FLASH_FLAG_INCERR /*!< Inconsistency Error */ 100 #if defined (FLASH_SR_OPERR) 101 #define HAL_FLASH_ERROR_OPE FLASH_FLAG_OPERR /*!< Operation Error */ 102 #endif /* FLASH_SR_OPERR */ 103 #define HAL_FLASH_ERROR_RDP FLASH_FLAG_RDPERR /*!< Read Protection Error */ 104 #define HAL_FLASH_ERROR_RDS FLASH_FLAG_RDSERR /*!< Read Secured Error */ 105 #define HAL_FLASH_ERROR_SNECC FLASH_FLAG_SNECCERR /*!< ECC Single Correction Error */ 106 #define HAL_FLASH_ERROR_DBECC FLASH_FLAG_DBECCERR /*!< ECC Double Detection Error */ 107 #define HAL_FLASH_ERROR_CRCRD FLASH_FLAG_CRCRDERR /*!< CRC Read Error */ 108 109 #define HAL_FLASH_ERROR_WRP_BANK1 FLASH_FLAG_WRPERR_BANK1 /*!< Write Protection Error on Bank 1 */ 110 #define HAL_FLASH_ERROR_PGS_BANK1 FLASH_FLAG_PGSERR_BANK1 /*!< Program Sequence Error on Bank 1 */ 111 #define HAL_FLASH_ERROR_STRB_BANK1 FLASH_FLAG_STRBERR_BANK1 /*!< Strobe Error on Bank 1 */ 112 #define HAL_FLASH_ERROR_INC_BANK1 FLASH_FLAG_INCERR_BANK1 /*!< Inconsistency Error on Bank 1 */ 113 #if defined (FLASH_SR_OPERR) 114 #define HAL_FLASH_ERROR_OPE_BANK1 FLASH_FLAG_OPERR_BANK1 /*!< Operation Error on Bank 1 */ 115 #endif /* FLASH_SR_OPERR */ 116 #define HAL_FLASH_ERROR_RDP_BANK1 FLASH_FLAG_RDPERR_BANK1 /*!< Read Protection Error on Bank 1 */ 117 #define HAL_FLASH_ERROR_RDS_BANK1 FLASH_FLAG_RDSERR_BANK1 /*!< Read Secured Error on Bank 1 */ 118 #define HAL_FLASH_ERROR_SNECC_BANK1 FLASH_FLAG_SNECCERR_BANK1 /*!< ECC Single Correction Error on Bank 1 */ 119 #define HAL_FLASH_ERROR_DBECC_BANK1 FLASH_FLAG_DBECCERR_BANK1 /*!< ECC Double Detection Error on Bank 1 */ 120 #define HAL_FLASH_ERROR_CRCRD_BANK1 FLASH_FLAG_CRCRDERR_BANK1 /*!< CRC Read Error on Bank1 */ 121 122 #define HAL_FLASH_ERROR_WRP_BANK2 FLASH_FLAG_WRPERR_BANK2 /*!< Write Protection Error on Bank 2 */ 123 #define HAL_FLASH_ERROR_PGS_BANK2 FLASH_FLAG_PGSERR_BANK2 /*!< Program Sequence Error on Bank 2 */ 124 #define HAL_FLASH_ERROR_STRB_BANK2 FLASH_FLAG_STRBERR_BANK2 /*!< Strobe Error on Bank 2 */ 125 #define HAL_FLASH_ERROR_INC_BANK2 FLASH_FLAG_INCERR_BANK2 /*!< Inconsistency Error on Bank 2 */ 126 #if defined (FLASH_SR_OPERR) 127 #define HAL_FLASH_ERROR_OPE_BANK2 FLASH_FLAG_OPERR_BANK2 /*!< Operation Error on Bank 2 */ 128 #endif /* FLASH_SR_OPERR */ 129 #define HAL_FLASH_ERROR_RDP_BANK2 FLASH_FLAG_RDPERR_BANK2 /*!< Read Protection Error on Bank 2 */ 130 #define HAL_FLASH_ERROR_RDS_BANK2 FLASH_FLAG_RDSERR_BANK2 /*!< Read Secured Error on Bank 2 */ 131 #define HAL_FLASH_ERROR_SNECC_BANK2 FLASH_FLAG_SNECCERR_BANK2 /*!< ECC Single Correction Error on Bank 2 */ 132 #define HAL_FLASH_ERROR_DBECC_BANK2 FLASH_FLAG_DBECCERR_BANK2 /*!< ECC Double Detection Error on Bank 2 */ 133 #define HAL_FLASH_ERROR_CRCRD_BANK2 FLASH_FLAG_CRCRDERR_BANK2 /*!< CRC Read Error on Bank2 */ 134 135 #define HAL_FLASH_ERROR_OB_CHANGE FLASH_OPTSR_OPTCHANGEERR /*!< Option Byte Change Error */ 136 /** 137 * @} 138 */ 139 140 /** @defgroup FLASH_Type_Program FLASH Type Program 141 * @{ 142 */ 143 #define FLASH_TYPEPROGRAM_FLASHWORD 0x01U /*!< Program a flash word at a specified address */ 144 #if defined (FLASH_OPTCR_PG_OTP) 145 #define FLASH_TYPEPROGRAM_OTPWORD 0x02U /*!< Program an OTP word at a specified address */ 146 #endif /* FLASH_OPTCR_PG_OTP */ 147 /** 148 * @} 149 */ 150 151 /** @defgroup FLASH_Flag_definition FLASH Flag definition 152 * @brief Flag definition 153 * @{ 154 */ 155 #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */ 156 #define FLASH_FLAG_WBNE FLASH_SR_WBNE /*!< Write Buffer Not Empty flag */ 157 #define FLASH_FLAG_QW FLASH_SR_QW /*!< Wait Queue on flag */ 158 #define FLASH_FLAG_CRC_BUSY FLASH_SR_CRC_BUSY /*!< CRC Busy flag */ 159 #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< End Of Program on flag */ 160 #define FLASH_FLAG_WRPERR FLASH_SR_WRPERR /*!< Write Protection Error on flag */ 161 #define FLASH_FLAG_PGSERR FLASH_SR_PGSERR /*!< Program Sequence Error on flag */ 162 #define FLASH_FLAG_STRBERR FLASH_SR_STRBERR /*!< Strobe Error flag */ 163 #define FLASH_FLAG_INCERR FLASH_SR_INCERR /*!< Inconsistency Error on flag */ 164 #if defined (FLASH_SR_OPERR) 165 #define FLASH_FLAG_OPERR FLASH_SR_OPERR /*!< Operation Error on flag */ 166 #endif /* FLASH_SR_OPERR */ 167 #define FLASH_FLAG_RDPERR FLASH_SR_RDPERR /*!< Read Protection Error on flag */ 168 #define FLASH_FLAG_RDSERR FLASH_SR_RDSERR /*!< Read Secured Error on flag */ 169 #define FLASH_FLAG_SNECCERR FLASH_SR_SNECCERR /*!< Single ECC Error Correction on flag */ 170 #define FLASH_FLAG_DBECCERR FLASH_SR_DBECCERR /*!< Double Detection ECC Error on flag */ 171 #define FLASH_FLAG_CRCEND FLASH_SR_CRCEND /*!< CRC End of Calculation flag */ 172 #define FLASH_FLAG_CRCRDERR FLASH_SR_CRCRDERR /*!< CRC Read Error on bank flag */ 173 174 #define FLASH_FLAG_BSY_BANK1 FLASH_SR_BSY /*!< FLASH Bank 1 Busy flag */ 175 #define FLASH_FLAG_WBNE_BANK1 FLASH_SR_WBNE /*!< Write Buffer Not Empty on Bank 1 flag */ 176 #define FLASH_FLAG_QW_BANK1 FLASH_SR_QW /*!< Wait Queue on Bank 1 flag */ 177 #define FLASH_FLAG_CRC_BUSY_BANK1 FLASH_SR_CRC_BUSY /*!< CRC Busy on Bank 1 flag */ 178 #define FLASH_FLAG_EOP_BANK1 FLASH_SR_EOP /*!< End Of Program on Bank 1 flag */ 179 #define FLASH_FLAG_WRPERR_BANK1 FLASH_SR_WRPERR /*!< Write Protection Error on Bank 1 flag */ 180 #define FLASH_FLAG_PGSERR_BANK1 FLASH_SR_PGSERR /*!< Program Sequence Error on Bank 1 flag */ 181 #define FLASH_FLAG_STRBERR_BANK1 FLASH_SR_STRBERR /*!< Strobe Error on Bank 1 flag */ 182 #define FLASH_FLAG_INCERR_BANK1 FLASH_SR_INCERR /*!< Inconsistency Error on Bank 1 flag */ 183 #if defined (FLASH_SR_OPERR) 184 #define FLASH_FLAG_OPERR_BANK1 FLASH_SR_OPERR /*!< Operation Error on Bank 1 flag */ 185 #endif /* FLASH_SR_OPERR */ 186 #define FLASH_FLAG_RDPERR_BANK1 FLASH_SR_RDPERR /*!< Read Protection Error on Bank 1 flag */ 187 #define FLASH_FLAG_RDSERR_BANK1 FLASH_SR_RDSERR /*!< Read Secured Error on Bank 1 flag */ 188 #define FLASH_FLAG_SNECCERR_BANK1 FLASH_SR_SNECCERR /*!< Single ECC Error Correction on Bank 1 flag */ 189 #define FLASH_FLAG_DBECCERR_BANK1 FLASH_SR_DBECCERR /*!< Double Detection ECC Error on Bank 1 flag */ 190 #define FLASH_FLAG_CRCEND_BANK1 FLASH_SR_CRCEND /*!< CRC End of Calculation on Bank 1 flag */ 191 #define FLASH_FLAG_CRCRDERR_BANK1 FLASH_SR_CRCRDERR /*!< CRC Read error on Bank 1 flag */ 192 193 #if defined (FLASH_SR_OPERR) 194 #define FLASH_FLAG_ALL_ERRORS_BANK1 (FLASH_FLAG_WRPERR_BANK1 | FLASH_FLAG_PGSERR_BANK1 | \ 195 FLASH_FLAG_STRBERR_BANK1 | FLASH_FLAG_INCERR_BANK1 | \ 196 FLASH_FLAG_OPERR_BANK1 | FLASH_FLAG_RDPERR_BANK1 | \ 197 FLASH_FLAG_RDSERR_BANK1 | FLASH_FLAG_SNECCERR_BANK1 | \ 198 FLASH_FLAG_DBECCERR_BANK1 | FLASH_FLAG_CRCRDERR_BANK1) /*!< All Bank 1 error flags */ 199 #else 200 #define FLASH_FLAG_ALL_ERRORS_BANK1 (FLASH_FLAG_WRPERR_BANK1 | FLASH_FLAG_PGSERR_BANK1 | \ 201 FLASH_FLAG_STRBERR_BANK1 | FLASH_FLAG_INCERR_BANK1 | \ 202 FLASH_FLAG_RDPERR_BANK1 | FLASH_FLAG_RDSERR_BANK1 | \ 203 FLASH_FLAG_SNECCERR_BANK1 | FLASH_FLAG_DBECCERR_BANK1 | \ 204 FLASH_FLAG_CRCRDERR_BANK1) /*!< All Bank 1 error flags */ 205 #endif /* FLASH_SR_OPERR */ 206 207 #define FLASH_FLAG_ALL_BANK1 (FLASH_FLAG_BSY_BANK1 | FLASH_FLAG_WBNE_BANK1 | \ 208 FLASH_FLAG_QW_BANK1 | FLASH_FLAG_CRC_BUSY_BANK1 | \ 209 FLASH_FLAG_EOP_BANK1 | FLASH_FLAG_CRCEND_BANK1 | \ 210 FLASH_FLAG_ALL_ERRORS_BANK1) /*!< All Bank 1 flags */ 211 212 #define FLASH_FLAG_BSY_BANK2 (FLASH_SR_BSY | 0x80000000U) /*!< FLASH Bank 2 Busy flag */ 213 #define FLASH_FLAG_WBNE_BANK2 (FLASH_SR_WBNE | 0x80000000U) /*!< Write Buffer Not Empty on Bank 2 flag */ 214 #define FLASH_FLAG_QW_BANK2 (FLASH_SR_QW | 0x80000000U) /*!< Wait Queue on Bank 2 flag */ 215 #define FLASH_FLAG_CRC_BUSY_BANK2 (FLASH_SR_CRC_BUSY | 0x80000000U) /*!< CRC Busy on Bank 2 flag */ 216 #define FLASH_FLAG_EOP_BANK2 (FLASH_SR_EOP | 0x80000000U) /*!< End Of Program on Bank 2 flag */ 217 #define FLASH_FLAG_WRPERR_BANK2 (FLASH_SR_WRPERR | 0x80000000U) /*!< Write Protection Error on Bank 2 flag */ 218 #define FLASH_FLAG_PGSERR_BANK2 (FLASH_SR_PGSERR | 0x80000000U) /*!< Program Sequence Error on Bank 2 flag */ 219 #define FLASH_FLAG_STRBERR_BANK2 (FLASH_SR_STRBERR | 0x80000000U) /*!< Strobe Error on Bank 2 flag */ 220 #define FLASH_FLAG_INCERR_BANK2 (FLASH_SR_INCERR | 0x80000000U) /*!< Inconsistency Error on Bank 2 flag */ 221 #if defined (FLASH_SR_OPERR) 222 #define FLASH_FLAG_OPERR_BANK2 (FLASH_SR_OPERR | 0x80000000U) /*!< Operation Error on Bank 2 flag */ 223 #endif /* FLASH_SR_OPERR */ 224 #define FLASH_FLAG_RDPERR_BANK2 (FLASH_SR_RDPERR | 0x80000000U) /*!< Read Protection Error on Bank 2 flag */ 225 #define FLASH_FLAG_RDSERR_BANK2 (FLASH_SR_RDSERR | 0x80000000U) /*!< Read Secured Error on Bank 2 flag */ 226 #define FLASH_FLAG_SNECCERR_BANK2 (FLASH_SR_SNECCERR | 0x80000000U) /*!< Single ECC Error Correction on Bank 2 flag */ 227 #define FLASH_FLAG_DBECCERR_BANK2 (FLASH_SR_DBECCERR | 0x80000000U) /*!< Double Detection ECC Error on Bank 2 flag */ 228 #define FLASH_FLAG_CRCEND_BANK2 (FLASH_SR_CRCEND | 0x80000000U) /*!< CRC End of Calculation on Bank 2 flag */ 229 #define FLASH_FLAG_CRCRDERR_BANK2 (FLASH_SR_CRCRDERR | 0x80000000U) /*!< CRC Read error on Bank 2 flag */ 230 231 #if defined (FLASH_SR_OPERR) 232 #define FLASH_FLAG_ALL_ERRORS_BANK2 (FLASH_FLAG_WRPERR_BANK2 | FLASH_FLAG_PGSERR_BANK2 | \ 233 FLASH_FLAG_STRBERR_BANK2 | FLASH_FLAG_INCERR_BANK2 | \ 234 FLASH_FLAG_OPERR_BANK2 | FLASH_FLAG_RDPERR_BANK2 | \ 235 FLASH_FLAG_RDSERR_BANK2 | FLASH_FLAG_SNECCERR_BANK2 | \ 236 FLASH_FLAG_DBECCERR_BANK2 | FLASH_FLAG_CRCRDERR_BANK2) /*!< All Bank 2 error flags */ 237 #else 238 #define FLASH_FLAG_ALL_ERRORS_BANK2 (FLASH_FLAG_WRPERR_BANK2 | FLASH_FLAG_PGSERR_BANK2 | \ 239 FLASH_FLAG_STRBERR_BANK2 | FLASH_FLAG_INCERR_BANK2 | \ 240 FLASH_FLAG_RDPERR_BANK2 | FLASH_FLAG_RDSERR_BANK2 | \ 241 FLASH_FLAG_SNECCERR_BANK2 | FLASH_FLAG_DBECCERR_BANK2 | \ 242 FLASH_FLAG_CRCRDERR_BANK2) /*!< All Bank 2 error flags */ 243 #endif /* FLASH_SR_OPERR */ 244 245 #define FLASH_FLAG_ALL_BANK2 (FLASH_FLAG_BSY_BANK2 | FLASH_FLAG_WBNE_BANK2 | \ 246 FLASH_FLAG_QW_BANK2 | FLASH_FLAG_CRC_BUSY_BANK2 | \ 247 FLASH_FLAG_EOP_BANK2 | FLASH_FLAG_CRCEND_BANK2 | \ 248 FLASH_FLAG_ALL_ERRORS_BANK2) /*!< All Bank 2 flags */ 249 /** 250 * @} 251 */ 252 253 /** @defgroup FLASH_Interrupt_definition FLASH Interrupt definition 254 * @brief FLASH Interrupt definition 255 * @{ 256 */ 257 #define FLASH_IT_EOP_BANK1 FLASH_CR_EOPIE /*!< End of FLASH Bank 1 Operation Interrupt source */ 258 #define FLASH_IT_WRPERR_BANK1 FLASH_CR_WRPERRIE /*!< Write Protection Error on Bank 1 Interrupt source */ 259 #define FLASH_IT_PGSERR_BANK1 FLASH_CR_PGSERRIE /*!< Program Sequence Error on Bank 1 Interrupt source */ 260 #define FLASH_IT_STRBERR_BANK1 FLASH_CR_STRBERRIE /*!< Strobe Error on Bank 1 Interrupt source */ 261 #define FLASH_IT_INCERR_BANK1 FLASH_CR_INCERRIE /*!< Inconsistency Error on Bank 1 Interrupt source */ 262 #if defined (FLASH_CR_OPERRIE) 263 #define FLASH_IT_OPERR_BANK1 FLASH_CR_OPERRIE /*!< Operation Error on Bank 1 Interrupt source */ 264 #endif /* FLASH_CR_OPERRIE */ 265 #define FLASH_IT_RDPERR_BANK1 FLASH_CR_RDPERRIE /*!< Read protection Error on Bank 1 Interrupt source */ 266 #define FLASH_IT_RDSERR_BANK1 FLASH_CR_RDSERRIE /*!< Read Secured Error on Bank 1 Interrupt source */ 267 #define FLASH_IT_SNECCERR_BANK1 FLASH_CR_SNECCERRIE /*!< Single ECC Error Correction on Bank 1 Interrupt source */ 268 #define FLASH_IT_DBECCERR_BANK1 FLASH_CR_DBECCERRIE /*!< Double Detection ECC Error on Bank 1 Interrupt source */ 269 #define FLASH_IT_CRCEND_BANK1 FLASH_CR_CRCENDIE /*!< CRC End on Bank 1 Interrupt source */ 270 #define FLASH_IT_CRCRDERR_BANK1 FLASH_CR_CRCRDERRIE /*!< CRC Read error on Bank 1 Interrupt source */ 271 272 #if defined (FLASH_CR_OPERRIE) 273 #define FLASH_IT_ALL_BANK1 (FLASH_IT_EOP_BANK1 | FLASH_IT_WRPERR_BANK1 | \ 274 FLASH_IT_PGSERR_BANK1 | FLASH_IT_STRBERR_BANK1 | \ 275 FLASH_IT_INCERR_BANK1 | FLASH_IT_OPERR_BANK1 | \ 276 FLASH_IT_RDPERR_BANK1 | FLASH_IT_RDSERR_BANK1 | \ 277 FLASH_IT_SNECCERR_BANK1 | FLASH_IT_DBECCERR_BANK1 | \ 278 FLASH_IT_CRCEND_BANK1 | FLASH_IT_CRCRDERR_BANK1) /*!< All Bank 1 Interrupt sources */ 279 #else 280 #define FLASH_IT_ALL_BANK1 (FLASH_IT_EOP_BANK1 | FLASH_IT_WRPERR_BANK1 | \ 281 FLASH_IT_PGSERR_BANK1 | FLASH_IT_STRBERR_BANK1 | \ 282 FLASH_IT_INCERR_BANK1 | FLASH_IT_RDPERR_BANK1 | \ 283 FLASH_IT_RDSERR_BANK1 | FLASH_IT_SNECCERR_BANK1 | \ 284 FLASH_IT_DBECCERR_BANK1 | FLASH_IT_CRCEND_BANK1 | \ 285 FLASH_IT_CRCRDERR_BANK1) /*!< All Bank 1 Interrupt sources */ 286 #endif /* FLASH_CR_OPERRIE */ 287 288 #define FLASH_IT_EOP_BANK2 (FLASH_CR_EOPIE | 0x80000000U) /*!< End of FLASH Bank 2 Operation Interrupt source */ 289 #define FLASH_IT_WRPERR_BANK2 (FLASH_CR_WRPERRIE | 0x80000000U) /*!< Write Protection Error on Bank 2 Interrupt source */ 290 #define FLASH_IT_PGSERR_BANK2 (FLASH_CR_PGSERRIE | 0x80000000U) /*!< Program Sequence Error on Bank 2 Interrupt source */ 291 #define FLASH_IT_STRBERR_BANK2 (FLASH_CR_STRBERRIE | 0x80000000U) /*!< Strobe Error on Bank 2 Interrupt source */ 292 #define FLASH_IT_INCERR_BANK2 (FLASH_CR_INCERRIE | 0x80000000U) /*!< Inconsistency Error on Bank 2 Interrupt source */ 293 #if defined (FLASH_CR_OPERRIE) 294 #define FLASH_IT_OPERR_BANK2 (FLASH_CR_OPERRIE | 0x80000000U) /*!< Operation Error on Bank 2 Interrupt source */ 295 #endif /* FLASH_CR_OPERRIE */ 296 #define FLASH_IT_RDPERR_BANK2 (FLASH_CR_RDPERRIE | 0x80000000U) /*!< Read protection Error on Bank 2 Interrupt source */ 297 #define FLASH_IT_RDSERR_BANK2 (FLASH_CR_RDSERRIE | 0x80000000U) /*!< Read Secured Error on Bank 2 Interrupt source */ 298 #define FLASH_IT_SNECCERR_BANK2 (FLASH_CR_SNECCERRIE | 0x80000000U) /*!< Single ECC Error Correction on Bank 2 Interrupt source */ 299 #define FLASH_IT_DBECCERR_BANK2 (FLASH_CR_DBECCERRIE | 0x80000000U) /*!< Double Detection ECC Error on Bank 2 Interrupt source */ 300 #define FLASH_IT_CRCEND_BANK2 (FLASH_CR_CRCENDIE | 0x80000000U) /*!< CRC End on Bank 2 Interrupt source */ 301 #define FLASH_IT_CRCRDERR_BANK2 (FLASH_CR_CRCRDERRIE | 0x80000000U) /*!< CRC Read Error on Bank 2 Interrupt source */ 302 303 #if defined (FLASH_CR_OPERRIE) 304 #define FLASH_IT_ALL_BANK2 (FLASH_IT_EOP_BANK2 | FLASH_IT_WRPERR_BANK2 | \ 305 FLASH_IT_PGSERR_BANK2 | FLASH_IT_STRBERR_BANK2 | \ 306 FLASH_IT_INCERR_BANK2 | FLASH_IT_OPERR_BANK2 | \ 307 FLASH_IT_RDPERR_BANK2 | FLASH_IT_RDSERR_BANK2 | \ 308 FLASH_IT_SNECCERR_BANK2 | FLASH_IT_DBECCERR_BANK2 | \ 309 FLASH_IT_CRCEND_BANK2 | FLASH_IT_CRCRDERR_BANK2) /*!< All Bank 2 Interrupt sources */ 310 #else 311 #define FLASH_IT_ALL_BANK2 (FLASH_IT_EOP_BANK2 | FLASH_IT_WRPERR_BANK2 | \ 312 FLASH_IT_PGSERR_BANK2 | FLASH_IT_STRBERR_BANK2 | \ 313 FLASH_IT_INCERR_BANK2 | FLASH_IT_RDPERR_BANK2 | \ 314 FLASH_IT_RDSERR_BANK2 | FLASH_IT_SNECCERR_BANK2 | \ 315 FLASH_IT_DBECCERR_BANK2 | FLASH_IT_CRCEND_BANK2 | \ 316 FLASH_IT_CRCRDERR_BANK2) /*!< All Bank 2 Interrupt sources */ 317 #endif /* FLASH_CR_OPERRIE */ 318 /** 319 * @} 320 */ 321 322 #if defined (FLASH_CR_PSIZE) 323 /** @defgroup FLASH_Program_Parallelism FLASH Program Parallelism 324 * @{ 325 */ 326 #define FLASH_PSIZE_BYTE 0x00000000U /*!< Flash program/erase by 8 bits */ 327 #define FLASH_PSIZE_HALF_WORD FLASH_CR_PSIZE_0 /*!< Flash program/erase by 16 bits */ 328 #define FLASH_PSIZE_WORD FLASH_CR_PSIZE_1 /*!< Flash program/erase by 32 bits */ 329 #define FLASH_PSIZE_DOUBLE_WORD FLASH_CR_PSIZE /*!< Flash program/erase by 64 bits */ 330 /** 331 * @} 332 */ 333 #endif /* FLASH_CR_PSIZE */ 334 335 336 /** @defgroup FLASH_Keys FLASH Keys 337 * @{ 338 */ 339 #define FLASH_KEY1 0x45670123U 340 #define FLASH_KEY2 0xCDEF89ABU 341 #define FLASH_OPT_KEY1 0x08192A3BU 342 #define FLASH_OPT_KEY2 0x4C5D6E7FU 343 /** 344 * @} 345 */ 346 347 /** @defgroup FLASH_Sectors FLASH Sectors 348 * @{ 349 */ 350 #define FLASH_SECTOR_0 0U /*!< Sector Number 0 */ 351 #define FLASH_SECTOR_1 1U /*!< Sector Number 1 */ 352 #define FLASH_SECTOR_2 2U /*!< Sector Number 2 */ 353 #define FLASH_SECTOR_3 3U /*!< Sector Number 3 */ 354 #define FLASH_SECTOR_4 4U /*!< Sector Number 4 */ 355 #define FLASH_SECTOR_5 5U /*!< Sector Number 5 */ 356 #define FLASH_SECTOR_6 6U /*!< Sector Number 6 */ 357 #define FLASH_SECTOR_7 7U /*!< Sector Number 7 */ 358 #if (FLASH_SECTOR_TOTAL == 128) 359 #define FLASH_SECTOR_8 8U /*!< Sector Number 8 */ 360 #define FLASH_SECTOR_9 9U /*!< Sector Number 9 */ 361 #define FLASH_SECTOR_10 10U /*!< Sector Number 10 */ 362 #define FLASH_SECTOR_11 11U /*!< Sector Number 11 */ 363 #define FLASH_SECTOR_12 12U /*!< Sector Number 12 */ 364 #define FLASH_SECTOR_13 13U /*!< Sector Number 13 */ 365 #define FLASH_SECTOR_14 14U /*!< Sector Number 14 */ 366 #define FLASH_SECTOR_15 15U /*!< Sector Number 15 */ 367 #define FLASH_SECTOR_16 16U /*!< Sector Number 16 */ 368 #define FLASH_SECTOR_17 17U /*!< Sector Number 17 */ 369 #define FLASH_SECTOR_18 18U /*!< Sector Number 18 */ 370 #define FLASH_SECTOR_19 19U /*!< Sector Number 19 */ 371 #define FLASH_SECTOR_20 20U /*!< Sector Number 20 */ 372 #define FLASH_SECTOR_21 21U /*!< Sector Number 21 */ 373 #define FLASH_SECTOR_22 22U /*!< Sector Number 22 */ 374 #define FLASH_SECTOR_23 23U /*!< Sector Number 23 */ 375 #define FLASH_SECTOR_24 24U /*!< Sector Number 24 */ 376 #define FLASH_SECTOR_25 25U /*!< Sector Number 25 */ 377 #define FLASH_SECTOR_26 26U /*!< Sector Number 26 */ 378 #define FLASH_SECTOR_27 27U /*!< Sector Number 27 */ 379 #define FLASH_SECTOR_28 28U /*!< Sector Number 28 */ 380 #define FLASH_SECTOR_29 29U /*!< Sector Number 29 */ 381 #define FLASH_SECTOR_30 30U /*!< Sector Number 30 */ 382 #define FLASH_SECTOR_31 31U /*!< Sector Number 31 */ 383 #define FLASH_SECTOR_32 32U /*!< Sector Number 32 */ 384 #define FLASH_SECTOR_33 33U /*!< Sector Number 33 */ 385 #define FLASH_SECTOR_34 34U /*!< Sector Number 34 */ 386 #define FLASH_SECTOR_35 35U /*!< Sector Number 35 */ 387 #define FLASH_SECTOR_36 36U /*!< Sector Number 36 */ 388 #define FLASH_SECTOR_37 37U /*!< Sector Number 37 */ 389 #define FLASH_SECTOR_38 38U /*!< Sector Number 38 */ 390 #define FLASH_SECTOR_39 39U /*!< Sector Number 39 */ 391 #define FLASH_SECTOR_40 40U /*!< Sector Number 40 */ 392 #define FLASH_SECTOR_41 41U /*!< Sector Number 41 */ 393 #define FLASH_SECTOR_42 42U /*!< Sector Number 42 */ 394 #define FLASH_SECTOR_43 43U /*!< Sector Number 43 */ 395 #define FLASH_SECTOR_44 44U /*!< Sector Number 44 */ 396 #define FLASH_SECTOR_45 45U /*!< Sector Number 45 */ 397 #define FLASH_SECTOR_46 46U /*!< Sector Number 46 */ 398 #define FLASH_SECTOR_47 47U /*!< Sector Number 47 */ 399 #define FLASH_SECTOR_48 48U /*!< Sector Number 48 */ 400 #define FLASH_SECTOR_49 49U /*!< Sector Number 49 */ 401 #define FLASH_SECTOR_50 50U /*!< Sector Number 50 */ 402 #define FLASH_SECTOR_51 51U /*!< Sector Number 51 */ 403 #define FLASH_SECTOR_52 52U /*!< Sector Number 52 */ 404 #define FLASH_SECTOR_53 53U /*!< Sector Number 53 */ 405 #define FLASH_SECTOR_54 54U /*!< Sector Number 54 */ 406 #define FLASH_SECTOR_55 55U /*!< Sector Number 55 */ 407 #define FLASH_SECTOR_56 56U /*!< Sector Number 56 */ 408 #define FLASH_SECTOR_57 57U /*!< Sector Number 57 */ 409 #define FLASH_SECTOR_58 58U /*!< Sector Number 58 */ 410 #define FLASH_SECTOR_59 59U /*!< Sector Number 59 */ 411 #define FLASH_SECTOR_60 60U /*!< Sector Number 60 */ 412 #define FLASH_SECTOR_61 61U /*!< Sector Number 61 */ 413 #define FLASH_SECTOR_62 62U /*!< Sector Number 62 */ 414 #define FLASH_SECTOR_63 63U /*!< Sector Number 63 */ 415 #define FLASH_SECTOR_64 64U /*!< Sector Number 64 */ 416 #define FLASH_SECTOR_65 65U /*!< Sector Number 65 */ 417 #define FLASH_SECTOR_66 66U /*!< Sector Number 66 */ 418 #define FLASH_SECTOR_67 67U /*!< Sector Number 67 */ 419 #define FLASH_SECTOR_68 68U /*!< Sector Number 68 */ 420 #define FLASH_SECTOR_69 69U /*!< Sector Number 69 */ 421 #define FLASH_SECTOR_70 70U /*!< Sector Number 70 */ 422 #define FLASH_SECTOR_71 71U /*!< Sector Number 71 */ 423 #define FLASH_SECTOR_72 72U /*!< Sector Number 72 */ 424 #define FLASH_SECTOR_73 73U /*!< Sector Number 73 */ 425 #define FLASH_SECTOR_74 74U /*!< Sector Number 74 */ 426 #define FLASH_SECTOR_75 75U /*!< Sector Number 75 */ 427 #define FLASH_SECTOR_76 76U /*!< Sector Number 76 */ 428 #define FLASH_SECTOR_77 77U /*!< Sector Number 77 */ 429 #define FLASH_SECTOR_78 78U /*!< Sector Number 78 */ 430 #define FLASH_SECTOR_79 79U /*!< Sector Number 79 */ 431 #define FLASH_SECTOR_80 80U /*!< Sector Number 80 */ 432 #define FLASH_SECTOR_81 81U /*!< Sector Number 81 */ 433 #define FLASH_SECTOR_82 82U /*!< Sector Number 82 */ 434 #define FLASH_SECTOR_83 83U /*!< Sector Number 83 */ 435 #define FLASH_SECTOR_84 84U /*!< Sector Number 84 */ 436 #define FLASH_SECTOR_85 85U /*!< Sector Number 85 */ 437 #define FLASH_SECTOR_86 86U /*!< Sector Number 86 */ 438 #define FLASH_SECTOR_87 87U /*!< Sector Number 87 */ 439 #define FLASH_SECTOR_88 88U /*!< Sector Number 88 */ 440 #define FLASH_SECTOR_89 89U /*!< Sector Number 89 */ 441 #define FLASH_SECTOR_90 90U /*!< Sector Number 90 */ 442 #define FLASH_SECTOR_91 91U /*!< Sector Number 91 */ 443 #define FLASH_SECTOR_92 92U /*!< Sector Number 92 */ 444 #define FLASH_SECTOR_93 93U /*!< Sector Number 93 */ 445 #define FLASH_SECTOR_94 94U /*!< Sector Number 94 */ 446 #define FLASH_SECTOR_95 95U /*!< Sector Number 95 */ 447 #define FLASH_SECTOR_96 96U /*!< Sector Number 96 */ 448 #define FLASH_SECTOR_97 97U /*!< Sector Number 97 */ 449 #define FLASH_SECTOR_98 98U /*!< Sector Number 98 */ 450 #define FLASH_SECTOR_99 99U /*!< Sector Number 99 */ 451 #define FLASH_SECTOR_100 100U /*!< Sector Number 100 */ 452 #define FLASH_SECTOR_101 101U /*!< Sector Number 101 */ 453 #define FLASH_SECTOR_102 102U /*!< Sector Number 102 */ 454 #define FLASH_SECTOR_103 103U /*!< Sector Number 103 */ 455 #define FLASH_SECTOR_104 104U /*!< Sector Number 104 */ 456 #define FLASH_SECTOR_105 105U /*!< Sector Number 105 */ 457 #define FLASH_SECTOR_106 106U /*!< Sector Number 106 */ 458 #define FLASH_SECTOR_107 107U /*!< Sector Number 107 */ 459 #define FLASH_SECTOR_108 108U /*!< Sector Number 108 */ 460 #define FLASH_SECTOR_109 109U /*!< Sector Number 109 */ 461 #define FLASH_SECTOR_110 110U /*!< Sector Number 110 */ 462 #define FLASH_SECTOR_111 111U /*!< Sector Number 111 */ 463 #define FLASH_SECTOR_112 112U /*!< Sector Number 112 */ 464 #define FLASH_SECTOR_113 113U /*!< Sector Number 113 */ 465 #define FLASH_SECTOR_114 114U /*!< Sector Number 114 */ 466 #define FLASH_SECTOR_115 115U /*!< Sector Number 115 */ 467 #define FLASH_SECTOR_116 116U /*!< Sector Number 116 */ 468 #define FLASH_SECTOR_117 117U /*!< Sector Number 117 */ 469 #define FLASH_SECTOR_118 118U /*!< Sector Number 118 */ 470 #define FLASH_SECTOR_119 119U /*!< Sector Number 119 */ 471 #define FLASH_SECTOR_120 120U /*!< Sector Number 120 */ 472 #define FLASH_SECTOR_121 121U /*!< Sector Number 121 */ 473 #define FLASH_SECTOR_122 122U /*!< Sector Number 122 */ 474 #define FLASH_SECTOR_123 123U /*!< Sector Number 123 */ 475 #define FLASH_SECTOR_124 124U /*!< Sector Number 124 */ 476 #define FLASH_SECTOR_125 125U /*!< Sector Number 125 */ 477 #define FLASH_SECTOR_126 126U /*!< Sector Number 126 */ 478 #define FLASH_SECTOR_127 127U /*!< Sector Number 127 */ 479 #endif /* FLASH_SECTOR_TOTAL == 128 */ 480 /** 481 * @} 482 */ 483 484 /** 485 * @} 486 */ 487 488 /* Exported macro ------------------------------------------------------------*/ 489 /** @defgroup FLASH_Exported_Macros FLASH Exported Macros 490 * @{ 491 */ 492 /** 493 * @brief Set the FLASH Latency. 494 * @param __LATENCY__: FLASH Latency 495 * The value of this parameter depend on device used within the same series 496 * @retval none 497 */ 498 #define __HAL_FLASH_SET_LATENCY(__LATENCY__) \ 499 MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(__LATENCY__)) 500 501 /** 502 * @brief Get the FLASH Latency. 503 * @retval FLASH Latency 504 * The value of this parameter depend on device used within the same series 505 */ 506 #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)) 507 508 /** 509 * @brief Enable the specified FLASH interrupt. 510 * @param __INTERRUPT__ : FLASH interrupt 511 * In case of Bank 1 This parameter can be any combination of the following values: 512 * @arg FLASH_IT_EOP_BANK1 : End of FLASH Bank 1 Operation Interrupt source 513 * @arg FLASH_IT_WRPERR_BANK1 : Write Protection Error on Bank 1 Interrupt source 514 * @arg FLASH_IT_PGSERR_BANK1 : Program Sequence Error on Bank 1 Interrupt source 515 * @arg FLASH_IT_STRBERR_BANK1 : Strobe Error on Bank 1 Interrupt source 516 * @arg FLASH_IT_INCERR_BANK1 : Inconsistency Error on Bank 1 Interrupt source 517 * @arg FLASH_IT_OPERR_BANK1 : Operation Error on Bank 1 Interrupt source 518 * @arg FLASH_IT_RDPERR_BANK1 : Read protection Error on Bank 1 Interrupt source 519 * @arg FLASH_IT_RDSERR_BANK1 : Read secure Error on Bank 1 Interrupt source 520 * @arg FLASH_IT_SNECCERR_BANK1 : Single ECC Error Correction on Bank 1 Interrupt source 521 * @arg FLASH_IT_DBECCERR_BANK1 : Double Detection ECC Error on Bank 1 Interrupt source 522 * @arg FLASH_IT_CRCEND_BANK1 : CRC End on Bank 1 Interrupt source 523 * @arg FLASH_IT_CRCRDERR_BANK1 : CRC Read error on Bank 1 Interrupt source 524 * @arg FLASH_IT_ALL_BANK1 : All Bank 1 Interrupt sources 525 * 526 * In case of Bank 2, this parameter can be any combination of the following values: 527 * @arg FLASH_IT_EOP_BANK2 : End of FLASH Bank 2 Operation Interrupt source 528 * @arg FLASH_IT_WRPERR_BANK2 : Write Protection Error on Bank 2 Interrupt source 529 * @arg FLASH_IT_PGSERR_BANK2 : Program Sequence Error on Bank 2 Interrupt source 530 * @arg FLASH_IT_STRBERR_BANK2 : Strobe Error on Bank 2 Interrupt source 531 * @arg FLASH_IT_INCERR_BANK2 : Inconsistency Error on Bank 2 Interrupt source 532 * @arg FLASH_IT_OPERR_BANK2 : Operation Error on Bank 2 Interrupt source 533 * @arg FLASH_IT_RDPERR_BANK2 : Read protection Error on Bank 2 Interrupt source 534 * @arg FLASH_IT_RDSERR_BANK2 : Read secure Error on Bank 2 Interrupt source 535 * @arg FLASH_IT_SNECCERR_BANK2 : Single ECC Error Correction on Bank 2 Interrupt source 536 * @arg FLASH_IT_DBECCERR_BANK2 : Double Detection ECC Error on Bank 2 Interrupt source 537 * @arg FLASH_IT_CRCEND_BANK2 : CRC End on Bank 2 Interrupt source 538 * @arg FLASH_IT_CRCRDERR_BANK2 : CRC Read error on Bank 2 Interrupt source 539 * @arg FLASH_IT_ALL_BANK2 : All Bank 2 Interrupt sources 540 * @retval none 541 */ 542 543 #define __HAL_FLASH_ENABLE_IT_BANK1(__INTERRUPT__) (FLASH->CR1 |= (__INTERRUPT__)) 544 545 #define __HAL_FLASH_ENABLE_IT_BANK2(__INTERRUPT__) (FLASH->CR2 |= ((__INTERRUPT__) & 0x7FFFFFFFU)) 546 547 #if defined (DUAL_BANK) 548 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (IS_FLASH_IT_BANK1(__INTERRUPT__) ? \ 549 __HAL_FLASH_ENABLE_IT_BANK1(__INTERRUPT__) : \ 550 __HAL_FLASH_ENABLE_IT_BANK2(__INTERRUPT__)) 551 #else 552 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) __HAL_FLASH_ENABLE_IT_BANK1(__INTERRUPT__) 553 #endif /* DUAL_BANK */ 554 555 556 /** 557 * @brief Disable the specified FLASH interrupt. 558 * @param __INTERRUPT__ : FLASH interrupt 559 * In case of Bank 1 This parameter can be any combination of the following values: 560 * @arg FLASH_IT_EOP_BANK1 : End of FLASH Bank 1 Operation Interrupt source 561 * @arg FLASH_IT_WRPERR_BANK1 : Write Protection Error on Bank 1 Interrupt source 562 * @arg FLASH_IT_PGSERR_BANK1 : Program Sequence Error on Bank 1 Interrupt source 563 * @arg FLASH_IT_STRBERR_BANK1 : Strobe Error on Bank 1 Interrupt source 564 * @arg FLASH_IT_INCERR_BANK1 : Inconsistency Error on Bank 1 Interrupt source 565 * @arg FLASH_IT_OPERR_BANK1 : Operation Error on Bank 1 Interrupt source 566 * @arg FLASH_IT_RDPERR_BANK1 : Read protection Error on Bank 1 Interrupt source 567 * @arg FLASH_IT_RDSERR_BANK1 : Read secure Error on Bank 1 Interrupt source 568 * @arg FLASH_IT_SNECCERR_BANK1 : Single ECC Error Correction on Bank 1 Interrupt source 569 * @arg FLASH_IT_DBECCERR_BANK1 : Double Detection ECC Error on Bank 1 Interrupt source 570 * @arg FLASH_IT_CRCEND_BANK1 : CRC End on Bank 1 Interrupt source 571 * @arg FLASH_IT_CRCRDERR_BANK1 : CRC Read error on Bank 1 Interrupt source 572 * @arg FLASH_IT_ALL_BANK1 : All Bank 1 Interrupt sources 573 * 574 * In case of Bank 2, this parameter can be any combination of the following values: 575 * @arg FLASH_IT_EOP_BANK2 : End of FLASH Bank 2 Operation Interrupt source 576 * @arg FLASH_IT_WRPERR_BANK2 : Write Protection Error on Bank 2 Interrupt source 577 * @arg FLASH_IT_PGSERR_BANK2 : Program Sequence Error on Bank 2 Interrupt source 578 * @arg FLASH_IT_STRBERR_BANK2 : Strobe Error on Bank 2 Interrupt source 579 * @arg FLASH_IT_INCERR_BANK2 : Inconsistency Error on Bank 2 Interrupt source 580 * @arg FLASH_IT_OPERR_BANK2 : Operation Error on Bank 2 Interrupt source 581 * @arg FLASH_IT_RDPERR_BANK2 : Read protection Error on Bank 2 Interrupt source 582 * @arg FLASH_IT_RDSERR_BANK2 : Read secure Error on Bank 2 Interrupt source 583 * @arg FLASH_IT_SNECCERR_BANK2 : Single ECC Error Correction on Bank 2 Interrupt source 584 * @arg FLASH_IT_DBECCERR_BANK2 : Double Detection ECC Error on Bank 2 Interrupt source 585 * @arg FLASH_IT_CRCEND_BANK2 : CRC End on Bank 2 Interrupt source 586 * @arg FLASH_IT_CRCRDERR_BANK2 : CRC Read error on Bank 2 Interrupt source 587 * @arg FLASH_IT_ALL_BANK2 : All Bank 2 Interrupt sources 588 * @retval none 589 */ 590 591 #define __HAL_FLASH_DISABLE_IT_BANK1(__INTERRUPT__) (FLASH->CR1 &= ~(uint32_t)(__INTERRUPT__)) 592 593 #define __HAL_FLASH_DISABLE_IT_BANK2(__INTERRUPT__) (FLASH->CR2 &= ~(uint32_t)((__INTERRUPT__) & 0x7FFFFFFFU)) 594 595 #if defined (DUAL_BANK) 596 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (IS_FLASH_IT_BANK1(__INTERRUPT__) ? \ 597 __HAL_FLASH_DISABLE_IT_BANK1(__INTERRUPT__) : \ 598 __HAL_FLASH_DISABLE_IT_BANK2(__INTERRUPT__)) 599 #else 600 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) __HAL_FLASH_DISABLE_IT_BANK1(__INTERRUPT__) 601 #endif /* DUAL_BANK */ 602 603 604 /** 605 * @brief Checks whether the specified FLASH flag is set or not. 606 * @param __FLAG__: specifies the FLASH flag to check. 607 * In case of Bank 1 This parameter can be one of the following values : 608 * @arg FLASH_FLAG_BSY_BANK1 : FLASH Bank 1 Busy flag 609 * @arg FLASH_FLAG_WBNE_BANK1 : Write Buffer Not Empty on Bank 1 flag 610 * @arg FLASH_FLAG_QW_BANK1 : Wait Queue on Bank 1 flag 611 * @arg FLASH_FLAG_CRC_BUSY_BANK1 : CRC module is working on Bank 1 flag 612 * @arg FLASH_FLAG_EOP_BANK1 : End Of Program on Bank 1 flag 613 * @arg FLASH_FLAG_WRPERR_BANK1 : Write Protection Error on Bank 1 flag 614 * @arg FLASH_FLAG_PGSERR_BANK1 : Program Sequence Error on Bank 1 flag 615 * @arg FLASH_FLAG_STRBER_BANK1 : Program Alignment Error on Bank 1 flag 616 * @arg FLASH_FLAG_INCERR_BANK1 : Inconsistency Error on Bank 1 flag 617 * @arg FLASH_FLAG_OPERR_BANK1 : Operation Error on Bank 1 flag 618 * @arg FLASH_FLAG_RDPERR_BANK1 : Read Protection Error on Bank 1 flag 619 * @arg FLASH_FLAG_RDSERR_BANK1 : Read secure Error on Bank 1 flag 620 * @arg FLASH_FLAG_SNECCE_BANK1 : Single ECC Error Correction on Bank 1 flag 621 * @arg FLASH_FLAG_DBECCE_BANK1 : Double Detection ECC Error on Bank 1 flag 622 * @arg FLASH_FLAG_CRCEND_BANK1 : CRC End on Bank 1 flag 623 * @arg FLASH_FLAG_CRCRDERR_BANK1 : CRC Read error on Bank 1 flag 624 * 625 * In case of Bank 2 This parameter can be one of the following values : 626 * @arg FLASH_FLAG_BSY_BANK2 : FLASH Bank 2 Busy flag 627 * @arg FLASH_FLAG_WBNE_BANK2 : Write Buffer Not Empty on Bank 2 flag 628 * @arg FLASH_FLAG_QW_BANK2 : Wait Queue on Bank 2 flag 629 * @arg FLASH_FLAG_CRC_BUSY_BANK2 : CRC module is working on Bank 2 flag 630 * @arg FLASH_FLAG_EOP_BANK2 : End Of Program on Bank 2 flag 631 * @arg FLASH_FLAG_WRPERR_BANK2 : Write Protection Error on Bank 2 flag 632 * @arg FLASH_FLAG_PGSERR_BANK2 : Program Sequence Error on Bank 2 flag 633 * @arg FLASH_FLAG_STRBER_BANK2 : Program Alignment Error on Bank 2 flag 634 * @arg FLASH_FLAG_INCERR_BANK2 : Inconsistency Error on Bank 2 flag 635 * @arg FLASH_FLAG_OPERR_BANK2 : Operation Error on Bank 2 flag 636 * @arg FLASH_FLAG_RDPERR_BANK2 : Read Protection Error on Bank 2 flag 637 * @arg FLASH_FLAG_RDSERR_BANK2 : Read secure Error on Bank 2 flag 638 * @arg FLASH_FLAG_SNECCE_BANK2 : Single ECC Error Correction on Bank 2 flag 639 * @arg FLASH_FLAG_DBECCE_BANK2 : Double Detection ECC Error on Bank 2 flag 640 * @arg FLASH_FLAG_CRCEND_BANK2 : CRC End on Bank 2 flag 641 * @arg FLASH_FLAG_CRCRDERR_BANK2 : CRC Read error on Bank 2 flag 642 * @retval The new state of FLASH_FLAG (SET or RESET). 643 */ 644 #define __HAL_FLASH_GET_FLAG_BANK1(__FLAG__) (READ_BIT(FLASH->SR1, (__FLAG__)) == (__FLAG__)) 645 646 #define __HAL_FLASH_GET_FLAG_BANK2(__FLAG__) (READ_BIT(FLASH->SR2, ((__FLAG__) & 0x7FFFFFFFU)) == (((__FLAG__) & 0x7FFFFFFFU))) 647 648 #if defined (DUAL_BANK) 649 #define __HAL_FLASH_GET_FLAG(__FLAG__) (IS_FLASH_FLAG_BANK1(__FLAG__) ? __HAL_FLASH_GET_FLAG_BANK1(__FLAG__) : \ 650 __HAL_FLASH_GET_FLAG_BANK2(__FLAG__)) 651 #else 652 #define __HAL_FLASH_GET_FLAG(__FLAG__) __HAL_FLASH_GET_FLAG_BANK1(__FLAG__) 653 #endif /* DUAL_BANK */ 654 655 656 /** 657 * @brief Clear the specified FLASH flag. 658 * @param __FLAG__: specifies the FLASH flags to clear. 659 * In case of Bank 1, this parameter can be any combination of the following values: 660 * @arg FLASH_FLAG_EOP_BANK1 : End Of Program on Bank 1 flag 661 * @arg FLASH_FLAG_WRPERR_BANK1 : Write Protection Error on Bank 1 flag 662 * @arg FLASH_FLAG_PGSERR_BANK1 : Program Sequence Error on Bank 1 flag 663 * @arg FLASH_FLAG_STRBER_BANK1 : Program Alignment Error on Bank 1 flag 664 * @arg FLASH_FLAG_INCERR_BANK1 : Inconsistency Error on Bank 1 flag 665 * @arg FLASH_FLAG_OPERR_BANK1 : Operation Error on Bank 1 flag 666 * @arg FLASH_FLAG_RDPERR_BANK1 : Read Protection Error on Bank 1 flag 667 * @arg FLASH_FLAG_RDSERR_BANK1 : Read secure Error on Bank 1 flag 668 * @arg FLASH_FLAG_SNECCE_BANK1 : Single ECC Error Correction on Bank 1 flag 669 * @arg FLASH_FLAG_DBECCE_BANK1 : Double Detection ECC Error on Bank 1 flag 670 * @arg FLASH_FLAG_CRCEND_BANK1 : CRC End on Bank 1 flag 671 * @arg FLASH_FLAG_CRCRDERR_BANK1 : CRC Read error on Bank 1 flag 672 * @arg FLASH_FLAG_ALL_ERRORS_BANK1 : All Bank 1 error flags 673 * @arg FLASH_FLAG_ALL_BANK1 : All Bank 1 flags 674 * 675 * In case of Bank 2, this parameter can be any combination of the following values : 676 * @arg FLASH_FLAG_EOP_BANK2 : End Of Program on Bank 2 flag 677 * @arg FLASH_FLAG_WRPERR_BANK2 : Write Protection Error on Bank 2 flag 678 * @arg FLASH_FLAG_PGSERR_BANK2 : Program Sequence Error on Bank 2 flag 679 * @arg FLASH_FLAG_STRBER_BANK2 : Program Alignment Error on Bank 2 flag 680 * @arg FLASH_FLAG_INCERR_BANK2 : Inconsistency Error on Bank 2 flag 681 * @arg FLASH_FLAG_OPERR_BANK2 : Operation Error on Bank 2 flag 682 * @arg FLASH_FLAG_RDPERR_BANK2 : Read Protection Error on Bank 2 flag 683 * @arg FLASH_FLAG_RDSERR_BANK2 : Read secure Error on Bank 2 flag 684 * @arg FLASH_FLAG_SNECCE_BANK2 : Single ECC Error Correction on Bank 2 flag 685 * @arg FLASH_FLAG_DBECCE_BANK2 : Double Detection ECC Error on Bank 2 flag 686 * @arg FLASH_FLAG_CRCEND_BANK2 : CRC End on Bank 2 flag 687 * @arg FLASH_FLAG_CRCRDERR_BANK2 : CRC Read error on Bank 2 flag 688 * @arg FLASH_FLAG_ALL_ERRORS_BANK2 : All Bank 2 error flags 689 * @arg FLASH_FLAG_ALL_BANK2 : All Bank 2 flags 690 * @retval none 691 */ 692 693 #define __HAL_FLASH_CLEAR_FLAG_BANK1(__FLAG__) WRITE_REG(FLASH->CCR1, (__FLAG__)) 694 695 #define __HAL_FLASH_CLEAR_FLAG_BANK2(__FLAG__) WRITE_REG(FLASH->CCR2, ((__FLAG__) & 0x7FFFFFFFU)) 696 697 #if defined (DUAL_BANK) 698 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) (IS_FLASH_FLAG_BANK1(__FLAG__) ? __HAL_FLASH_CLEAR_FLAG_BANK1(__FLAG__) : \ 699 __HAL_FLASH_CLEAR_FLAG_BANK2(__FLAG__)) 700 #else 701 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) __HAL_FLASH_CLEAR_FLAG_BANK1(__FLAG__) 702 #endif /* DUAL_BANK */ 703 704 /** 705 * @} 706 */ 707 708 /* Include FLASH HAL Extension module */ 709 #include "stm32h7xx_hal_flash_ex.h" 710 711 /* Exported functions --------------------------------------------------------*/ 712 /** @addtogroup FLASH_Exported_Functions 713 * @{ 714 */ 715 /** @addtogroup FLASH_Exported_Functions_Group1 716 * @{ 717 */ 718 /* Program operation functions ***********************************************/ 719 HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t FlashAddress, uint32_t DataAddress); 720 HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t FlashAddress, uint32_t DataAddress); 721 /* FLASH IRQ handler method */ 722 void HAL_FLASH_IRQHandler(void); 723 /* Callbacks in non blocking modes */ 724 void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue); 725 void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue); 726 /** 727 * @} 728 */ 729 730 /** @addtogroup FLASH_Exported_Functions_Group2 731 * @{ 732 */ 733 /* Peripheral Control functions **********************************************/ 734 HAL_StatusTypeDef HAL_FLASH_Unlock(void); 735 HAL_StatusTypeDef HAL_FLASH_Lock(void); 736 HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void); 737 HAL_StatusTypeDef HAL_FLASH_OB_Lock(void); 738 /* Option bytes control */ 739 HAL_StatusTypeDef HAL_FLASH_OB_Launch(void); 740 /** 741 * @} 742 */ 743 744 /** @addtogroup FLASH_Exported_Functions_Group3 745 * @{ 746 */ 747 /* Peripheral State functions ************************************************/ 748 uint32_t HAL_FLASH_GetError(void); 749 /** 750 * @} 751 */ 752 753 /** 754 * @} 755 */ 756 /* Private types -------------------------------------------------------------*/ 757 /* Private variables ---------------------------------------------------------*/ 758 /** @defgroup FLASH_Private_Variables FLASH Private Variables 759 * @{ 760 */ 761 extern FLASH_ProcessTypeDef pFlash; 762 /** 763 * @} 764 */ 765 /* Private constants ---------------------------------------------------------*/ 766 /** @defgroup FLASH_Private_Constants FLASH Private Constants 767 * @{ 768 */ 769 770 /** 771 * @} 772 */ 773 774 /* Private macros ------------------------------------------------------------*/ 775 /** @defgroup FLASH_Private_Macros FLASH Private Macros 776 * @{ 777 */ 778 779 #if defined (FLASH_OPTCR_PG_OTP) 780 #define IS_FLASH_TYPEPROGRAM(VALUE) (((VALUE) == FLASH_TYPEPROGRAM_FLASHWORD) || \ 781 ((VALUE) == FLASH_TYPEPROGRAM_OTPWORD)) 782 #else 783 #define IS_FLASH_TYPEPROGRAM(VALUE) ((VALUE) == FLASH_TYPEPROGRAM_FLASHWORD) 784 #endif /* FLASH_OPTCR_PG_OTP */ 785 786 #define IS_FLASH_IT_BANK1(IT) (((IT) & FLASH_IT_ALL_BANK1) == (IT)) 787 #if defined (DUAL_BANK) 788 #define IS_FLASH_IT_BANK2(IT) (((IT) & FLASH_IT_ALL_BANK2) == (IT)) 789 #endif /* DUAL_BANK */ 790 791 #define IS_FLASH_FLAG_BANK1(FLAG) (((FLAG) & FLASH_FLAG_ALL_BANK1) == (FLAG)) 792 #if defined (DUAL_BANK) 793 #define IS_FLASH_FLAG_BANK2(FLAG) (((FLAG) & FLASH_FLAG_ALL_BANK2) == (FLAG)) 794 #endif /* DUAL_BANK */ 795 796 #if defined (DUAL_BANK) 797 #define IS_FLASH_PROGRAM_ADDRESS_BANK1(ADDRESS) (((ADDRESS) >= FLASH_BANK1_BASE) && ((ADDRESS) < FLASH_BANK2_BASE)) 798 #define IS_FLASH_PROGRAM_ADDRESS_BANK2(ADDRESS) (((ADDRESS) >= FLASH_BANK2_BASE ) && ((ADDRESS) <= FLASH_END)) 799 #else 800 #define IS_FLASH_PROGRAM_ADDRESS_BANK1(ADDRESS) (((ADDRESS) >= FLASH_BANK1_BASE) && ((ADDRESS) <= FLASH_END)) 801 #endif /* DUAL_BANK */ 802 803 #if defined (DUAL_BANK) 804 #if defined (FLASH_OPTCR_PG_OTP) 805 #define IS_FLASH_PROGRAM_ADDRESS_OTP(ADDRESS) (((ADDRESS) >= 0x08FFF000U) && ((ADDRESS) <= 0x08FFF3FFU)) 806 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (IS_FLASH_PROGRAM_ADDRESS_BANK1(ADDRESS) || \ 807 IS_FLASH_PROGRAM_ADDRESS_BANK2(ADDRESS) || \ 808 IS_FLASH_PROGRAM_ADDRESS_OTP(ADDRESS)) 809 #else 810 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (IS_FLASH_PROGRAM_ADDRESS_BANK1(ADDRESS) || \ 811 IS_FLASH_PROGRAM_ADDRESS_BANK2(ADDRESS)) 812 #endif /* FLASH_OPTCR_PG_OTP */ 813 #else 814 #if defined (FLASH_OPTCR_PG_OTP) 815 #define IS_FLASH_PROGRAM_ADDRESS_OTP(ADDRESS) (((ADDRESS) >= 0x08FFF000U) && ((ADDRESS) <= 0x08FFF3FFU)) 816 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (IS_FLASH_PROGRAM_ADDRESS_BANK1(ADDRESS) || \ 817 IS_FLASH_PROGRAM_ADDRESS_OTP(ADDRESS)) 818 #else 819 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (IS_FLASH_PROGRAM_ADDRESS_BANK1(ADDRESS)) 820 #endif /* FLASH_OPTCR_PG_OTP */ 821 #endif /* DUAL_BANK */ 822 823 #define IS_BOOT_ADDRESS(ADDRESS) ((ADDRESS) <= (0x3FFF0000U)) 824 825 #if defined (DUAL_BANK) 826 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ 827 ((BANK) == FLASH_BANK_2) || \ 828 ((BANK) == FLASH_BANK_BOTH)) 829 #define IS_FLASH_BANK_EXCLUSIVE(BANK) (((BANK) == FLASH_BANK_1) || \ 830 ((BANK) == FLASH_BANK_2)) 831 #else 832 #define IS_FLASH_BANK(BANK) ((BANK) == FLASH_BANK_1) 833 #define IS_FLASH_BANK_EXCLUSIVE(BANK) ((BANK) == FLASH_BANK_1) 834 #endif /* DUAL_BANK */ 835 836 /** 837 * @} 838 */ 839 /* Private functions ---------------------------------------------------------*/ 840 /** @defgroup FLASH_Private_Functions FLASH Private functions 841 * @{ 842 */ 843 HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout, uint32_t Bank); 844 HAL_StatusTypeDef FLASH_OB_WaitForLastOperation(uint32_t Timeout); 845 HAL_StatusTypeDef FLASH_CRC_WaitForLastOperation(uint32_t Timeout, uint32_t Bank); 846 /** 847 * @} 848 */ 849 850 /** 851 * @} 852 */ 853 854 /** 855 * @} 856 */ 857 858 #ifdef __cplusplus 859 } 860 #endif 861 862 #endif /* STM32H7xx_HAL_FLASH_H */ 863 864 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 865
