1 /** 2 ****************************************************************************** 3 * @file stm32h7xx_hal_dac.h 4 * @author MCD Application Team 5 * @brief Header file of DAC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32H7xx_HAL_DAC_H 22 #define STM32H7xx_HAL_DAC_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /** @addtogroup STM32H7xx_HAL_Driver 29 * @{ 30 */ 31 32 /* Includes ------------------------------------------------------------------*/ 33 #include "stm32h7xx_hal_def.h" 34 35 #if defined(DAC1) || defined(DAC2) 36 37 /** @addtogroup DAC 38 * @{ 39 */ 40 41 /* Exported types ------------------------------------------------------------*/ 42 43 /** @defgroup DAC_Exported_Types DAC Exported Types 44 * @{ 45 */ 46 47 /** 48 * @brief HAL State structures definition 49 */ 50 typedef enum 51 { 52 HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */ 53 HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */ 54 HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */ 55 HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */ 56 HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */ 57 58 } HAL_DAC_StateTypeDef; 59 60 /** 61 * @brief DAC handle Structure definition 62 */ 63 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 64 typedef struct __DAC_HandleTypeDef 65 #else 66 typedef struct 67 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 68 { 69 DAC_TypeDef *Instance; /*!< Register base address */ 70 71 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ 72 73 HAL_LockTypeDef Lock; /*!< DAC locking object */ 74 75 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ 76 77 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ 78 79 __IO uint32_t ErrorCode; /*!< DAC Error code */ 80 81 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 82 void (* ConvCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 83 void (* ConvHalfCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 84 void (* ErrorCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 85 void (* DMAUnderrunCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 86 void (* ConvCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 87 void (* ConvHalfCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 88 void (* ErrorCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 89 void (* DMAUnderrunCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 90 91 void (* MspInitCallback)(struct __DAC_HandleTypeDef *hdac); 92 void (* MspDeInitCallback)(struct __DAC_HandleTypeDef *hdac); 93 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 94 95 } DAC_HandleTypeDef; 96 97 /** 98 * @brief DAC Configuration sample and hold Channel structure definition 99 */ 100 typedef struct 101 { 102 uint32_t DAC_SampleTime ; /*!< Specifies the Sample time for the selected channel. 103 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 104 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 105 106 uint32_t DAC_HoldTime ; /*!< Specifies the hold time for the selected channel 107 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 108 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 109 110 uint32_t DAC_RefreshTime ; /*!< Specifies the refresh time for the selected channel 111 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 112 This parameter must be a number between Min_Data = 0 and Max_Data = 255 */ 113 } DAC_SampleAndHoldConfTypeDef; 114 115 /** 116 * @brief DAC Configuration regular Channel structure definition 117 */ 118 typedef struct 119 { 120 uint32_t DAC_SampleAndHold; /*!< Specifies whether the DAC mode. 121 This parameter can be a value of @ref DAC_SampleAndHold */ 122 123 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. 124 This parameter can be a value of @ref DAC_trigger_selection */ 125 126 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. 127 This parameter can be a value of @ref DAC_output_buffer */ 128 129 uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral . 130 This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */ 131 132 uint32_t DAC_UserTrimming; /*!< Specifies the trimming mode 133 This parameter must be a value of @ref DAC_UserTrimming 134 DAC_UserTrimming is either factory or user trimming */ 135 136 uint32_t DAC_TrimmingValue; /*!< Specifies the offset trimming value 137 i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER. 138 This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ 139 140 DAC_SampleAndHoldConfTypeDef DAC_SampleAndHoldConfig; /*!< Sample and Hold settings */ 141 142 } DAC_ChannelConfTypeDef; 143 144 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 145 /** 146 * @brief HAL DAC Callback ID enumeration definition 147 */ 148 typedef enum 149 { 150 HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */ 151 HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */ 152 HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */ 153 HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */ 154 HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /*!< DAC CH2 Complete Callback ID */ 155 HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /*!< DAC CH2 half Complete Callback ID */ 156 HAL_DAC_CH2_ERROR_ID = 0x06U, /*!< DAC CH2 error Callback ID */ 157 HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /*!< DAC CH2 underrun Callback ID */ 158 HAL_DAC_MSPINIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */ 159 HAL_DAC_MSPDEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */ 160 HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */ 161 } HAL_DAC_CallbackIDTypeDef; 162 163 /** 164 * @brief HAL DAC Callback pointer definition 165 */ 166 typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac); 167 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 168 169 /** 170 * @} 171 */ 172 173 /* Exported constants --------------------------------------------------------*/ 174 175 /** @defgroup DAC_Exported_Constants DAC Exported Constants 176 * @{ 177 */ 178 179 /** @defgroup DAC_Error_Code DAC Error Code 180 * @{ 181 */ 182 #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ 183 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */ 184 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */ 185 #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ 186 #define HAL_DAC_ERROR_TIMEOUT 0x08U /*!< Timeout error */ 187 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 188 #define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */ 189 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 190 191 /** 192 * @} 193 */ 194 195 /** @defgroup DAC_trigger_selection DAC trigger selection 196 * @{ 197 */ 198 #define DAC_TRIGGER_NONE 0x00000000U /*!< Conversion is automatic once the DAC_DHRxxxx register has been loaded, and not by external trigger */ 199 #define DAC_TRIGGER_SOFTWARE ( DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */ 200 #define DAC_TRIGGER_T1_TRGO ( DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM1 TRGO selected as external conversion trigger for DAC channel */ 201 #define DAC_TRIGGER_T2_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 202 #define DAC_TRIGGER_T4_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ 203 #define DAC_TRIGGER_T5_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ 204 #define DAC_TRIGGER_T6_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 205 #define DAC_TRIGGER_T7_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ 206 #define DAC_TRIGGER_T8_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ 207 #define DAC_TRIGGER_T15_TRGO (DAC_CR_TSEL1_3 | DAC_CR_TEN1) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel */ 208 #if defined(HRTIM1) 209 #define DAC_TRIGGER_HR1_TRGO1 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< HR1 TRGO1 selected as external conversion trigger for DAC channel */ 210 #define DAC_TRIGGER_HR1_TRGO2 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< HR1 TRGO2 selected as external conversion trigger for DAC channel */ 211 #endif 212 #define DAC_TRIGGER_LPTIM1_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< LPTIM1 OUT TRGO selected as external conversion trigger for DAC channel */ 213 #define DAC_TRIGGER_LPTIM2_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< LPTIM2 OUT TRGO selected as external conversion trigger for DAC channel */ 214 #define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 215 #if defined(TIM23) 216 #define DAC_TRIGGER_T23_TRGO (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM23 TRGO selected as external conversion trigger for DAC channel */ 217 #endif 218 #if defined(TIM24) 219 #define DAC_TRIGGER_T24_TRGO (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM24 TRGO selected as external conversion trigger for DAC channel */ 220 #endif 221 #if defined(DAC2) 222 #define DAC_TRIGGER_LPTIM3_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< LPTIM3 OUT TRGO selected as external conversion trigger for DAC channel */ 223 #endif 224 225 /** 226 * @} 227 */ 228 229 /** @defgroup DAC_output_buffer DAC output buffer 230 * @{ 231 */ 232 #define DAC_OUTPUTBUFFER_ENABLE 0x00000000U 233 #define DAC_OUTPUTBUFFER_DISABLE (DAC_MCR_MODE1_1) 234 235 /** 236 * @} 237 */ 238 239 /** @defgroup DAC_Channel_selection DAC Channel selection 240 * @{ 241 */ 242 #define DAC_CHANNEL_1 0x00000000U 243 #define DAC_CHANNEL_2 0x00000010U 244 /** 245 * @} 246 */ 247 248 /** @defgroup DAC_data_alignment DAC data alignment 249 * @{ 250 */ 251 #define DAC_ALIGN_12B_R 0x00000000U 252 #define DAC_ALIGN_12B_L 0x00000004U 253 #define DAC_ALIGN_8B_R 0x00000008U 254 255 /** 256 * @} 257 */ 258 259 /** @defgroup DAC_flags_definition DAC flags definition 260 * @{ 261 */ 262 #define DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1) 263 #define DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2) 264 265 /** 266 * @} 267 */ 268 269 /** @defgroup DAC_IT_definition DAC IT definition 270 * @{ 271 */ 272 #define DAC_IT_DMAUDR1 (DAC_SR_DMAUDR1) 273 #define DAC_IT_DMAUDR2 (DAC_SR_DMAUDR2) 274 275 /** 276 * @} 277 */ 278 279 /** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral 280 * @{ 281 */ 282 #define DAC_CHIPCONNECT_EXTERNAL (1UL << 0) 283 #define DAC_CHIPCONNECT_INTERNAL (1UL << 1) 284 #define DAC_CHIPCONNECT_BOTH (1UL << 2) 285 286 /** 287 * @} 288 */ 289 290 /** @defgroup DAC_UserTrimming DAC User Trimming 291 * @{ 292 */ 293 #define DAC_TRIMMING_FACTORY (0x00000000UL) /*!< Factory trimming */ 294 #define DAC_TRIMMING_USER (0x00000001UL) /*!< User trimming */ 295 /** 296 * @} 297 */ 298 299 /** @defgroup DAC_SampleAndHold DAC power mode 300 * @{ 301 */ 302 #define DAC_SAMPLEANDHOLD_DISABLE (0x00000000UL) 303 #define DAC_SAMPLEANDHOLD_ENABLE (DAC_MCR_MODE1_2) 304 305 /** 306 * @} 307 */ 308 /** 309 * @} 310 */ 311 312 /* Exported macro ------------------------------------------------------------*/ 313 314 /** @defgroup DAC_Exported_Macros DAC Exported Macros 315 * @{ 316 */ 317 318 /** @brief Reset DAC handle state. 319 * @param __HANDLE__ specifies the DAC handle. 320 * @retval None 321 */ 322 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 323 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \ 324 (__HANDLE__)->State = HAL_DAC_STATE_RESET; \ 325 (__HANDLE__)->MspInitCallback = NULL; \ 326 (__HANDLE__)->MspDeInitCallback = NULL; \ 327 } while(0) 328 #else 329 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) 330 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 331 332 /** @brief Enable the DAC channel. 333 * @param __HANDLE__ specifies the DAC handle. 334 * @param __DAC_Channel__ specifies the DAC channel 335 * @retval None 336 */ 337 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ 338 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) 339 340 /** @brief Disable the DAC channel. 341 * @param __HANDLE__ specifies the DAC handle 342 * @param __DAC_Channel__ specifies the DAC channel. 343 * @retval None 344 */ 345 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ 346 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) 347 348 /** @brief Set DHR12R1 alignment. 349 * @param __ALIGNMENT__ specifies the DAC alignment 350 * @retval None 351 */ 352 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008UL + (__ALIGNMENT__)) 353 354 /** @brief Set DHR12R2 alignment. 355 * @param __ALIGNMENT__ specifies the DAC alignment 356 * @retval None 357 */ 358 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014UL + (__ALIGNMENT__)) 359 360 /** @brief Set DHR12RD alignment. 361 * @param __ALIGNMENT__ specifies the DAC alignment 362 * @retval None 363 */ 364 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020UL + (__ALIGNMENT__)) 365 366 /** @brief Enable the DAC interrupt. 367 * @param __HANDLE__ specifies the DAC handle 368 * @param __INTERRUPT__ specifies the DAC interrupt. 369 * This parameter can be any combination of the following values: 370 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt 371 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt 372 * @retval None 373 */ 374 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) 375 376 /** @brief Disable the DAC interrupt. 377 * @param __HANDLE__ specifies the DAC handle 378 * @param __INTERRUPT__ specifies the DAC interrupt. 379 * This parameter can be any combination of the following values: 380 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt 381 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt 382 * @retval None 383 */ 384 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) 385 386 /** @brief Check whether the specified DAC interrupt source is enabled or not. 387 * @param __HANDLE__ DAC handle 388 * @param __INTERRUPT__ DAC interrupt source to check 389 * This parameter can be any combination of the following values: 390 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt 391 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt 392 * @retval State of interruption (SET or RESET) 393 */ 394 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR\ 395 & (__INTERRUPT__)) == (__INTERRUPT__)) 396 397 /** @brief Get the selected DAC's flag status. 398 * @param __HANDLE__ specifies the DAC handle. 399 * @param __FLAG__ specifies the DAC flag to get. 400 * This parameter can be any combination of the following values: 401 * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag 402 * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag 403 * @retval None 404 */ 405 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 406 407 /** @brief Clear the DAC's flag. 408 * @param __HANDLE__ specifies the DAC handle. 409 * @param __FLAG__ specifies the DAC flag to clear. 410 * This parameter can be any combination of the following values: 411 * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag 412 * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag 413 * @retval None 414 */ 415 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) 416 417 /** 418 * @} 419 */ 420 421 /* Private macro -------------------------------------------------------------*/ 422 423 /** @defgroup DAC_Private_Macros DAC Private Macros 424 * @{ 425 */ 426 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ 427 ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) 428 429 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ 430 ((CHANNEL) == DAC_CHANNEL_2)) 431 432 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ 433 ((ALIGN) == DAC_ALIGN_12B_L) || \ 434 ((ALIGN) == DAC_ALIGN_8B_R)) 435 436 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0UL) 437 438 #define IS_DAC_REFRESHTIME(TIME) ((TIME) <= 0x000000FFUL) 439 440 /** 441 * @} 442 */ 443 444 /* Include DAC HAL Extended module */ 445 #include "stm32h7xx_hal_dac_ex.h" 446 447 /* Exported functions --------------------------------------------------------*/ 448 449 /** @addtogroup DAC_Exported_Functions 450 * @{ 451 */ 452 453 /** @addtogroup DAC_Exported_Functions_Group1 454 * @{ 455 */ 456 /* Initialization and de-initialization functions *****************************/ 457 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac); 458 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac); 459 void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac); 460 void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac); 461 462 /** 463 * @} 464 */ 465 466 /** @addtogroup DAC_Exported_Functions_Group2 467 * @{ 468 */ 469 /* IO operation functions *****************************************************/ 470 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel); 471 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel); 472 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length, 473 uint32_t Alignment); 474 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel); 475 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac); 476 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); 477 478 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac); 479 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac); 480 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); 481 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); 482 483 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 484 /* DAC callback registering/unregistering */ 485 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, 486 pDAC_CallbackTypeDef pCallback); 487 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID); 488 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 489 490 /** 491 * @} 492 */ 493 494 /** @addtogroup DAC_Exported_Functions_Group3 495 * @{ 496 */ 497 /* Peripheral Control functions ***********************************************/ 498 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel); 499 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel); 500 /** 501 * @} 502 */ 503 504 /** @addtogroup DAC_Exported_Functions_Group4 505 * @{ 506 */ 507 /* Peripheral State and Error functions ***************************************/ 508 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac); 509 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); 510 511 /** 512 * @} 513 */ 514 515 /** 516 * @} 517 */ 518 519 /** @defgroup DAC_Private_Functions DAC Private Functions 520 * @{ 521 */ 522 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma); 523 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma); 524 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma); 525 /** 526 * @} 527 */ 528 529 /** 530 * @} 531 */ 532 533 #endif /* DAC1 || DAC2 */ 534 535 /** 536 * @} 537 */ 538 539 #ifdef __cplusplus 540 } 541 #endif 542 543 544 #endif /*STM32H7xx_HAL_DAC_H */ 545 546 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 547 548
