1 /**
2 ******************************************************************************
3 * @file stm32f7xx_hal_sdram.c
4 * @author MCD Application Team
5 * @brief SDRAM HAL module driver.
6 * This file provides a generic firmware to drive SDRAM memories mounted
7 * as external device.
8 *
9 @verbatim
10 ==============================================================================
11 ##### How to use this driver #####
12 ==============================================================================
13 [..]
14 This driver is a generic layered driver which contains a set of APIs used to
15 control SDRAM memories. It uses the FMC layer functions to interface
16 with SDRAM devices.
17 The following sequence should be followed to configure the FMC to interface
18 with SDRAM memories:
19
20 (#) Declare a SDRAM_HandleTypeDef handle structure, for example:
21 SDRAM_HandleTypeDef hdsram
22
23 (++) Fill the SDRAM_HandleTypeDef handle "Init" field with the allowed
24 values of the structure member.
25
26 (++) Fill the SDRAM_HandleTypeDef handle "Instance" field with a predefined
27 base register instance for NOR or SDRAM device
28
29 (#) Declare a FMC_SDRAM_TimingTypeDef structure; for example:
30 FMC_SDRAM_TimingTypeDef Timing;
31 and fill its fields with the allowed values of the structure member.
32
33 (#) Initialize the SDRAM Controller by calling the function HAL_SDRAM_Init(). This function
34 performs the following sequence:
35
36 (##) MSP hardware layer configuration using the function HAL_SDRAM_MspInit()
37 (##) Control register configuration using the FMC SDRAM interface function
38 FMC_SDRAM_Init()
39 (##) Timing register configuration using the FMC SDRAM interface function
40 FMC_SDRAM_Timing_Init()
41 (##) Program the SDRAM external device by applying its initialization sequence
42 according to the device plugged in your hardware. This step is mandatory
43 for accessing the SDRAM device.
44
45 (#) At this stage you can perform read/write accesses from/to the memory connected
46 to the SDRAM Bank. You can perform either polling or DMA transfer using the
47 following APIs:
48 (++) HAL_SDRAM_Read()/HAL_SDRAM_Write() for polling read/write access
49 (++) HAL_SDRAM_Read_DMA()/HAL_SDRAM_Write_DMA() for DMA read/write transfer
50
51 (#) You can also control the SDRAM device by calling the control APIs HAL_SDRAM_WriteOperation_Enable()/
52 HAL_SDRAM_WriteOperation_Disable() to respectively enable/disable the SDRAM write operation or
53 the function HAL_SDRAM_SendCommand() to send a specified command to the SDRAM
54 device. The command to be sent must be configured with the FMC_SDRAM_CommandTypeDef
55 structure.
56
57 (#) You can continuously monitor the SDRAM device HAL state by calling the function
58 HAL_SDRAM_GetState()
59
60 *** Callback registration ***
61 =============================================
62 [..]
63 The compilation define USE_HAL_SDRAM_REGISTER_CALLBACKS when set to 1
64 allows the user to configure dynamically the driver callbacks.
65
66 Use Functions @ref HAL_SDRAM_RegisterCallback() to register a user callback,
67 it allows to register following callbacks:
68 (+) MspInitCallback : SDRAM MspInit.
69 (+) MspDeInitCallback : SDRAM MspDeInit.
70 This function takes as parameters the HAL peripheral handle, the Callback ID
71 and a pointer to the user callback function.
72
73 Use function @ref HAL_SDRAM_UnRegisterCallback() to reset a callback to the default
74 weak (surcharged) function. It allows to reset following callbacks:
75 (+) MspInitCallback : SDRAM MspInit.
76 (+) MspDeInitCallback : SDRAM MspDeInit.
77 This function) takes as parameters the HAL peripheral handle and the Callback ID.
78
79 By default, after the @ref HAL_SDRAM_Init and if the state is HAL_SDRAM_STATE_RESET
80 all callbacks are reset to the corresponding legacy weak (surcharged) functions.
81 Exception done for MspInit and MspDeInit callbacks that are respectively
82 reset to the legacy weak (surcharged) functions in the @ref HAL_SDRAM_Init
83 and @ref HAL_SDRAM_DeInit only when these callbacks are null (not registered beforehand).
84 If not, MspInit or MspDeInit are not null, the @ref HAL_SDRAM_Init and @ref HAL_SDRAM_DeInit
85 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
86
87 Callbacks can be registered/unregistered in READY state only.
88 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
89 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
90 during the Init/DeInit.
91 In that case first register the MspInit/MspDeInit user callbacks
92 using @ref HAL_SDRAM_RegisterCallback before calling @ref HAL_SDRAM_DeInit
93 or @ref HAL_SDRAM_Init function.
94
95 When The compilation define USE_HAL_SDRAM_REGISTER_CALLBACKS is set to 0 or
96 not defined, the callback registering feature is not available
97 and weak (surcharged) callbacks are used.
98
99 @endverbatim
100 ******************************************************************************
101 * @attention
102 *
103 * <h2><center>© Copyright (c) 2017 STMicroelectronics.
104 * All rights reserved.</center></h2>
105 *
106 * This software component is licensed by ST under BSD 3-Clause license,
107 * the "License"; You may not use this file except in compliance with the
108 * License. You may obtain a copy of the License at:
109 * opensource.org/licenses/BSD-3-Clause
110 *
111 ******************************************************************************
112 */
113
114 /* Includes ------------------------------------------------------------------*/
115 #include "stm32f7xx_hal.h"
116
117 /** @addtogroup STM32F7xx_HAL_Driver
118 * @{
119 */
120
121 /** @defgroup SDRAM SDRAM
122 * @brief SDRAM driver modules
123 * @{
124 */
125 #ifdef HAL_SDRAM_MODULE_ENABLED
126
127 /* Private typedef -----------------------------------------------------------*/
128 /* Private define ------------------------------------------------------------*/
129 /* Private macro -------------------------------------------------------------*/
130 /* Private variables ---------------------------------------------------------*/
131 /* Private functions ---------------------------------------------------------*/
132 /* Exported functions --------------------------------------------------------*/
133 /** @defgroup SDRAM_Exported_Functions SDRAM Exported Functions
134 * @{
135 */
136
137 /** @defgroup SDRAM_Exported_Functions_Group1 Initialization and de-initialization functions
138 * @brief Initialization and Configuration functions
139 *
140 @verbatim
141 ==============================================================================
142 ##### SDRAM Initialization and de_initialization functions #####
143 ==============================================================================
144 [..]
145 This section provides functions allowing to initialize/de-initialize
146 the SDRAM memory
147
148 @endverbatim
149 * @{
150 */
151
152 /**
153 * @brief Performs the SDRAM device initialization sequence.
154 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
155 * the configuration information for SDRAM module.
156 * @param Timing Pointer to SDRAM control timing structure
157 * @retval HAL status
158 */
HAL_SDRAM_Init(SDRAM_HandleTypeDef * hsdram,FMC_SDRAM_TimingTypeDef * Timing)159 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing)
160 {
161 /* Check the SDRAM handle parameter */
162 if(hsdram == NULL)
163 {
164 return HAL_ERROR;
165 }
166
167 if(hsdram->State == HAL_SDRAM_STATE_RESET)
168 {
169 /* Allocate lock resource and initialize it */
170 hsdram->Lock = HAL_UNLOCKED;
171 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
172 if(hsdram->MspInitCallback == NULL)
173 {
174 hsdram->MspInitCallback = HAL_SDRAM_MspInit;
175 }
176 hsdram->RefreshErrorCallback = HAL_SDRAM_RefreshErrorCallback;
177 hsdram->DmaXferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
178 hsdram->DmaXferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
179
180 /* Init the low level hardware */
181 hsdram->MspInitCallback(hsdram);
182 #else
183 /* Initialize the low level hardware (MSP) */
184 HAL_SDRAM_MspInit(hsdram);
185 #endif
186 }
187
188 /* Initialize the SDRAM controller state */
189 hsdram->State = HAL_SDRAM_STATE_BUSY;
190
191 /* Initialize SDRAM control Interface */
192 FMC_SDRAM_Init(hsdram->Instance, &(hsdram->Init));
193
194 /* Initialize SDRAM timing Interface */
195 FMC_SDRAM_Timing_Init(hsdram->Instance, Timing, hsdram->Init.SDBank);
196
197 /* Update the SDRAM controller state */
198 hsdram->State = HAL_SDRAM_STATE_READY;
199
200 return HAL_OK;
201 }
202
203 /**
204 * @brief Perform the SDRAM device initialization sequence.
205 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
206 * the configuration information for SDRAM module.
207 * @retval HAL status
208 */
HAL_SDRAM_DeInit(SDRAM_HandleTypeDef * hsdram)209 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram)
210 {
211 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
212 if(hsdram->MspDeInitCallback == NULL)
213 {
214 hsdram->MspDeInitCallback = HAL_SDRAM_MspDeInit;
215 }
216
217 /* DeInit the low level hardware */
218 hsdram->MspDeInitCallback(hsdram);
219 #else
220 /* Initialize the low level hardware (MSP) */
221 HAL_SDRAM_MspDeInit(hsdram);
222 #endif
223
224 /* Configure the SDRAM registers with their reset values */
225 FMC_SDRAM_DeInit(hsdram->Instance, hsdram->Init.SDBank);
226
227 /* Reset the SDRAM controller state */
228 hsdram->State = HAL_SDRAM_STATE_RESET;
229
230 /* Release Lock */
231 __HAL_UNLOCK(hsdram);
232
233 return HAL_OK;
234 }
235
236 /**
237 * @brief SDRAM MSP Init.
238 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
239 * the configuration information for SDRAM module.
240 * @retval None
241 */
HAL_SDRAM_MspInit(SDRAM_HandleTypeDef * hsdram)242 __weak void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram)
243 {
244 /* Prevent unused argument(s) compilation warning */
245 UNUSED(hsdram);
246
247 /* NOTE: This function Should not be modified, when the callback is needed,
248 the HAL_SDRAM_MspInit could be implemented in the user file
249 */
250 }
251
252 /**
253 * @brief SDRAM MSP DeInit.
254 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
255 * the configuration information for SDRAM module.
256 * @retval None
257 */
HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef * hsdram)258 __weak void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram)
259 {
260 /* Prevent unused argument(s) compilation warning */
261 UNUSED(hsdram);
262
263 /* NOTE: This function Should not be modified, when the callback is needed,
264 the HAL_SDRAM_MspDeInit could be implemented in the user file
265 */
266 }
267
268 /**
269 * @brief This function handles SDRAM refresh error interrupt request.
270 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
271 * the configuration information for SDRAM module.
272 * @retval HAL status
273 */
HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef * hsdram)274 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram)
275 {
276 /* Check SDRAM interrupt Rising edge flag */
277 if(__FMC_SDRAM_GET_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_IT))
278 {
279 /* SDRAM refresh error interrupt callback */
280 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
281 hsdram->RefreshErrorCallback(hsdram);
282 #else
283 HAL_SDRAM_RefreshErrorCallback(hsdram);
284 #endif
285
286 /* Clear SDRAM refresh error interrupt pending bit */
287 __FMC_SDRAM_CLEAR_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_ERROR);
288 }
289 }
290
291 /**
292 * @brief SDRAM Refresh error callback.
293 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
294 * the configuration information for SDRAM module.
295 * @retval None
296 */
HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef * hsdram)297 __weak void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram)
298 {
299 /* Prevent unused argument(s) compilation warning */
300 UNUSED(hsdram);
301
302 /* NOTE: This function Should not be modified, when the callback is needed,
303 the HAL_SDRAM_RefreshErrorCallback could be implemented in the user file
304 */
305 }
306
307 /**
308 * @brief DMA transfer complete callback.
309 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
310 * the configuration information for the specified DMA module.
311 * @retval None
312 */
HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef * hdma)313 __weak void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
314 {
315 /* Prevent unused argument(s) compilation warning */
316 UNUSED(hdma);
317
318 /* NOTE: This function Should not be modified, when the callback is needed,
319 the HAL_SDRAM_DMA_XferCpltCallback could be implemented in the user file
320 */
321 }
322
323 /**
324 * @brief DMA transfer complete error callback.
325 * @param hdma DMA handle
326 * @retval None
327 */
HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef * hdma)328 __weak void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
329 {
330 /* Prevent unused argument(s) compilation warning */
331 UNUSED(hdma);
332
333 /* NOTE: This function Should not be modified, when the callback is needed,
334 the HAL_SDRAM_DMA_XferErrorCallback could be implemented in the user file
335 */
336 }
337
338 /**
339 * @}
340 */
341
342 /** @defgroup SDRAM_Exported_Functions_Group2 Input and Output functions
343 * @brief Input Output and memory control functions
344 *
345 @verbatim
346 ==============================================================================
347 ##### SDRAM Input and Output functions #####
348 ==============================================================================
349 [..]
350 This section provides functions allowing to use and control the SDRAM memory
351
352 @endverbatim
353 * @{
354 */
355
356 /**
357 * @brief Reads 8-bit data buffer from the SDRAM memory.
358 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
359 * the configuration information for SDRAM module.
360 * @param pAddress Pointer to read start address
361 * @param pDstBuffer Pointer to destination buffer
362 * @param BufferSize Size of the buffer to read from memory
363 * @retval HAL status
364 */
HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef * hsdram,uint32_t * pAddress,uint8_t * pDstBuffer,uint32_t BufferSize)365 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
366 {
367 __IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
368
369 /* Process Locked */
370 __HAL_LOCK(hsdram);
371
372 /* Check the SDRAM controller state */
373 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
374 {
375 return HAL_BUSY;
376 }
377 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
378 {
379 return HAL_ERROR;
380 }
381
382 /* Read data from source */
383 for(; BufferSize != 0; BufferSize--)
384 {
385 *pDstBuffer = *(__IO uint8_t *)pSdramAddress;
386 pDstBuffer++;
387 pSdramAddress++;
388 }
389
390 /* Process Unlocked */
391 __HAL_UNLOCK(hsdram);
392
393 return HAL_OK;
394 }
395
396
397 /**
398 * @brief Writes 8-bit data buffer to SDRAM memory.
399 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
400 * the configuration information for SDRAM module.
401 * @param pAddress Pointer to write start address
402 * @param pSrcBuffer Pointer to source buffer to write
403 * @param BufferSize Size of the buffer to write to memory
404 * @retval HAL status
405 */
HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef * hsdram,uint32_t * pAddress,uint8_t * pSrcBuffer,uint32_t BufferSize)406 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
407 {
408 __IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
409 uint32_t tmp = 0;
410
411 /* Process Locked */
412 __HAL_LOCK(hsdram);
413
414 /* Check the SDRAM controller state */
415 tmp = hsdram->State;
416
417 if(tmp == HAL_SDRAM_STATE_BUSY)
418 {
419 return HAL_BUSY;
420 }
421 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
422 {
423 return HAL_ERROR;
424 }
425
426 /* Write data to memory */
427 for(; BufferSize != 0; BufferSize--)
428 {
429 *(__IO uint8_t *)pSdramAddress = *pSrcBuffer;
430 pSrcBuffer++;
431 pSdramAddress++;
432 }
433
434 /* Process Unlocked */
435 __HAL_UNLOCK(hsdram);
436
437 return HAL_OK;
438 }
439
440
441 /**
442 * @brief Reads 16-bit data buffer from the SDRAM memory.
443 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
444 * the configuration information for SDRAM module.
445 * @param pAddress Pointer to read start address
446 * @param pDstBuffer Pointer to destination buffer
447 * @param BufferSize Size of the buffer to read from memory
448 * @retval HAL status
449 */
HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef * hsdram,uint32_t * pAddress,uint16_t * pDstBuffer,uint32_t BufferSize)450 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
451 {
452 __IO uint16_t *pSdramAddress = (uint16_t *)pAddress;
453
454 /* Process Locked */
455 __HAL_LOCK(hsdram);
456
457 /* Check the SDRAM controller state */
458 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
459 {
460 return HAL_BUSY;
461 }
462 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
463 {
464 return HAL_ERROR;
465 }
466
467 /* Read data from source */
468 for(; BufferSize != 0; BufferSize--)
469 {
470 *pDstBuffer = *(__IO uint16_t *)pSdramAddress;
471 pDstBuffer++;
472 pSdramAddress++;
473 }
474
475 /* Process Unlocked */
476 __HAL_UNLOCK(hsdram);
477
478 return HAL_OK;
479 }
480
481 /**
482 * @brief Writes 16-bit data buffer to SDRAM memory.
483 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
484 * the configuration information for SDRAM module.
485 * @param pAddress Pointer to write start address
486 * @param pSrcBuffer Pointer to source buffer to write
487 * @param BufferSize Size of the buffer to write to memory
488 * @retval HAL status
489 */
HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef * hsdram,uint32_t * pAddress,uint16_t * pSrcBuffer,uint32_t BufferSize)490 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
491 {
492 __IO uint16_t *pSdramAddress = (uint16_t *)pAddress;
493 uint32_t tmp = 0;
494
495 /* Process Locked */
496 __HAL_LOCK(hsdram);
497
498 /* Check the SDRAM controller state */
499 tmp = hsdram->State;
500
501 if(tmp == HAL_SDRAM_STATE_BUSY)
502 {
503 return HAL_BUSY;
504 }
505 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
506 {
507 return HAL_ERROR;
508 }
509
510 /* Write data to memory */
511 for(; BufferSize != 0; BufferSize--)
512 {
513 *(__IO uint16_t *)pSdramAddress = *pSrcBuffer;
514 pSrcBuffer++;
515 pSdramAddress++;
516 }
517
518 /* Process Unlocked */
519 __HAL_UNLOCK(hsdram);
520
521 return HAL_OK;
522 }
523
524 /**
525 * @brief Reads 32-bit data buffer from the SDRAM memory.
526 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
527 * the configuration information for SDRAM module.
528 * @param pAddress Pointer to read start address
529 * @param pDstBuffer Pointer to destination buffer
530 * @param BufferSize Size of the buffer to read from memory
531 * @retval HAL status
532 */
HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef * hsdram,uint32_t * pAddress,uint32_t * pDstBuffer,uint32_t BufferSize)533 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
534 {
535 __IO uint32_t *pSdramAddress = (uint32_t *)pAddress;
536
537 /* Process Locked */
538 __HAL_LOCK(hsdram);
539
540 /* Check the SDRAM controller state */
541 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
542 {
543 return HAL_BUSY;
544 }
545 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
546 {
547 return HAL_ERROR;
548 }
549
550 /* Read data from source */
551 for(; BufferSize != 0; BufferSize--)
552 {
553 *pDstBuffer = *(__IO uint32_t *)pSdramAddress;
554 pDstBuffer++;
555 pSdramAddress++;
556 }
557
558 /* Process Unlocked */
559 __HAL_UNLOCK(hsdram);
560
561 return HAL_OK;
562 }
563
564 /**
565 * @brief Writes 32-bit data buffer to SDRAM memory.
566 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
567 * the configuration information for SDRAM module.
568 * @param pAddress Pointer to write start address
569 * @param pSrcBuffer Pointer to source buffer to write
570 * @param BufferSize Size of the buffer to write to memory
571 * @retval HAL status
572 */
HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef * hsdram,uint32_t * pAddress,uint32_t * pSrcBuffer,uint32_t BufferSize)573 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
574 {
575 __IO uint32_t *pSdramAddress = (uint32_t *)pAddress;
576 uint32_t tmp = 0;
577
578 /* Process Locked */
579 __HAL_LOCK(hsdram);
580
581 /* Check the SDRAM controller state */
582 tmp = hsdram->State;
583
584 if(tmp == HAL_SDRAM_STATE_BUSY)
585 {
586 return HAL_BUSY;
587 }
588 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
589 {
590 return HAL_ERROR;
591 }
592
593 /* Write data to memory */
594 for(; BufferSize != 0; BufferSize--)
595 {
596 *(__IO uint32_t *)pSdramAddress = *pSrcBuffer;
597 pSrcBuffer++;
598 pSdramAddress++;
599 }
600
601 /* Process Unlocked */
602 __HAL_UNLOCK(hsdram);
603
604 return HAL_OK;
605 }
606
607 /**
608 * @brief Reads a Words data from the SDRAM memory using DMA transfer.
609 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
610 * the configuration information for SDRAM module.
611 * @param pAddress Pointer to read start address
612 * @param pDstBuffer Pointer to destination buffer
613 * @param BufferSize Size of the buffer to read from memory
614 * @retval HAL status
615 */
HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef * hsdram,uint32_t * pAddress,uint32_t * pDstBuffer,uint32_t BufferSize)616 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
617 {
618 uint32_t tmp = 0;
619
620 /* Process Locked */
621 __HAL_LOCK(hsdram);
622
623 /* Check the SDRAM controller state */
624 tmp = hsdram->State;
625
626 if(tmp == HAL_SDRAM_STATE_BUSY)
627 {
628 return HAL_BUSY;
629 }
630 else if(tmp == HAL_SDRAM_STATE_PRECHARGED)
631 {
632 return HAL_ERROR;
633 }
634
635 /* Configure DMA user callbacks */
636 hsdram->hdma->XferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
637 hsdram->hdma->XferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
638
639 /* Enable the DMA Stream */
640 HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
641
642 /* Process Unlocked */
643 __HAL_UNLOCK(hsdram);
644
645 return HAL_OK;
646 }
647
648 /**
649 * @brief Writes a Words data buffer to SDRAM memory using DMA transfer.
650 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
651 * the configuration information for SDRAM module.
652 * @param pAddress Pointer to write start address
653 * @param pSrcBuffer Pointer to source buffer to write
654 * @param BufferSize Size of the buffer to write to memory
655 * @retval HAL status
656 */
HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef * hsdram,uint32_t * pAddress,uint32_t * pSrcBuffer,uint32_t BufferSize)657 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
658 {
659 uint32_t tmp = 0;
660
661 /* Process Locked */
662 __HAL_LOCK(hsdram);
663
664 /* Check the SDRAM controller state */
665 tmp = hsdram->State;
666
667 if(tmp == HAL_SDRAM_STATE_BUSY)
668 {
669 return HAL_BUSY;
670 }
671 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
672 {
673 return HAL_ERROR;
674 }
675
676 /* Configure DMA user callbacks */
677 hsdram->hdma->XferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
678 hsdram->hdma->XferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
679
680 /* Enable the DMA Stream */
681 HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
682
683 /* Process Unlocked */
684 __HAL_UNLOCK(hsdram);
685
686 return HAL_OK;
687 }
688 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
689 /**
690 * @brief Register a User SDRAM Callback
691 * To be used instead of the weak (surcharged) predefined callback
692 * @param hsdram : SDRAM handle
693 * @param CallbackId : ID of the callback to be registered
694 * This parameter can be one of the following values:
695 * @arg @ref HAL_SDRAM_MSP_INIT_CB_ID SDRAM MspInit callback ID
696 * @arg @ref HAL_SDRAM_MSP_DEINIT_CB_ID SDRAM MspDeInit callback ID
697 * @arg @ref HAL_SDRAM_REFRESH_ERR_CB_ID SDRAM Refresh Error callback ID
698 * @param pCallback : pointer to the Callback function
699 * @retval status
700 */
HAL_SDRAM_RegisterCallback(SDRAM_HandleTypeDef * hsdram,HAL_SDRAM_CallbackIDTypeDef CallbackId,pSDRAM_CallbackTypeDef pCallback)701 HAL_StatusTypeDef HAL_SDRAM_RegisterCallback (SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId, pSDRAM_CallbackTypeDef pCallback)
702 {
703 HAL_StatusTypeDef status = HAL_OK;
704 HAL_SDRAM_StateTypeDef state;
705
706 if(pCallback == NULL)
707 {
708 return HAL_ERROR;
709 }
710
711 /* Process locked */
712 __HAL_LOCK(hsdram);
713
714 state = hsdram->State;
715 if((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
716 {
717 switch (CallbackId)
718 {
719 case HAL_SDRAM_MSP_INIT_CB_ID :
720 hsdram->MspInitCallback = pCallback;
721 break;
722 case HAL_SDRAM_MSP_DEINIT_CB_ID :
723 hsdram->MspDeInitCallback = pCallback;
724 break;
725 case HAL_SDRAM_REFRESH_ERR_CB_ID :
726 hsdram->RefreshErrorCallback = pCallback;
727 break;
728 default :
729 /* update return status */
730 status = HAL_ERROR;
731 break;
732 }
733 }
734 else if(hsdram->State == HAL_SDRAM_STATE_RESET)
735 {
736 switch (CallbackId)
737 {
738 case HAL_SDRAM_MSP_INIT_CB_ID :
739 hsdram->MspInitCallback = pCallback;
740 break;
741 case HAL_SDRAM_MSP_DEINIT_CB_ID :
742 hsdram->MspDeInitCallback = pCallback;
743 break;
744 default :
745 /* update return status */
746 status = HAL_ERROR;
747 break;
748 }
749 }
750 else
751 {
752 /* update return status */
753 status = HAL_ERROR;
754 }
755
756 /* Release Lock */
757 __HAL_UNLOCK(hsdram);
758 return status;
759 }
760 /**
761 * @brief Unregister a User SDRAM Callback
762 * SDRAM Callback is redirected to the weak (surcharged) predefined callback
763 * @param hsdram : SDRAM handle
764 * @param CallbackId : ID of the callback to be unregistered
765 * This parameter can be one of the following values:
766 * @arg @ref HAL_SDRAM_MSP_INIT_CB_ID SDRAM MspInit callback ID
767 * @arg @ref HAL_SDRAM_MSP_DEINIT_CB_ID SDRAM MspDeInit callback ID
768 * @arg @ref HAL_SDRAM_REFRESH_ERR_CB_ID SDRAM Refresh Error callback ID
769 * @arg @ref HAL_SDRAM_DMA_XFER_CPLT_CB_ID SDRAM DMA Xfer Complete callback ID
770 * @arg @ref HAL_SDRAM_DMA_XFER_ERR_CB_ID SDRAM DMA Xfer Error callback ID
771 * @retval status
772 */
HAL_SDRAM_UnRegisterCallback(SDRAM_HandleTypeDef * hsdram,HAL_SDRAM_CallbackIDTypeDef CallbackId)773 HAL_StatusTypeDef HAL_SDRAM_UnRegisterCallback (SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId)
774 {
775 HAL_StatusTypeDef status = HAL_OK;
776 HAL_SDRAM_StateTypeDef state;
777
778 /* Process locked */
779 __HAL_LOCK(hsdram);
780
781 state = hsdram->State;
782 if((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
783 {
784 switch (CallbackId)
785 {
786 case HAL_SDRAM_MSP_INIT_CB_ID :
787 hsdram->MspInitCallback = HAL_SDRAM_MspInit;
788 break;
789 case HAL_SDRAM_MSP_DEINIT_CB_ID :
790 hsdram->MspDeInitCallback = HAL_SDRAM_MspDeInit;
791 break;
792 case HAL_SDRAM_REFRESH_ERR_CB_ID :
793 hsdram->RefreshErrorCallback = HAL_SDRAM_RefreshErrorCallback;
794 break;
795 case HAL_SDRAM_DMA_XFER_CPLT_CB_ID :
796 hsdram->DmaXferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
797 break;
798 case HAL_SDRAM_DMA_XFER_ERR_CB_ID :
799 hsdram->DmaXferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
800 break;
801 default :
802 /* update return status */
803 status = HAL_ERROR;
804 break;
805 }
806 }
807 else if(hsdram->State == HAL_SDRAM_STATE_RESET)
808 {
809 switch (CallbackId)
810 {
811 case HAL_SDRAM_MSP_INIT_CB_ID :
812 hsdram->MspInitCallback = HAL_SDRAM_MspInit;
813 break;
814 case HAL_SDRAM_MSP_DEINIT_CB_ID :
815 hsdram->MspDeInitCallback = HAL_SDRAM_MspDeInit;
816 break;
817 default :
818 /* update return status */
819 status = HAL_ERROR;
820 break;
821 }
822 }
823 else
824 {
825 /* update return status */
826 status = HAL_ERROR;
827 }
828
829 /* Release Lock */
830 __HAL_UNLOCK(hsdram);
831 return status;
832 }
833
834 /**
835 * @brief Register a User SDRAM Callback for DMA transfers
836 * To be used instead of the weak (surcharged) predefined callback
837 * @param hsdram : SDRAM handle
838 * @param CallbackId : ID of the callback to be registered
839 * This parameter can be one of the following values:
840 * @arg @ref HAL_SDRAM_DMA_XFER_CPLT_CB_ID SDRAM DMA Xfer Complete callback ID
841 * @arg @ref HAL_SDRAM_DMA_XFER_ERR_CB_ID SDRAM DMA Xfer Error callback ID
842 * @param pCallback : pointer to the Callback function
843 * @retval status
844 */
HAL_SDRAM_RegisterDmaCallback(SDRAM_HandleTypeDef * hsdram,HAL_SDRAM_CallbackIDTypeDef CallbackId,pSDRAM_DmaCallbackTypeDef pCallback)845 HAL_StatusTypeDef HAL_SDRAM_RegisterDmaCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId, pSDRAM_DmaCallbackTypeDef pCallback)
846 {
847 HAL_StatusTypeDef status = HAL_OK;
848 HAL_SDRAM_StateTypeDef state;
849
850 if(pCallback == NULL)
851 {
852 return HAL_ERROR;
853 }
854
855 /* Process locked */
856 __HAL_LOCK(hsdram);
857
858 state = hsdram->State;
859 if((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
860 {
861 switch (CallbackId)
862 {
863 case HAL_SDRAM_DMA_XFER_CPLT_CB_ID :
864 hsdram->DmaXferCpltCallback = pCallback;
865 break;
866 case HAL_SDRAM_DMA_XFER_ERR_CB_ID :
867 hsdram->DmaXferErrorCallback = pCallback;
868 break;
869 default :
870 /* update return status */
871 status = HAL_ERROR;
872 break;
873 }
874 }
875 else
876 {
877 /* update return status */
878 status = HAL_ERROR;
879 }
880
881 /* Release Lock */
882 __HAL_UNLOCK(hsdram);
883 return status;
884 }
885 #endif
886
887 /**
888 * @}
889 */
890
891 /** @defgroup SDRAM_Exported_Functions_Group3 Control functions
892 * @brief management functions
893 *
894 @verbatim
895 ==============================================================================
896 ##### SDRAM Control functions #####
897 ==============================================================================
898 [..]
899 This subsection provides a set of functions allowing to control dynamically
900 the SDRAM interface.
901
902 @endverbatim
903 * @{
904 */
905
906 /**
907 * @brief Enables dynamically SDRAM write protection.
908 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
909 * the configuration information for SDRAM module.
910 * @retval HAL status
911 */
HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef * hsdram)912 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram)
913 {
914 /* Check the SDRAM controller state */
915 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
916 {
917 return HAL_BUSY;
918 }
919
920 /* Update the SDRAM state */
921 hsdram->State = HAL_SDRAM_STATE_BUSY;
922
923 /* Enable write protection */
924 FMC_SDRAM_WriteProtection_Enable(hsdram->Instance, hsdram->Init.SDBank);
925
926 /* Update the SDRAM state */
927 hsdram->State = HAL_SDRAM_STATE_WRITE_PROTECTED;
928
929 return HAL_OK;
930 }
931
932 /**
933 * @brief Disables dynamically SDRAM write protection.
934 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
935 * the configuration information for SDRAM module.
936 * @retval HAL status
937 */
HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef * hsdram)938 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram)
939 {
940 /* Check the SDRAM controller state */
941 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
942 {
943 return HAL_BUSY;
944 }
945
946 /* Update the SDRAM state */
947 hsdram->State = HAL_SDRAM_STATE_BUSY;
948
949 /* Disable write protection */
950 FMC_SDRAM_WriteProtection_Disable(hsdram->Instance, hsdram->Init.SDBank);
951
952 /* Update the SDRAM state */
953 hsdram->State = HAL_SDRAM_STATE_READY;
954
955 return HAL_OK;
956 }
957
958 /**
959 * @brief Sends Command to the SDRAM bank.
960 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
961 * the configuration information for SDRAM module.
962 * @param Command SDRAM command structure
963 * @param Timeout Timeout duration
964 * @retval HAL status
965 */
HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef * hsdram,FMC_SDRAM_CommandTypeDef * Command,uint32_t Timeout)966 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout)
967 {
968 /* Check the SDRAM controller state */
969 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
970 {
971 return HAL_BUSY;
972 }
973
974 /* Update the SDRAM state */
975 hsdram->State = HAL_SDRAM_STATE_BUSY;
976
977 /* Send SDRAM command */
978 FMC_SDRAM_SendCommand(hsdram->Instance, Command, Timeout);
979
980 /* Update the SDRAM controller state state */
981 if(Command->CommandMode == FMC_SDRAM_CMD_PALL)
982 {
983 hsdram->State = HAL_SDRAM_STATE_PRECHARGED;
984 }
985 else
986 {
987 hsdram->State = HAL_SDRAM_STATE_READY;
988 }
989
990 return HAL_OK;
991 }
992
993 /**
994 * @brief Programs the SDRAM Memory Refresh rate.
995 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
996 * the configuration information for SDRAM module.
997 * @param RefreshRate The SDRAM refresh rate value
998 * @retval HAL status
999 */
HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef * hsdram,uint32_t RefreshRate)1000 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate)
1001 {
1002 /* Check the SDRAM controller state */
1003 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
1004 {
1005 return HAL_BUSY;
1006 }
1007
1008 /* Update the SDRAM state */
1009 hsdram->State = HAL_SDRAM_STATE_BUSY;
1010
1011 /* Program the refresh rate */
1012 FMC_SDRAM_ProgramRefreshRate(hsdram->Instance ,RefreshRate);
1013
1014 /* Update the SDRAM state */
1015 hsdram->State = HAL_SDRAM_STATE_READY;
1016
1017 return HAL_OK;
1018 }
1019
1020 /**
1021 * @brief Sets the Number of consecutive SDRAM Memory auto Refresh commands.
1022 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
1023 * the configuration information for SDRAM module.
1024 * @param AutoRefreshNumber The SDRAM auto Refresh number
1025 * @retval HAL status
1026 */
HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef * hsdram,uint32_t AutoRefreshNumber)1027 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber)
1028 {
1029 /* Check the SDRAM controller state */
1030 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
1031 {
1032 return HAL_BUSY;
1033 }
1034
1035 /* Update the SDRAM state */
1036 hsdram->State = HAL_SDRAM_STATE_BUSY;
1037
1038 /* Set the Auto-Refresh number */
1039 FMC_SDRAM_SetAutoRefreshNumber(hsdram->Instance ,AutoRefreshNumber);
1040
1041 /* Update the SDRAM state */
1042 hsdram->State = HAL_SDRAM_STATE_READY;
1043
1044 return HAL_OK;
1045 }
1046
1047 /**
1048 * @brief Returns the SDRAM memory current mode.
1049 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
1050 * the configuration information for SDRAM module.
1051 * @retval The SDRAM memory mode.
1052 */
HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef * hsdram)1053 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram)
1054 {
1055 /* Return the SDRAM memory current mode */
1056 return(FMC_SDRAM_GetModeStatus(hsdram->Instance, hsdram->Init.SDBank));
1057 }
1058
1059 /**
1060 * @}
1061 */
1062
1063 /** @defgroup SDRAM_Exported_Functions_Group4 State functions
1064 * @brief Peripheral State functions
1065 *
1066 @verbatim
1067 ==============================================================================
1068 ##### SDRAM State functions #####
1069 ==============================================================================
1070 [..]
1071 This subsection permits to get in run-time the status of the SDRAM controller
1072 and the data flow.
1073
1074 @endverbatim
1075 * @{
1076 */
1077
1078 /**
1079 * @brief Returns the SDRAM state.
1080 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
1081 * the configuration information for SDRAM module.
1082 * @retval HAL state
1083 */
HAL_SDRAM_GetState(SDRAM_HandleTypeDef * hsdram)1084 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram)
1085 {
1086 return hsdram->State;
1087 }
1088
1089 /**
1090 * @}
1091 */
1092
1093 /**
1094 * @}
1095 */
1096 #endif /* HAL_SDRAM_MODULE_ENABLED */
1097 /**
1098 * @}
1099 */
1100
1101 /**
1102 * @}
1103 */
1104
1105 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1106
