1 /** 2 ****************************************************************************** 3 * @file stm32f3xx_hal_can_legacy.h 4 * @author MCD Application Team 5 * @brief Header file of CAN HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef __STM32F3xx_HAL_CAN_LEGACY_H 22 #define __STM32F3xx_HAL_CAN_LEGACY_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \ 29 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ 30 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \ 31 defined(STM32F302x8) || \ 32 defined(STM32F373xC) || defined(STM32F378xx) 33 34 /* Includes ------------------------------------------------------------------*/ 35 #include "stm32f3xx_hal_def.h" 36 37 /** @addtogroup STM32F3xx_HAL_Driver 38 * @{ 39 */ 40 41 /** @addtogroup CAN 42 * @{ 43 */ 44 45 /* Exported types ------------------------------------------------------------*/ 46 /** @defgroup CAN_Exported_Types CAN Exported Types 47 * @{ 48 */ 49 /** 50 * @brief HAL State structures definition 51 */ 52 typedef enum 53 { 54 HAL_CAN_STATE_RESET = 0x00U, /*!< CAN not yet initialized or disabled */ 55 HAL_CAN_STATE_READY = 0x01U, /*!< CAN initialized and ready for use */ 56 HAL_CAN_STATE_BUSY = 0x02U, /*!< CAN process is ongoing */ 57 HAL_CAN_STATE_BUSY_TX = 0x12U, /*!< CAN process is ongoing */ 58 HAL_CAN_STATE_BUSY_RX0 = 0x22U, /*!< CAN process is ongoing */ 59 HAL_CAN_STATE_BUSY_RX1 = 0x32U, /*!< CAN process is ongoing */ 60 HAL_CAN_STATE_BUSY_TX_RX0 = 0x42U, /*!< CAN process is ongoing */ 61 HAL_CAN_STATE_BUSY_TX_RX1 = 0x52U, /*!< CAN process is ongoing */ 62 HAL_CAN_STATE_BUSY_RX0_RX1 = 0x62U, /*!< CAN process is ongoing */ 63 HAL_CAN_STATE_BUSY_TX_RX0_RX1 = 0x72U, /*!< CAN process is ongoing */ 64 HAL_CAN_STATE_TIMEOUT = 0x03U, /*!< CAN in Timeout state */ 65 HAL_CAN_STATE_ERROR = 0x04U /*!< CAN error state */ 66 67 }HAL_CAN_StateTypeDef; 68 69 /** 70 * @brief CAN init structure definition 71 */ 72 typedef struct 73 { 74 uint32_t Prescaler; /*!< Specifies the length of a time quantum. 75 This parameter must be a number between Min_Data = 1 and Max_Data = 1024. */ 76 77 uint32_t Mode; /*!< Specifies the CAN operating mode. 78 This parameter can be a value of @ref CAN_operating_mode */ 79 80 uint32_t SJW; /*!< Specifies the maximum number of time quanta 81 the CAN hardware is allowed to lengthen or 82 shorten a bit to perform resynchronization. 83 This parameter can be a value of @ref CAN_synchronisation_jump_width */ 84 85 uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1. 86 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */ 87 88 uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2. 89 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */ 90 91 uint32_t TTCM; /*!< Enable or disable the time triggered communication mode. 92 This parameter can be set to ENABLE or DISABLE. */ 93 94 uint32_t ABOM; /*!< Enable or disable the automatic bus-off management. 95 This parameter can be set to ENABLE or DISABLE. */ 96 97 uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode. 98 This parameter can be set to ENABLE or DISABLE. */ 99 100 uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode. 101 This parameter can be set to ENABLE or DISABLE. */ 102 103 uint32_t RFLM; /*!< Enable or disable the Receive FIFO Locked mode. 104 This parameter can be set to ENABLE or DISABLE. */ 105 106 uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority. 107 This parameter can be set to ENABLE or DISABLE. */ 108 }CAN_InitTypeDef; 109 110 /** 111 * @brief CAN filter configuration structure definition 112 */ 113 typedef struct 114 { 115 uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit 116 configuration, first one for a 16-bit configuration). 117 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 118 119 uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit 120 configuration, second one for a 16-bit configuration). 121 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 122 123 uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number, 124 according to the mode (MSBs for a 32-bit configuration, 125 first one for a 16-bit configuration). 126 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 127 128 uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number, 129 according to the mode (LSBs for a 32-bit configuration, 130 second one for a 16-bit configuration). 131 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 132 133 uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1U) which will be assigned to the filter. 134 This parameter can be a value of @ref CAN_filter_FIFO */ 135 136 uint32_t FilterNumber; /*!< Specifies the filter which will be initialized. 137 This parameter must be a number between Min_Data = 0 and Max_Data = 27. */ 138 139 uint32_t FilterMode; /*!< Specifies the filter mode to be initialized. 140 This parameter can be a value of @ref CAN_filter_mode */ 141 142 uint32_t FilterScale; /*!< Specifies the filter scale. 143 This parameter can be a value of @ref CAN_filter_scale */ 144 145 uint32_t FilterActivation; /*!< Enable or disable the filter. 146 This parameter can be set to ENABLE or DISABLE. */ 147 148 uint32_t BankNumber; /*!< Select the start slave bank filter 149 F3 devices don't support CAN2 interface (Slave). Therefore this parameter 150 is meaningless but it has been kept for compatibility accross STM32 families */ 151 152 }CAN_FilterConfTypeDef; 153 154 /** 155 * @brief CAN Tx message structure definition 156 */ 157 typedef struct 158 { 159 uint32_t StdId; /*!< Specifies the standard identifier. 160 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */ 161 162 uint32_t ExtId; /*!< Specifies the extended identifier. 163 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */ 164 165 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted. 166 This parameter can be a value of @ref CAN_identifier_type */ 167 168 uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted. 169 This parameter can be a value of @ref CAN_remote_transmission_request */ 170 171 uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted. 172 This parameter must be a number between Min_Data = 0 and Max_Data = 8. */ 173 174 uint8_t Data[8]; /*!< Contains the data to be transmitted. 175 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */ 176 177 }CanTxMsgTypeDef; 178 179 /** 180 * @brief CAN Rx message structure definition 181 */ 182 typedef struct 183 { 184 uint32_t StdId; /*!< Specifies the standard identifier. 185 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */ 186 187 uint32_t ExtId; /*!< Specifies the extended identifier. 188 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */ 189 190 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received. 191 This parameter can be a value of @ref CAN_identifier_type */ 192 193 uint32_t RTR; /*!< Specifies the type of frame for the received message. 194 This parameter can be a value of @ref CAN_remote_transmission_request */ 195 196 uint32_t DLC; /*!< Specifies the length of the frame that will be received. 197 This parameter must be a number between Min_Data = 0 and Max_Data = 8. */ 198 199 uint8_t Data[8]; /*!< Contains the data to be received. 200 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */ 201 202 uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through. 203 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */ 204 205 uint32_t FIFONumber; /*!< Specifies the receive FIFO number. 206 This parameter can be CAN_FIFO0 or CAN_FIFO1 */ 207 208 }CanRxMsgTypeDef; 209 210 /** 211 * @brief CAN handle Structure definition 212 */ 213 typedef struct 214 { 215 CAN_TypeDef *Instance; /*!< Register base address */ 216 217 CAN_InitTypeDef Init; /*!< CAN required parameters */ 218 219 CanTxMsgTypeDef* pTxMsg; /*!< Pointer to transmit structure */ 220 221 CanRxMsgTypeDef* pRxMsg; /*!< Pointer to reception structure for RX FIFO0 msg */ 222 223 CanRxMsgTypeDef* pRx1Msg; /*!< Pointer to reception structure for RX FIFO1 msg */ 224 225 HAL_LockTypeDef Lock; /*!< CAN locking object */ 226 227 __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */ 228 229 __IO uint32_t ErrorCode; /*!< CAN Error code 230 This parameter can be a value of @ref CAN_Error_Code */ 231 232 }CAN_HandleTypeDef; 233 /** 234 * @} 235 */ 236 237 /* Exported constants --------------------------------------------------------*/ 238 239 /** @defgroup CAN_Exported_Constants CAN Exported Constants 240 * @{ 241 */ 242 243 /** @defgroup CAN_Error_Code CAN Error Code 244 * @{ 245 */ 246 #define HAL_CAN_ERROR_NONE (0x00000000U) /*!< No error */ 247 #define HAL_CAN_ERROR_EWG (0x00000001U) /*!< EWG error */ 248 #define HAL_CAN_ERROR_EPV (0x00000002U) /*!< EPV error */ 249 #define HAL_CAN_ERROR_BOF (0x00000004U) /*!< BOF error */ 250 #define HAL_CAN_ERROR_STF (0x00000008U) /*!< Stuff error */ 251 #define HAL_CAN_ERROR_FOR (0x00000010U) /*!< Form error */ 252 #define HAL_CAN_ERROR_ACK (0x00000020U) /*!< Acknowledgment error */ 253 #define HAL_CAN_ERROR_BR (0x00000040U) /*!< Bit recessive */ 254 #define HAL_CAN_ERROR_BD (0x00000080U) /*!< LEC dominant */ 255 #define HAL_CAN_ERROR_CRC (0x00000100U) /*!< LEC transfer error */ 256 #define HAL_CAN_ERROR_FOV0 (0x00000200U) /*!< FIFO0 overrun error */ 257 #define HAL_CAN_ERROR_FOV1 (0x00000400U) /*!< FIFO1 overrun error */ 258 #define HAL_CAN_ERROR_TXFAIL (0x00000800U) /*!< Transmit failure */ 259 /** 260 * @} 261 */ 262 263 /** @defgroup CAN_InitStatus CAN InitStatus 264 * @{ 265 */ 266 #define CAN_INITSTATUS_FAILED (0x00000000U) /*!< CAN initialization failed */ 267 #define CAN_INITSTATUS_SUCCESS (0x00000001U) /*!< CAN initialization OK */ 268 /** 269 * @} 270 */ 271 272 /** @defgroup CAN_operating_mode CAN Operating Mode 273 * @{ 274 */ 275 #define CAN_MODE_NORMAL (0x00000000U) /*!< Normal mode */ 276 #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */ 277 #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */ 278 #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */ 279 /** 280 * @} 281 */ 282 283 284 /** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width 285 * @{ 286 */ 287 #define CAN_SJW_1TQ (0x00000000U) /*!< 1 time quantum */ 288 #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */ 289 #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */ 290 #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */ 291 /** 292 * @} 293 */ 294 295 /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1 296 * @{ 297 */ 298 #define CAN_BS1_1TQ (0x00000000U) /*!< 1 time quantum */ 299 #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */ 300 #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */ 301 #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */ 302 #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */ 303 #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */ 304 #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */ 305 #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */ 306 #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */ 307 #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */ 308 #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */ 309 #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */ 310 #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */ 311 #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */ 312 #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */ 313 #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */ 314 /** 315 * @} 316 */ 317 318 /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2 319 * @{ 320 */ 321 #define CAN_BS2_1TQ (0x00000000U) /*!< 1 time quantum */ 322 #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */ 323 #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */ 324 #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */ 325 #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */ 326 #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */ 327 #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */ 328 #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */ 329 /** 330 * @} 331 */ 332 333 /** @defgroup CAN_filter_mode CAN Filter Mode 334 * @{ 335 */ 336 #define CAN_FILTERMODE_IDMASK ((uint8_t)0x00U) /*!< Identifier mask mode */ 337 #define CAN_FILTERMODE_IDLIST ((uint8_t)0x01U) /*!< Identifier list mode */ 338 /** 339 * @} 340 */ 341 342 /** @defgroup CAN_filter_scale CAN Filter Scale 343 * @{ 344 */ 345 #define CAN_FILTERSCALE_16BIT ((uint8_t)0x00U) /*!< Two 16-bit filters */ 346 #define CAN_FILTERSCALE_32BIT ((uint8_t)0x01U) /*!< One 32-bit filter */ 347 /** 348 * @} 349 */ 350 351 /** @defgroup CAN_filter_FIFO CAN Filter FIFO 352 * @{ 353 */ 354 #define CAN_FILTER_FIFO0 ((uint8_t)0x00U) /*!< Filter FIFO 0 assignment for filter x */ 355 #define CAN_FILTER_FIFO1 ((uint8_t)0x01U) /*!< Filter FIFO 1 assignment for filter x */ 356 /** 357 * @} 358 */ 359 360 /** @defgroup CAN_identifier_type CAN Identifier Type 361 * @{ 362 */ 363 #define CAN_ID_STD (0x00000000U) /*!< Standard Id */ 364 #define CAN_ID_EXT (0x00000004U) /*!< Extended Id */ 365 /** 366 * @} 367 */ 368 369 /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request 370 * @{ 371 */ 372 #define CAN_RTR_DATA (0x00000000U) /*!< Data frame */ 373 #define CAN_RTR_REMOTE (0x00000002U) /*!< Remote frame */ 374 /** 375 * @} 376 */ 377 378 /** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number 379 * @{ 380 */ 381 #define CAN_FIFO0 ((uint8_t)0x00U) /*!< CAN FIFO 0 used to receive */ 382 #define CAN_FIFO1 ((uint8_t)0x01U) /*!< CAN FIFO 1 used to receive */ 383 /** 384 * @} 385 */ 386 387 /** @defgroup CAN_flags CAN Flags 388 * @{ 389 */ 390 /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus() 391 and CAN_ClearFlag() functions. */ 392 /* If the flag is 0x1XXXXXXX, it means that it can only be used with 393 CAN_GetFlagStatus() function. */ 394 395 /* Transmit Flags */ 396 #define CAN_FLAG_RQCP0 (0x00000500U) /*!< Request MailBox0 flag */ 397 #define CAN_FLAG_RQCP1 (0x00000508U) /*!< Request MailBox1 flag */ 398 #define CAN_FLAG_RQCP2 (0x00000510U) /*!< Request MailBox2 flag */ 399 #define CAN_FLAG_TXOK0 (0x00000501U) /*!< Transmission OK MailBox0 flag */ 400 #define CAN_FLAG_TXOK1 (0x00000509U) /*!< Transmission OK MailBox1 flag */ 401 #define CAN_FLAG_TXOK2 (0x00000511U) /*!< Transmission OK MailBox2 flag */ 402 #define CAN_FLAG_TME0 (0x0000051AU) /*!< Transmit mailbox 0 empty flag */ 403 #define CAN_FLAG_TME1 (0x0000051BU) /*!< Transmit mailbox 0 empty flag */ 404 #define CAN_FLAG_TME2 (0x0000051CU) /*!< Transmit mailbox 0 empty flag */ 405 406 /* Receive Flags */ 407 #define CAN_FLAG_FF0 (0x00000203U) /*!< FIFO 0 Full flag */ 408 #define CAN_FLAG_FOV0 (0x00000204U) /*!< FIFO 0 Overrun flag */ 409 410 #define CAN_FLAG_FF1 (0x00000403U) /*!< FIFO 1 Full flag */ 411 #define CAN_FLAG_FOV1 (0x00000404U) /*!< FIFO 1 Overrun flag */ 412 413 /* Operating Mode Flags */ 414 #define CAN_FLAG_INAK (0x00000100U) /*!< Initialization acknowledge flag */ 415 #define CAN_FLAG_SLAK (0x00000101U) /*!< Sleep acknowledge flag */ 416 #define CAN_FLAG_ERRI (0x00000102U) /*!< Error flag */ 417 #define CAN_FLAG_WKU (0x00000103U) /*!< Wake up flag */ 418 #define CAN_FLAG_SLAKI (0x00000104U) /*!< Sleep acknowledge flag */ 419 /* @note When SLAK interrupt is disabled (SLKIE=0U), no polling on SLAKI is possible. 420 In this case the SLAK bit can be polled.*/ 421 422 /* Error Flags */ 423 #define CAN_FLAG_EWG (0x00000300U) /*!< Error warning flag */ 424 #define CAN_FLAG_EPV (0x00000301U) /*!< Error passive flag */ 425 #define CAN_FLAG_BOF (0x00000302U) /*!< Bus-Off flag */ 426 427 /** 428 * @} 429 */ 430 431 432 /** @defgroup CAN_interrupts CAN Interrupts 433 * @{ 434 */ 435 #define CAN_IT_TME ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */ 436 437 /* Receive Interrupts */ 438 #define CAN_IT_FMP0 ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */ 439 #define CAN_IT_FF0 ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */ 440 #define CAN_IT_FOV0 ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */ 441 #define CAN_IT_FMP1 ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */ 442 #define CAN_IT_FF1 ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */ 443 #define CAN_IT_FOV1 ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */ 444 445 /* Operating Mode Interrupts */ 446 #define CAN_IT_WKU ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */ 447 #define CAN_IT_SLK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */ 448 449 /* Error Interrupts */ 450 #define CAN_IT_EWG ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */ 451 #define CAN_IT_EPV ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */ 452 #define CAN_IT_BOF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */ 453 #define CAN_IT_LEC ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */ 454 #define CAN_IT_ERR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */ 455 456 /** 457 * @} 458 */ 459 460 /** @defgroup CAN_Mailboxes CAN Mailboxes 461 * @{ 462 */ 463 /* Mailboxes definition */ 464 #define CAN_TXMAILBOX_0 ((uint8_t)0x00U) 465 #define CAN_TXMAILBOX_1 ((uint8_t)0x01U) 466 #define CAN_TXMAILBOX_2 ((uint8_t)0x02U) 467 /** 468 * @} 469 */ 470 471 /** 472 * @} 473 */ 474 475 /* Exported macros -----------------------------------------------------------*/ 476 /** @defgroup CAN_Exported_Macros CAN Exported Macros 477 * @{ 478 */ 479 480 /** @brief Reset CAN handle state 481 * @param __HANDLE__ CAN handle. 482 * @retval None 483 */ 484 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET) 485 486 /** 487 * @brief Enable the specified CAN interrupts. 488 * @param __HANDLE__ CAN handle. 489 * @param __INTERRUPT__ CAN Interrupt 490 * @retval None 491 */ 492 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__)) 493 494 /** 495 * @brief Disable the specified CAN interrupts. 496 * @param __HANDLE__ CAN handle. 497 * @param __INTERRUPT__ CAN Interrupt 498 * @retval None 499 */ 500 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__)) 501 502 /** 503 * @brief Return the number of pending received messages. 504 * @param __HANDLE__ CAN handle. 505 * @param __FIFONUMBER__ Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. 506 * @retval The number of pending message. 507 */ 508 #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \ 509 ((uint8_t)((__HANDLE__)->Instance->RF0R&0x03U)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&0x03U))) 510 511 /** @brief Check whether the specified CAN flag is set or not. 512 * @param __HANDLE__ specifies the CAN Handle. 513 * @param __FLAG__ specifies the flag to check. 514 * This parameter can be one of the following values: 515 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag 516 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag 517 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag 518 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag 519 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag 520 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag 521 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag 522 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag 523 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag 524 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag 525 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag 526 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag 527 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag 528 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag 529 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag 530 * @arg CAN_FLAG_WKU: Wake up Flag 531 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag 532 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag 533 * @arg CAN_FLAG_EWG: Error Warning Flag 534 * @arg CAN_FLAG_EPV: Error Passive Flag 535 * @arg CAN_FLAG_BOF: Bus-Off Flag 536 * @retval The new state of __FLAG__ (TRUE or FALSE). 537 */ 538 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \ 539 ((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 540 (((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 541 (((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 542 (((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 543 ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK)))) 544 545 /** @brief Clear the specified CAN pending flag. 546 * @param __HANDLE__ specifies the CAN Handle. 547 * @param __FLAG__ specifies the flag to check. 548 * This parameter can be one of the following values: 549 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag 550 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag 551 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag 552 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag 553 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag 554 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag 555 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag 556 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag 557 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag 558 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag 559 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag 560 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag 561 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag 562 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag 563 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag 564 * @arg CAN_FLAG_WKU: Wake up Flag 565 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag 566 * @arg CAN_FLAG_EWG: Error Warning Flag 567 * @arg CAN_FLAG_EPV: Error Passive Flag 568 * @arg CAN_FLAG_BOF: Bus-Off Flag 569 * @retval The new state of __FLAG__ (TRUE or FALSE). 570 */ 571 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \ 572 ((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 573 (((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 574 (((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 575 (((__FLAG__) >> 8U) == 1U)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U) 576 577 578 /** @brief Check if the specified CAN interrupt source is enabled or disabled. 579 * @param __HANDLE__ specifies the CAN Handle. 580 * @param __INTERRUPT__ specifies the CAN interrupt source to check. 581 * This parameter can be one of the following values: 582 * @arg CAN_IT_TME: Transmit mailbox empty interrupt enable 583 * @arg CAN_IT_FMP0: FIFO0 message pending interrupt enablev 584 * @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable 585 * @retval The new state of __IT__ (TRUE or FALSE). 586 */ 587 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 588 589 /** 590 * @brief Check the transmission status of a CAN Frame. 591 * @param __HANDLE__ CAN handle. 592 * @param __TRANSMITMAILBOX__ the number of the mailbox that is used for transmission. 593 * @retval The new status of transmission (TRUE or FALSE). 594 */ 595 #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\ 596 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TME0)) :\ 597 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TME1)) :\ 598 ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TME2))) 599 600 /** 601 * @brief Release the specified receive FIFO. 602 * @param __HANDLE__ CAN handle. 603 * @param __FIFONUMBER__ Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. 604 * @retval None 605 */ 606 #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \ 607 ((__HANDLE__)->Instance->RF0R |= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R |= CAN_RF1R_RFOM1)) 608 609 /** 610 * @brief Cancel a transmit request. 611 * @param __HANDLE__ specifies the CAN Handle. 612 * @param __TRANSMITMAILBOX__ the number of the mailbox that is used for transmission. 613 * @retval None 614 */ 615 #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\ 616 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ0) :\ 617 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ1) :\ 618 ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ2)) 619 620 /** 621 * @brief Enable or disables the DBG Freeze for CAN. 622 * @param __HANDLE__ specifies the CAN Handle. 623 * @param __NEWSTATE__ new state of the CAN peripheral. 624 * This parameter can be: ENABLE (CAN reception/transmission is frozen 625 * during debug. Reception FIFOs can still be accessed/controlled normally) 626 * or DISABLE (CAN is working during debug). 627 * @retval None 628 */ 629 #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \ 630 ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF)) 631 632 /** 633 * @} 634 */ 635 636 /* Exported functions --------------------------------------------------------*/ 637 /** @addtogroup CAN_Exported_Functions CAN Exported Functions 638 * @{ 639 */ 640 641 /** @addtogroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions 642 * @brief Initialization and Configuration functions 643 * @{ 644 */ 645 646 /* Initialization and de-initialization functions *****************************/ 647 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan); 648 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig); 649 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan); 650 void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan); 651 void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan); 652 /** 653 * @} 654 */ 655 656 /** @addtogroup CAN_Exported_Functions_Group2 Input and Output operation functions 657 * @brief I/O operation functions 658 * @{ 659 */ 660 /* IO operation functions *****************************************************/ 661 HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout); 662 HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan); 663 HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout); 664 HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber); 665 HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan); 666 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan); 667 void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan); 668 void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan); 669 void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan); 670 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan); 671 /** 672 * @} 673 */ 674 675 /** @addtogroup CAN_Exported_Functions_Group3 Peripheral State and Error functions 676 * @brief CAN Peripheral State functions 677 * @{ 678 */ 679 /* Peripheral State and Error functions ***************************************/ 680 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan); 681 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan); 682 /** 683 * @} 684 */ 685 686 /** 687 * @} 688 */ 689 690 /* Private types -------------------------------------------------------------*/ 691 /** @defgroup CAN_Private_Types CAN Private Types 692 * @{ 693 */ 694 695 /** 696 * @} 697 */ 698 699 /* Private variables ---------------------------------------------------------*/ 700 /** @defgroup CAN_Private_Variables CAN Private Variables 701 * @{ 702 */ 703 704 /** 705 * @} 706 */ 707 708 /* Private constants ---------------------------------------------------------*/ 709 /** @defgroup CAN_Private_Constants CAN Private Constants 710 * @{ 711 */ 712 #define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04U) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */ 713 #define CAN_FLAG_MASK (0x000000FFU) 714 /** 715 * @} 716 */ 717 718 /* Private Macros -----------------------------------------------------------*/ 719 /** @defgroup CAN_Private_Macros CAN Private Macros 720 * @{ 721 */ 722 723 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \ 724 ((MODE) == CAN_MODE_LOOPBACK)|| \ 725 ((MODE) == CAN_MODE_SILENT) || \ 726 ((MODE) == CAN_MODE_SILENT_LOOPBACK)) 727 728 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \ 729 ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ)) 730 731 #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ) 732 733 #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ) 734 735 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U)) 736 737 #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27U) 738 739 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \ 740 ((MODE) == CAN_FILTERMODE_IDLIST)) 741 742 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \ 743 ((SCALE) == CAN_FILTERSCALE_32BIT)) 744 745 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \ 746 ((FIFO) == CAN_FILTER_FIFO1)) 747 748 #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28U) 749 750 #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02U)) 751 #define IS_CAN_STDID(STDID) ((STDID) <= (0x7FFU)) 752 #define IS_CAN_EXTID(EXTID) ((EXTID) <= (0x1FFFFFFFU)) 753 #define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08U)) 754 755 #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \ 756 ((IDTYPE) == CAN_ID_EXT)) 757 758 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE)) 759 760 #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1)) 761 762 #define IS_CAN_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FMP0) ||\ 763 ((IT) == CAN_IT_FF0) || ((IT) == CAN_IT_FOV0) ||\ 764 ((IT) == CAN_IT_FMP1) || ((IT) == CAN_IT_FF1) ||\ 765 ((IT) == CAN_IT_FOV1) || ((IT) == CAN_IT_EWG) ||\ 766 ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\ 767 ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\ 768 ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK)) 769 770 #define IS_CAN_CLEAR_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FF0) ||\ 771 ((IT) == CAN_IT_FOV0)|| ((IT) == CAN_IT_FF1) ||\ 772 ((IT) == CAN_IT_FOV1)|| ((IT) == CAN_IT_EWG) ||\ 773 ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\ 774 ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\ 775 ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK)) 776 777 /** 778 * @} 779 */ 780 /* End of private macros -----------------------------------------------------*/ 781 782 /** 783 * @} 784 */ 785 786 /** 787 * @} 788 */ 789 790 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ 791 /* STM32F302xC || STM32F303xC || STM32F358xx || */ 792 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ 793 /* STM32F302x8 || */ 794 /* STM32F373xC || STM32F378xx */ 795 796 #ifdef __cplusplus 797 } 798 #endif 799 800 #endif /* __STM32F3xx_HAL_CAN_LEGACY_H */ 801 802 803 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 804
