1 /** 2 ****************************************************************************** 3 * @file stm32f1xx_hal_spi.h 4 * @author MCD Application Team 5 * @brief Header file of SPI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32F1xx_HAL_SPI_H 22 #define STM32F1xx_HAL_SPI_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32f1xx_hal_def.h" 30 31 /** @addtogroup STM32F1xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup SPI 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup SPI_Exported_Types SPI Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief SPI Configuration Structure definition 46 */ 47 typedef struct 48 { 49 uint32_t Mode; /*!< Specifies the SPI operating mode. 50 This parameter can be a value of @ref SPI_Mode */ 51 52 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state. 53 This parameter can be a value of @ref SPI_Direction */ 54 55 uint32_t DataSize; /*!< Specifies the SPI data size. 56 This parameter can be a value of @ref SPI_Data_Size */ 57 58 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. 59 This parameter can be a value of @ref SPI_Clock_Polarity */ 60 61 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. 62 This parameter can be a value of @ref SPI_Clock_Phase */ 63 64 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by 65 hardware (NSS pin) or by software using the SSI bit. 66 This parameter can be a value of @ref SPI_Slave_Select_management */ 67 68 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be 69 used to configure the transmit and receive SCK clock. 70 This parameter can be a value of @ref SPI_BaudRate_Prescaler 71 @note The communication clock is derived from the master 72 clock. The slave clock does not need to be set. */ 73 74 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 75 This parameter can be a value of @ref SPI_MSB_LSB_transmission */ 76 77 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not. 78 This parameter can be a value of @ref SPI_TI_mode */ 79 80 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. 81 This parameter can be a value of @ref SPI_CRC_Calculation */ 82 83 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. 84 This parameter must be an odd number between Min_Data = 1 and Max_Data = 65535 */ 85 } SPI_InitTypeDef; 86 87 /** 88 * @brief HAL SPI State structure definition 89 */ 90 typedef enum 91 { 92 HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */ 93 HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 94 HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ 95 HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ 96 HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ 97 HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ 98 HAL_SPI_STATE_ERROR = 0x06U, /*!< SPI error state */ 99 HAL_SPI_STATE_ABORT = 0x07U /*!< SPI abort is ongoing */ 100 } HAL_SPI_StateTypeDef; 101 102 /** 103 * @brief SPI handle Structure definition 104 */ 105 typedef struct __SPI_HandleTypeDef 106 { 107 SPI_TypeDef *Instance; /*!< SPI registers base address */ 108 109 SPI_InitTypeDef Init; /*!< SPI communication parameters */ 110 111 uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ 112 113 uint16_t TxXferSize; /*!< SPI Tx Transfer size */ 114 115 __IO uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */ 116 117 uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */ 118 119 uint16_t RxXferSize; /*!< SPI Rx Transfer size */ 120 121 __IO uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */ 122 123 void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Rx ISR */ 124 125 void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Tx ISR */ 126 127 DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA Handle parameters */ 128 129 DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA Handle parameters */ 130 131 HAL_LockTypeDef Lock; /*!< Locking object */ 132 133 __IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */ 134 135 __IO uint32_t ErrorCode; /*!< SPI Error code */ 136 137 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 138 void (* TxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Completed callback */ 139 void (* RxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Completed callback */ 140 void (* TxRxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Completed callback */ 141 void (* TxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Half Completed callback */ 142 void (* RxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Half Completed callback */ 143 void (* TxRxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Half Completed callback */ 144 void (* ErrorCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Error callback */ 145 void (* AbortCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Abort callback */ 146 void (* MspInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp Init callback */ 147 void (* MspDeInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp DeInit callback */ 148 149 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 150 } SPI_HandleTypeDef; 151 152 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 153 /** 154 * @brief HAL SPI Callback ID enumeration definition 155 */ 156 typedef enum 157 { 158 HAL_SPI_TX_COMPLETE_CB_ID = 0x00U, /*!< SPI Tx Completed callback ID */ 159 HAL_SPI_RX_COMPLETE_CB_ID = 0x01U, /*!< SPI Rx Completed callback ID */ 160 HAL_SPI_TX_RX_COMPLETE_CB_ID = 0x02U, /*!< SPI TxRx Completed callback ID */ 161 HAL_SPI_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< SPI Tx Half Completed callback ID */ 162 HAL_SPI_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< SPI Rx Half Completed callback ID */ 163 HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /*!< SPI TxRx Half Completed callback ID */ 164 HAL_SPI_ERROR_CB_ID = 0x06U, /*!< SPI Error callback ID */ 165 HAL_SPI_ABORT_CB_ID = 0x07U, /*!< SPI Abort callback ID */ 166 HAL_SPI_MSPINIT_CB_ID = 0x08U, /*!< SPI Msp Init callback ID */ 167 HAL_SPI_MSPDEINIT_CB_ID = 0x09U /*!< SPI Msp DeInit callback ID */ 168 169 } HAL_SPI_CallbackIDTypeDef; 170 171 /** 172 * @brief HAL SPI Callback pointer definition 173 */ 174 typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to an SPI callback function */ 175 176 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 177 /** 178 * @} 179 */ 180 181 /* Exported constants --------------------------------------------------------*/ 182 /** @defgroup SPI_Exported_Constants SPI Exported Constants 183 * @{ 184 */ 185 186 /** @defgroup SPI_Error_Code SPI Error Code 187 * @{ 188 */ 189 #define HAL_SPI_ERROR_NONE (0x00000000U) /*!< No error */ 190 #define HAL_SPI_ERROR_MODF (0x00000001U) /*!< MODF error */ 191 #define HAL_SPI_ERROR_CRC (0x00000002U) /*!< CRC error */ 192 #define HAL_SPI_ERROR_OVR (0x00000004U) /*!< OVR error */ 193 #define HAL_SPI_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 194 #define HAL_SPI_ERROR_FLAG (0x00000020U) /*!< Error on RXNE/TXE/BSY Flag */ 195 #define HAL_SPI_ERROR_ABORT (0x00000040U) /*!< Error during SPI Abort procedure */ 196 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 197 #define HAL_SPI_ERROR_INVALID_CALLBACK (0x00000080U) /*!< Invalid Callback error */ 198 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 199 /** 200 * @} 201 */ 202 203 /** @defgroup SPI_Mode SPI Mode 204 * @{ 205 */ 206 #define SPI_MODE_SLAVE (0x00000000U) 207 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) 208 /** 209 * @} 210 */ 211 212 /** @defgroup SPI_Direction SPI Direction Mode 213 * @{ 214 */ 215 #define SPI_DIRECTION_2LINES (0x00000000U) 216 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY 217 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE 218 /** 219 * @} 220 */ 221 222 /** @defgroup SPI_Data_Size SPI Data Size 223 * @{ 224 */ 225 #define SPI_DATASIZE_8BIT (0x00000000U) 226 #define SPI_DATASIZE_16BIT SPI_CR1_DFF 227 /** 228 * @} 229 */ 230 231 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity 232 * @{ 233 */ 234 #define SPI_POLARITY_LOW (0x00000000U) 235 #define SPI_POLARITY_HIGH SPI_CR1_CPOL 236 /** 237 * @} 238 */ 239 240 /** @defgroup SPI_Clock_Phase SPI Clock Phase 241 * @{ 242 */ 243 #define SPI_PHASE_1EDGE (0x00000000U) 244 #define SPI_PHASE_2EDGE SPI_CR1_CPHA 245 /** 246 * @} 247 */ 248 249 /** @defgroup SPI_Slave_Select_management SPI Slave Select Management 250 * @{ 251 */ 252 #define SPI_NSS_SOFT SPI_CR1_SSM 253 #define SPI_NSS_HARD_INPUT (0x00000000U) 254 #define SPI_NSS_HARD_OUTPUT (SPI_CR2_SSOE << 16U) 255 /** 256 * @} 257 */ 258 259 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler 260 * @{ 261 */ 262 #define SPI_BAUDRATEPRESCALER_2 (0x00000000U) 263 #define SPI_BAUDRATEPRESCALER_4 (SPI_CR1_BR_0) 264 #define SPI_BAUDRATEPRESCALER_8 (SPI_CR1_BR_1) 265 #define SPI_BAUDRATEPRESCALER_16 (SPI_CR1_BR_1 | SPI_CR1_BR_0) 266 #define SPI_BAUDRATEPRESCALER_32 (SPI_CR1_BR_2) 267 #define SPI_BAUDRATEPRESCALER_64 (SPI_CR1_BR_2 | SPI_CR1_BR_0) 268 #define SPI_BAUDRATEPRESCALER_128 (SPI_CR1_BR_2 | SPI_CR1_BR_1) 269 #define SPI_BAUDRATEPRESCALER_256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) 270 /** 271 * @} 272 */ 273 274 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission 275 * @{ 276 */ 277 #define SPI_FIRSTBIT_MSB (0x00000000U) 278 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST 279 /** 280 * @} 281 */ 282 283 /** @defgroup SPI_TI_mode SPI TI Mode 284 * @{ 285 */ 286 #define SPI_TIMODE_DISABLE (0x00000000U) 287 /** 288 * @} 289 */ 290 291 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation 292 * @{ 293 */ 294 #define SPI_CRCCALCULATION_DISABLE (0x00000000U) 295 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN 296 /** 297 * @} 298 */ 299 300 /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition 301 * @{ 302 */ 303 #define SPI_IT_TXE SPI_CR2_TXEIE 304 #define SPI_IT_RXNE SPI_CR2_RXNEIE 305 #define SPI_IT_ERR SPI_CR2_ERRIE 306 /** 307 * @} 308 */ 309 310 /** @defgroup SPI_Flags_definition SPI Flags Definition 311 * @{ 312 */ 313 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */ 314 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */ 315 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */ 316 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */ 317 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */ 318 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */ 319 #define SPI_FLAG_MASK (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_BSY\ 320 | SPI_SR_CRCERR | SPI_SR_MODF | SPI_SR_OVR) 321 /** 322 * @} 323 */ 324 325 /** 326 * @} 327 */ 328 329 /* Exported macros -----------------------------------------------------------*/ 330 /** @defgroup SPI_Exported_Macros SPI Exported Macros 331 * @{ 332 */ 333 334 /** @brief Reset SPI handle state. 335 * @param __HANDLE__ specifies the SPI Handle. 336 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 337 * @retval None 338 */ 339 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 340 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 341 (__HANDLE__)->State = HAL_SPI_STATE_RESET; \ 342 (__HANDLE__)->MspInitCallback = NULL; \ 343 (__HANDLE__)->MspDeInitCallback = NULL; \ 344 } while(0) 345 #else 346 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) 347 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 348 349 /** @brief Enable the specified SPI interrupts. 350 * @param __HANDLE__ specifies the SPI Handle. 351 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 352 * @param __INTERRUPT__ specifies the interrupt source to enable. 353 * This parameter can be one of the following values: 354 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 355 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 356 * @arg SPI_IT_ERR: Error interrupt enable 357 * @retval None 358 */ 359 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) 360 361 /** @brief Disable the specified SPI interrupts. 362 * @param __HANDLE__ specifies the SPI handle. 363 * This parameter can be SPIx where x: 1, 2, or 3 to select the SPI peripheral. 364 * @param __INTERRUPT__ specifies the interrupt source to disable. 365 * This parameter can be one of the following values: 366 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 367 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 368 * @arg SPI_IT_ERR: Error interrupt enable 369 * @retval None 370 */ 371 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) 372 373 /** @brief Check whether the specified SPI interrupt source is enabled or not. 374 * @param __HANDLE__ specifies the SPI Handle. 375 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 376 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 377 * This parameter can be one of the following values: 378 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 379 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 380 * @arg SPI_IT_ERR: Error interrupt enable 381 * @retval The new state of __IT__ (TRUE or FALSE). 382 */ 383 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\ 384 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 385 386 /** @brief Check whether the specified SPI flag is set or not. 387 * @param __HANDLE__ specifies the SPI Handle. 388 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 389 * @param __FLAG__ specifies the flag to check. 390 * This parameter can be one of the following values: 391 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag 392 * @arg SPI_FLAG_TXE: Transmit buffer empty flag 393 * @arg SPI_FLAG_CRCERR: CRC error flag 394 * @arg SPI_FLAG_MODF: Mode fault flag 395 * @arg SPI_FLAG_OVR: Overrun flag 396 * @arg SPI_FLAG_BSY: Busy flag 397 * @retval The new state of __FLAG__ (TRUE or FALSE). 398 */ 399 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 400 401 /** @brief Clear the SPI CRCERR pending flag. 402 * @param __HANDLE__ specifies the SPI Handle. 403 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 404 * @retval None 405 */ 406 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR)) 407 408 /** @brief Clear the SPI MODF pending flag. 409 * @param __HANDLE__ specifies the SPI Handle. 410 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 411 * @retval None 412 */ 413 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ 414 do{ \ 415 __IO uint32_t tmpreg_modf = 0x00U; \ 416 tmpreg_modf = (__HANDLE__)->Instance->SR; \ 417 CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \ 418 UNUSED(tmpreg_modf); \ 419 } while(0U) 420 421 /** @brief Clear the SPI OVR pending flag. 422 * @param __HANDLE__ specifies the SPI Handle. 423 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 424 * @retval None 425 */ 426 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ 427 do{ \ 428 __IO uint32_t tmpreg_ovr = 0x00U; \ 429 tmpreg_ovr = (__HANDLE__)->Instance->DR; \ 430 tmpreg_ovr = (__HANDLE__)->Instance->SR; \ 431 UNUSED(tmpreg_ovr); \ 432 } while(0U) 433 434 /** @brief Enable the SPI peripheral. 435 * @param __HANDLE__ specifies the SPI Handle. 436 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 437 * @retval None 438 */ 439 #define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) 440 441 /** @brief Disable the SPI peripheral. 442 * @param __HANDLE__ specifies the SPI Handle. 443 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 444 * @retval None 445 */ 446 #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) 447 448 /** 449 * @} 450 */ 451 452 /* Private constants ---------------------------------------------------------*/ 453 /** @defgroup SPI_Private_Constants SPI Private Constants 454 * @{ 455 */ 456 #define SPI_INVALID_CRC_ERROR 0U /* CRC error wrongly detected */ 457 #define SPI_VALID_CRC_ERROR 1U /* CRC error is true */ 458 /** 459 * @} 460 */ 461 462 /* Private macros ------------------------------------------------------------*/ 463 /** @defgroup SPI_Private_Macros SPI Private Macros 464 * @{ 465 */ 466 467 /** @brief Set the SPI transmit-only mode. 468 * @param __HANDLE__ specifies the SPI Handle. 469 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 470 * @retval None 471 */ 472 #define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) 473 474 /** @brief Set the SPI receive-only mode. 475 * @param __HANDLE__ specifies the SPI Handle. 476 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 477 * @retval None 478 */ 479 #define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) 480 481 /** @brief Reset the CRC calculation of the SPI. 482 * @param __HANDLE__ specifies the SPI Handle. 483 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 484 * @retval None 485 */ 486 #define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\ 487 SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U) 488 489 /** @brief Check whether the specified SPI flag is set or not. 490 * @param __SR__ copy of SPI SR register. 491 * @param __FLAG__ specifies the flag to check. 492 * This parameter can be one of the following values: 493 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag 494 * @arg SPI_FLAG_TXE: Transmit buffer empty flag 495 * @arg SPI_FLAG_CRCERR: CRC error flag 496 * @arg SPI_FLAG_MODF: Mode fault flag 497 * @arg SPI_FLAG_OVR: Overrun flag 498 * @arg SPI_FLAG_BSY: Busy flag 499 * @retval SET or RESET. 500 */ 501 #define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \ 502 ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET) 503 504 /** @brief Check whether the specified SPI Interrupt is set or not. 505 * @param __CR2__ copy of SPI CR2 register. 506 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 507 * This parameter can be one of the following values: 508 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 509 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 510 * @arg SPI_IT_ERR: Error interrupt enable 511 * @retval SET or RESET. 512 */ 513 #define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \ 514 (__INTERRUPT__)) ? SET : RESET) 515 516 /** @brief Checks if SPI Mode parameter is in allowed range. 517 * @param __MODE__ specifies the SPI Mode. 518 * This parameter can be a value of @ref SPI_Mode 519 * @retval None 520 */ 521 #define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || \ 522 ((__MODE__) == SPI_MODE_MASTER)) 523 524 /** @brief Checks if SPI Direction Mode parameter is in allowed range. 525 * @param __MODE__ specifies the SPI Direction Mode. 526 * This parameter can be a value of @ref SPI_Direction 527 * @retval None 528 */ 529 #define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ 530 ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \ 531 ((__MODE__) == SPI_DIRECTION_1LINE)) 532 533 /** @brief Checks if SPI Direction Mode parameter is 2 lines. 534 * @param __MODE__ specifies the SPI Direction Mode. 535 * @retval None 536 */ 537 #define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES) 538 539 /** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines. 540 * @param __MODE__ specifies the SPI Direction Mode. 541 * @retval None 542 */ 543 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ 544 ((__MODE__) == SPI_DIRECTION_1LINE)) 545 546 /** @brief Checks if SPI Data Size parameter is in allowed range. 547 * @param __DATASIZE__ specifies the SPI Data Size. 548 * This parameter can be a value of @ref SPI_Data_Size 549 * @retval None 550 */ 551 #define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \ 552 ((__DATASIZE__) == SPI_DATASIZE_8BIT)) 553 554 /** @brief Checks if SPI Serial clock steady state parameter is in allowed range. 555 * @param __CPOL__ specifies the SPI serial clock steady state. 556 * This parameter can be a value of @ref SPI_Clock_Polarity 557 * @retval None 558 */ 559 #define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \ 560 ((__CPOL__) == SPI_POLARITY_HIGH)) 561 562 /** @brief Checks if SPI Clock Phase parameter is in allowed range. 563 * @param __CPHA__ specifies the SPI Clock Phase. 564 * This parameter can be a value of @ref SPI_Clock_Phase 565 * @retval None 566 */ 567 #define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \ 568 ((__CPHA__) == SPI_PHASE_2EDGE)) 569 570 /** @brief Checks if SPI Slave Select parameter is in allowed range. 571 * @param __NSS__ specifies the SPI Slave Select management parameter. 572 * This parameter can be a value of @ref SPI_Slave_Select_management 573 * @retval None 574 */ 575 #define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \ 576 ((__NSS__) == SPI_NSS_HARD_INPUT) || \ 577 ((__NSS__) == SPI_NSS_HARD_OUTPUT)) 578 579 /** @brief Checks if SPI Baudrate prescaler parameter is in allowed range. 580 * @param __PRESCALER__ specifies the SPI Baudrate prescaler. 581 * This parameter can be a value of @ref SPI_BaudRate_Prescaler 582 * @retval None 583 */ 584 #define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \ 585 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \ 586 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \ 587 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \ 588 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \ 589 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \ 590 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \ 591 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256)) 592 593 /** @brief Checks if SPI MSB LSB transmission parameter is in allowed range. 594 * @param __BIT__ specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit). 595 * This parameter can be a value of @ref SPI_MSB_LSB_transmission 596 * @retval None 597 */ 598 #define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \ 599 ((__BIT__) == SPI_FIRSTBIT_LSB)) 600 601 /** @brief Checks if SPI TI mode parameter is disabled. 602 * @param __MODE__ SPI_TIMODE_DISABLE. Device not support Ti Mode. 603 * This parameter can be a value of @ref SPI_TI_mode 604 * @retval None 605 */ 606 #define IS_SPI_TIMODE(__MODE__) ((__MODE__) == SPI_TIMODE_DISABLE) 607 608 /** @brief Checks if SPI CRC calculation enabled state is in allowed range. 609 * @param __CALCULATION__ specifies the SPI CRC calculation enable state. 610 * This parameter can be a value of @ref SPI_CRC_Calculation 611 * @retval None 612 */ 613 #define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \ 614 ((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE)) 615 616 /** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range. 617 * @param __POLYNOMIAL__ specifies the SPI polynomial value to be used for the CRC calculation. 618 * This parameter must be a number between Min_Data = 0 and Max_Data = 65535 619 * @retval None 620 */ 621 #define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && \ 622 ((__POLYNOMIAL__) <= 0xFFFFU) && \ 623 (((__POLYNOMIAL__)&0x1U) != 0U)) 624 625 /** @brief Checks if DMA handle is valid. 626 * @param __HANDLE__ specifies a DMA Handle. 627 * @retval None 628 */ 629 #define IS_SPI_DMA_HANDLE(__HANDLE__) ((__HANDLE__) != NULL) 630 631 /** 632 * @} 633 */ 634 635 /* Private functions ---------------------------------------------------------*/ 636 /** @defgroup SPI_Private_Functions SPI Private Functions 637 * @{ 638 */ 639 uint8_t SPI_ISCRCErrorValid(SPI_HandleTypeDef *hspi); 640 /** 641 * @} 642 */ 643 644 /* Exported functions --------------------------------------------------------*/ 645 /** @addtogroup SPI_Exported_Functions 646 * @{ 647 */ 648 649 /** @addtogroup SPI_Exported_Functions_Group1 650 * @{ 651 */ 652 /* Initialization/de-initialization functions ********************************/ 653 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); 654 HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi); 655 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); 656 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); 657 658 /* Callbacks Register/UnRegister functions ***********************************/ 659 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 660 HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID, pSPI_CallbackTypeDef pCallback); 661 HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID); 662 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 663 /** 664 * @} 665 */ 666 667 /** @addtogroup SPI_Exported_Functions_Group2 668 * @{ 669 */ 670 /* I/O operation functions ***************************************************/ 671 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); 672 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); 673 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, 674 uint32_t Timeout); 675 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 676 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 677 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, 678 uint16_t Size); 679 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 680 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 681 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, 682 uint16_t Size); 683 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); 684 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); 685 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi); 686 /* Transfer Abort functions */ 687 HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi); 688 HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi); 689 690 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); 691 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); 692 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi); 693 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi); 694 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi); 695 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi); 696 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi); 697 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); 698 void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi); 699 /** 700 * @} 701 */ 702 703 /** @addtogroup SPI_Exported_Functions_Group3 704 * @{ 705 */ 706 /* Peripheral State and Error functions ***************************************/ 707 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi); 708 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); 709 /** 710 * @} 711 */ 712 713 /** 714 * @} 715 */ 716 717 /** 718 * @} 719 */ 720 721 /** 722 * @} 723 */ 724 725 #ifdef __cplusplus 726 } 727 #endif 728 729 #endif /* STM32F1xx_HAL_SPI_H */ 730 731 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 732
