1/*
2 * NOTE: Autogenerated file using genpinctrl.py
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <dt-bindings/pinctrl/stm32-pinctrl.h>
8
9/ {
10	soc {
11		pinctrl: pin-controller@48000000 {
12
13			/* ADC_IN / ADC_INN / ADC_INP */
14
15			adc1_in5_pa0: adc1_in5_pa0 {
16				pinmux = <STM32_PINMUX('A', 0, ANALOG)>;
17			};
18
19			adc1_in6_pa1: adc1_in6_pa1 {
20				pinmux = <STM32_PINMUX('A', 1, ANALOG)>;
21			};
22
23			adc1_in7_pa2: adc1_in7_pa2 {
24				pinmux = <STM32_PINMUX('A', 2, ANALOG)>;
25			};
26
27			adc1_in8_pa3: adc1_in8_pa3 {
28				pinmux = <STM32_PINMUX('A', 3, ANALOG)>;
29			};
30
31			adc1_in9_pa4: adc1_in9_pa4 {
32				pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
33			};
34
35			adc1_in10_pa5: adc1_in10_pa5 {
36				pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
37			};
38
39			adc1_in11_pa6: adc1_in11_pa6 {
40				pinmux = <STM32_PINMUX('A', 6, ANALOG)>;
41			};
42
43			adc1_in12_pa7: adc1_in12_pa7 {
44				pinmux = <STM32_PINMUX('A', 7, ANALOG)>;
45			};
46
47			adc1_in15_pb0: adc1_in15_pb0 {
48				pinmux = <STM32_PINMUX('B', 0, ANALOG)>;
49			};
50
51			adc1_in16_pb1: adc1_in16_pb1 {
52				pinmux = <STM32_PINMUX('B', 1, ANALOG)>;
53			};
54
55			/* CAN_RX */
56
57			can1_rx_pa11: can1_rx_pa11 {
58				pinmux = <STM32_PINMUX('A', 11, AF9)>;
59				bias-pull-up;
60			};
61
62			/* CAN_TX */
63
64			can1_tx_pa12: can1_tx_pa12 {
65				pinmux = <STM32_PINMUX('A', 12, AF9)>;
66			};
67
68			/* DAC_OUT */
69
70			dac1_out1_pa4: dac1_out1_pa4 {
71				pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
72			};
73
74			dac1_out2_pa5: dac1_out2_pa5 {
75				pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
76			};
77
78			/* I2C_SCL */
79
80			i2c1_scl_pa9: i2c1_scl_pa9 {
81				pinmux = <STM32_PINMUX('A', 9, AF4)>;
82				bias-pull-up;
83				drive-open-drain;
84			};
85
86			i2c1_scl_pb6: i2c1_scl_pb6 {
87				pinmux = <STM32_PINMUX('B', 6, AF4)>;
88				bias-pull-up;
89				drive-open-drain;
90			};
91
92			i2c3_scl_pa7: i2c3_scl_pa7 {
93				pinmux = <STM32_PINMUX('A', 7, AF4)>;
94				bias-pull-up;
95				drive-open-drain;
96			};
97
98			/* I2C_SDA */
99
100			i2c1_sda_pa10: i2c1_sda_pa10 {
101				pinmux = <STM32_PINMUX('A', 10, AF4)>;
102				bias-pull-up;
103				drive-open-drain;
104			};
105
106			i2c1_sda_pb7: i2c1_sda_pb7 {
107				pinmux = <STM32_PINMUX('B', 7, AF4)>;
108				bias-pull-up;
109				drive-open-drain;
110			};
111
112			i2c3_sda_pb4: i2c3_sda_pb4 {
113				pinmux = <STM32_PINMUX('B', 4, AF4)>;
114				bias-pull-up;
115				drive-open-drain;
116			};
117
118			/* QUADSPI */
119
120			quadspi_bk1_ncs_pa2: quadspi_bk1_ncs_pa2 {
121				pinmux = <STM32_PINMUX('A', 2, AF10)>;
122				slew-rate = "very-high-speed";
123			};
124
125			quadspi_clk_pa3: quadspi_clk_pa3 {
126				pinmux = <STM32_PINMUX('A', 3, AF10)>;
127				slew-rate = "very-high-speed";
128			};
129
130			quadspi_bk1_io3_pa6: quadspi_bk1_io3_pa6 {
131				pinmux = <STM32_PINMUX('A', 6, AF10)>;
132				slew-rate = "very-high-speed";
133			};
134
135			quadspi_bk1_io2_pa7: quadspi_bk1_io2_pa7 {
136				pinmux = <STM32_PINMUX('A', 7, AF10)>;
137				slew-rate = "very-high-speed";
138			};
139
140			quadspi_bk1_io1_pb0: quadspi_bk1_io1_pb0 {
141				pinmux = <STM32_PINMUX('B', 0, AF10)>;
142				slew-rate = "very-high-speed";
143			};
144
145			quadspi_bk1_io0_pb1: quadspi_bk1_io0_pb1 {
146				pinmux = <STM32_PINMUX('B', 1, AF10)>;
147				slew-rate = "very-high-speed";
148			};
149
150			/* SPI_MISO */
151
152			spi1_miso_pa6: spi1_miso_pa6 {
153				pinmux = <STM32_PINMUX('A', 6, AF5)>;
154				bias-pull-down;
155			};
156
157			spi1_miso_pa11: spi1_miso_pa11 {
158				pinmux = <STM32_PINMUX('A', 11, AF5)>;
159				bias-pull-down;
160			};
161
162			spi1_miso_pb4: spi1_miso_pb4 {
163				pinmux = <STM32_PINMUX('B', 4, AF5)>;
164				bias-pull-down;
165			};
166
167			spi3_miso_pb4: spi3_miso_pb4 {
168				pinmux = <STM32_PINMUX('B', 4, AF6)>;
169				bias-pull-down;
170			};
171
172			/* SPI_MOSI */
173
174			spi1_mosi_pa7: spi1_mosi_pa7 {
175				pinmux = <STM32_PINMUX('A', 7, AF5)>;
176				bias-pull-down;
177			};
178
179			spi1_mosi_pa12: spi1_mosi_pa12 {
180				pinmux = <STM32_PINMUX('A', 12, AF5)>;
181				bias-pull-down;
182			};
183
184			spi1_mosi_pb5: spi1_mosi_pb5 {
185				pinmux = <STM32_PINMUX('B', 5, AF5)>;
186				bias-pull-down;
187			};
188
189			spi3_mosi_pb5: spi3_mosi_pb5 {
190				pinmux = <STM32_PINMUX('B', 5, AF6)>;
191				bias-pull-down;
192			};
193
194			/* SPI_NSS */
195
196			spi1_nss_pa4: spi1_nss_pa4 {
197				pinmux = <STM32_PINMUX('A', 4, AF5)>;
198				bias-pull-up;
199			};
200
201			spi1_nss_pa15: spi1_nss_pa15 {
202				pinmux = <STM32_PINMUX('A', 15, AF5)>;
203				bias-pull-up;
204			};
205
206			spi1_nss_pb0: spi1_nss_pb0 {
207				pinmux = <STM32_PINMUX('B', 0, AF5)>;
208				bias-pull-up;
209			};
210
211			spi3_nss_pa4: spi3_nss_pa4 {
212				pinmux = <STM32_PINMUX('A', 4, AF6)>;
213				bias-pull-up;
214			};
215
216			spi3_nss_pa15: spi3_nss_pa15 {
217				pinmux = <STM32_PINMUX('A', 15, AF6)>;
218				bias-pull-up;
219			};
220
221			/* SPI_SCK */
222
223			spi1_sck_pa1: spi1_sck_pa1 {
224				pinmux = <STM32_PINMUX('A', 1, AF5)>;
225				bias-pull-down;
226				slew-rate = "very-high-speed";
227			};
228
229			spi1_sck_pa5: spi1_sck_pa5 {
230				pinmux = <STM32_PINMUX('A', 5, AF5)>;
231				bias-pull-down;
232				slew-rate = "very-high-speed";
233			};
234
235			spi1_sck_pb3: spi1_sck_pb3 {
236				pinmux = <STM32_PINMUX('B', 3, AF5)>;
237				bias-pull-down;
238				slew-rate = "very-high-speed";
239			};
240
241			spi3_sck_pb3: spi3_sck_pb3 {
242				pinmux = <STM32_PINMUX('B', 3, AF6)>;
243				bias-pull-down;
244				slew-rate = "very-high-speed";
245			};
246
247			/* TIM_CH / TIM_CHN */
248
249			tim1_ch1n_pa7: tim1_ch1n_pa7 {
250				pinmux = <STM32_PINMUX('A', 7, AF1)>;
251			};
252
253			tim1_ch1_pa8: tim1_ch1_pa8 {
254				pinmux = <STM32_PINMUX('A', 8, AF1)>;
255			};
256
257			tim1_ch2_pa9: tim1_ch2_pa9 {
258				pinmux = <STM32_PINMUX('A', 9, AF1)>;
259			};
260
261			tim1_ch3_pa10: tim1_ch3_pa10 {
262				pinmux = <STM32_PINMUX('A', 10, AF1)>;
263			};
264
265			tim1_ch4_pa11: tim1_ch4_pa11 {
266				pinmux = <STM32_PINMUX('A', 11, AF1)>;
267			};
268
269			tim1_ch2n_pb0: tim1_ch2n_pb0 {
270				pinmux = <STM32_PINMUX('B', 0, AF1)>;
271			};
272
273			tim1_ch3n_pb1: tim1_ch3n_pb1 {
274				pinmux = <STM32_PINMUX('B', 1, AF1)>;
275			};
276
277			tim2_ch1_pa0: tim2_ch1_pa0 {
278				pinmux = <STM32_PINMUX('A', 0, AF1)>;
279			};
280
281			tim2_ch2_pa1: tim2_ch2_pa1 {
282				pinmux = <STM32_PINMUX('A', 1, AF1)>;
283			};
284
285			tim2_ch3_pa2: tim2_ch3_pa2 {
286				pinmux = <STM32_PINMUX('A', 2, AF1)>;
287			};
288
289			tim2_ch4_pa3: tim2_ch4_pa3 {
290				pinmux = <STM32_PINMUX('A', 3, AF1)>;
291			};
292
293			tim2_ch1_pa5: tim2_ch1_pa5 {
294				pinmux = <STM32_PINMUX('A', 5, AF1)>;
295			};
296
297			tim2_ch1_pa15: tim2_ch1_pa15 {
298				pinmux = <STM32_PINMUX('A', 15, AF1)>;
299			};
300
301			tim2_ch2_pb3: tim2_ch2_pb3 {
302				pinmux = <STM32_PINMUX('B', 3, AF1)>;
303			};
304
305			tim15_ch1n_pa1: tim15_ch1n_pa1 {
306				pinmux = <STM32_PINMUX('A', 1, AF14)>;
307			};
308
309			tim15_ch1_pa2: tim15_ch1_pa2 {
310				pinmux = <STM32_PINMUX('A', 2, AF14)>;
311			};
312
313			tim15_ch2_pa3: tim15_ch2_pa3 {
314				pinmux = <STM32_PINMUX('A', 3, AF14)>;
315			};
316
317			tim16_ch1_pa6: tim16_ch1_pa6 {
318				pinmux = <STM32_PINMUX('A', 6, AF14)>;
319			};
320
321			tim16_ch1n_pb6: tim16_ch1n_pb6 {
322				pinmux = <STM32_PINMUX('B', 6, AF14)>;
323			};
324
325			/* UART_CTS / USART_CTS / LPUART_CTS */
326
327			lpuart1_cts_pa6: lpuart1_cts_pa6 {
328				pinmux = <STM32_PINMUX('A', 6, AF8)>;
329				bias-pull-up;
330				drive-open-drain;
331			};
332
333			usart1_cts_pa11: usart1_cts_pa11 {
334				pinmux = <STM32_PINMUX('A', 11, AF7)>;
335				bias-pull-up;
336				drive-open-drain;
337			};
338
339			usart1_cts_pb4: usart1_cts_pb4 {
340				pinmux = <STM32_PINMUX('B', 4, AF7)>;
341				bias-pull-up;
342				drive-open-drain;
343			};
344
345			usart2_cts_pa0: usart2_cts_pa0 {
346				pinmux = <STM32_PINMUX('A', 0, AF7)>;
347				bias-pull-up;
348				drive-open-drain;
349			};
350
351			/* UART_RTS / USART_RTS / LPUART_RTS */
352
353			usart1_rts_pa12: usart1_rts_pa12 {
354				pinmux = <STM32_PINMUX('A', 12, AF7)>;
355				bias-pull-up;
356				drive-open-drain;
357			};
358
359			lpuart1_rts_pb1: lpuart1_rts_pb1 {
360				pinmux = <STM32_PINMUX('B', 1, AF8)>;
361				bias-pull-up;
362				drive-open-drain;
363			};
364
365			usart1_rts_pb3: usart1_rts_pb3 {
366				pinmux = <STM32_PINMUX('B', 3, AF7)>;
367				bias-pull-up;
368				drive-open-drain;
369			};
370
371			usart2_rts_pa1: usart2_rts_pa1 {
372				pinmux = <STM32_PINMUX('A', 1, AF7)>;
373				bias-pull-up;
374				drive-open-drain;
375			};
376
377			/* UART_RX / USART_RX / LPUART_RX */
378
379			lpuart1_rx_pa3: lpuart1_rx_pa3 {
380				pinmux = <STM32_PINMUX('A', 3, AF8)>;
381			};
382
383			usart1_rx_pa10: usart1_rx_pa10 {
384				pinmux = <STM32_PINMUX('A', 10, AF7)>;
385			};
386
387			usart1_rx_pb7: usart1_rx_pb7 {
388				pinmux = <STM32_PINMUX('B', 7, AF7)>;
389			};
390
391			usart2_rx_pa3: usart2_rx_pa3 {
392				pinmux = <STM32_PINMUX('A', 3, AF7)>;
393			};
394
395			usart2_rx_pa15: usart2_rx_pa15 {
396				pinmux = <STM32_PINMUX('A', 15, AF3)>;
397			};
398
399			/* UART_TX / USART_TX / LPUART_TX */
400
401			lpuart1_tx_pa2: lpuart1_tx_pa2 {
402				pinmux = <STM32_PINMUX('A', 2, AF8)>;
403				bias-pull-up;
404			};
405
406			usart1_tx_pa9: usart1_tx_pa9 {
407				pinmux = <STM32_PINMUX('A', 9, AF7)>;
408				bias-pull-up;
409			};
410
411			usart1_tx_pb6: usart1_tx_pb6 {
412				pinmux = <STM32_PINMUX('B', 6, AF7)>;
413				bias-pull-up;
414			};
415
416			usart2_tx_pa2: usart2_tx_pa2 {
417				pinmux = <STM32_PINMUX('A', 2, AF7)>;
418				bias-pull-up;
419			};
420
421			/* USB */
422
423			usb_dm_pa11: usb_dm_pa11 {
424				pinmux = <STM32_PINMUX('A', 11, AF10)>;
425			};
426
427			usb_dp_pa12: usb_dp_pa12 {
428				pinmux = <STM32_PINMUX('A', 12, AF10)>;
429			};
430
431			usb_noe_pa13: usb_noe_pa13 {
432				pinmux = <STM32_PINMUX('A', 13, AF10)>;
433			};
434
435		};
436	};
437};