1/*
2 * NOTE: Autogenerated file using genpinctrl.py
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <dt-bindings/pinctrl/stm32-pinctrl.h>
8
9/ {
10	soc {
11		pinctrl: pin-controller@48000000 {
12
13			/* ADC_IN / ADC_INN / ADC_INP */
14
15			adc1_in5_pa0: adc1_in5_pa0 {
16				pinmux = <STM32_PINMUX('A', 0, ANALOG)>;
17			};
18
19			adc1_in6_pa1: adc1_in6_pa1 {
20				pinmux = <STM32_PINMUX('A', 1, ANALOG)>;
21			};
22
23			adc1_in7_pa2: adc1_in7_pa2 {
24				pinmux = <STM32_PINMUX('A', 2, ANALOG)>;
25			};
26
27			adc1_in8_pa3: adc1_in8_pa3 {
28				pinmux = <STM32_PINMUX('A', 3, ANALOG)>;
29			};
30
31			adc1_in9_pa4: adc1_in9_pa4 {
32				pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
33			};
34
35			adc1_in10_pa5: adc1_in10_pa5 {
36				pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
37			};
38
39			adc1_in11_pa6: adc1_in11_pa6 {
40				pinmux = <STM32_PINMUX('A', 6, ANALOG)>;
41			};
42
43			adc1_in12_pa7: adc1_in12_pa7 {
44				pinmux = <STM32_PINMUX('A', 7, ANALOG)>;
45			};
46
47			adc1_in15_pb0: adc1_in15_pb0 {
48				pinmux = <STM32_PINMUX('B', 0, ANALOG)>;
49			};
50
51			adc1_in16_pb1: adc1_in16_pb1 {
52				pinmux = <STM32_PINMUX('B', 1, ANALOG)>;
53			};
54
55			/* CAN_RX */
56
57			can1_rx_pa11: can1_rx_pa11 {
58				pinmux = <STM32_PINMUX('A', 11, AF9)>;
59				bias-pull-up;
60			};
61
62			can1_rx_pb8: can1_rx_pb8 {
63				pinmux = <STM32_PINMUX('B', 8, AF9)>;
64				bias-pull-up;
65			};
66
67			/* CAN_TX */
68
69			can1_tx_pa12: can1_tx_pa12 {
70				pinmux = <STM32_PINMUX('A', 12, AF9)>;
71			};
72
73			can1_tx_pb9: can1_tx_pb9 {
74				pinmux = <STM32_PINMUX('B', 9, AF9)>;
75			};
76
77			/* DAC_OUT */
78
79			dac1_out1_pa4: dac1_out1_pa4 {
80				pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
81			};
82
83			dac1_out2_pa5: dac1_out2_pa5 {
84				pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
85			};
86
87			/* I2C_SCL */
88
89			i2c1_scl_pa9: i2c1_scl_pa9 {
90				pinmux = <STM32_PINMUX('A', 9, AF4)>;
91				bias-pull-up;
92				drive-open-drain;
93			};
94
95			i2c1_scl_pb6: i2c1_scl_pb6 {
96				pinmux = <STM32_PINMUX('B', 6, AF4)>;
97				bias-pull-up;
98				drive-open-drain;
99			};
100
101			i2c1_scl_pb8: i2c1_scl_pb8 {
102				pinmux = <STM32_PINMUX('B', 8, AF4)>;
103				bias-pull-up;
104				drive-open-drain;
105			};
106
107			i2c2_scl_pb10: i2c2_scl_pb10 {
108				pinmux = <STM32_PINMUX('B', 10, AF4)>;
109				bias-pull-up;
110				drive-open-drain;
111			};
112
113			i2c2_scl_pb13: i2c2_scl_pb13 {
114				pinmux = <STM32_PINMUX('B', 13, AF4)>;
115				bias-pull-up;
116				drive-open-drain;
117			};
118
119			i2c3_scl_pa7: i2c3_scl_pa7 {
120				pinmux = <STM32_PINMUX('A', 7, AF4)>;
121				bias-pull-up;
122				drive-open-drain;
123			};
124
125			/* I2C_SDA */
126
127			i2c1_sda_pa10: i2c1_sda_pa10 {
128				pinmux = <STM32_PINMUX('A', 10, AF4)>;
129				bias-pull-up;
130				drive-open-drain;
131			};
132
133			i2c1_sda_pb7: i2c1_sda_pb7 {
134				pinmux = <STM32_PINMUX('B', 7, AF4)>;
135				bias-pull-up;
136				drive-open-drain;
137			};
138
139			i2c1_sda_pb9: i2c1_sda_pb9 {
140				pinmux = <STM32_PINMUX('B', 9, AF4)>;
141				bias-pull-up;
142				drive-open-drain;
143			};
144
145			i2c2_sda_pb11: i2c2_sda_pb11 {
146				pinmux = <STM32_PINMUX('B', 11, AF4)>;
147				bias-pull-up;
148				drive-open-drain;
149			};
150
151			i2c2_sda_pb14: i2c2_sda_pb14 {
152				pinmux = <STM32_PINMUX('B', 14, AF4)>;
153				bias-pull-up;
154				drive-open-drain;
155			};
156
157			i2c3_sda_pb4: i2c3_sda_pb4 {
158				pinmux = <STM32_PINMUX('B', 4, AF4)>;
159				bias-pull-up;
160				drive-open-drain;
161			};
162
163			/* QUADSPI */
164
165			quadspi_bk1_ncs_pa2: quadspi_bk1_ncs_pa2 {
166				pinmux = <STM32_PINMUX('A', 2, AF10)>;
167				slew-rate = "very-high-speed";
168			};
169
170			quadspi_clk_pa3: quadspi_clk_pa3 {
171				pinmux = <STM32_PINMUX('A', 3, AF10)>;
172				slew-rate = "very-high-speed";
173			};
174
175			quadspi_bk1_io3_pa6: quadspi_bk1_io3_pa6 {
176				pinmux = <STM32_PINMUX('A', 6, AF10)>;
177				slew-rate = "very-high-speed";
178			};
179
180			quadspi_bk1_io2_pa7: quadspi_bk1_io2_pa7 {
181				pinmux = <STM32_PINMUX('A', 7, AF10)>;
182				slew-rate = "very-high-speed";
183			};
184
185			quadspi_bk1_io1_pb0: quadspi_bk1_io1_pb0 {
186				pinmux = <STM32_PINMUX('B', 0, AF10)>;
187				slew-rate = "very-high-speed";
188			};
189
190			quadspi_bk1_io0_pb1: quadspi_bk1_io0_pb1 {
191				pinmux = <STM32_PINMUX('B', 1, AF10)>;
192				slew-rate = "very-high-speed";
193			};
194
195			quadspi_clk_pb10: quadspi_clk_pb10 {
196				pinmux = <STM32_PINMUX('B', 10, AF10)>;
197				slew-rate = "very-high-speed";
198			};
199
200			quadspi_bk1_ncs_pb11: quadspi_bk1_ncs_pb11 {
201				pinmux = <STM32_PINMUX('B', 11, AF10)>;
202				slew-rate = "very-high-speed";
203			};
204
205			/* SPI_MISO */
206
207			spi1_miso_pa6: spi1_miso_pa6 {
208				pinmux = <STM32_PINMUX('A', 6, AF5)>;
209				bias-pull-down;
210			};
211
212			spi1_miso_pa11: spi1_miso_pa11 {
213				pinmux = <STM32_PINMUX('A', 11, AF5)>;
214				bias-pull-down;
215			};
216
217			spi1_miso_pb4: spi1_miso_pb4 {
218				pinmux = <STM32_PINMUX('B', 4, AF5)>;
219				bias-pull-down;
220			};
221
222			spi2_miso_pb14: spi2_miso_pb14 {
223				pinmux = <STM32_PINMUX('B', 14, AF5)>;
224				bias-pull-down;
225			};
226
227			spi3_miso_pb4: spi3_miso_pb4 {
228				pinmux = <STM32_PINMUX('B', 4, AF6)>;
229				bias-pull-down;
230			};
231
232			/* SPI_MOSI */
233
234			spi1_mosi_pa7: spi1_mosi_pa7 {
235				pinmux = <STM32_PINMUX('A', 7, AF5)>;
236				bias-pull-down;
237			};
238
239			spi1_mosi_pa12: spi1_mosi_pa12 {
240				pinmux = <STM32_PINMUX('A', 12, AF5)>;
241				bias-pull-down;
242			};
243
244			spi1_mosi_pb5: spi1_mosi_pb5 {
245				pinmux = <STM32_PINMUX('B', 5, AF5)>;
246				bias-pull-down;
247			};
248
249			spi2_mosi_pb15: spi2_mosi_pb15 {
250				pinmux = <STM32_PINMUX('B', 15, AF5)>;
251				bias-pull-down;
252			};
253
254			spi3_mosi_pb5: spi3_mosi_pb5 {
255				pinmux = <STM32_PINMUX('B', 5, AF6)>;
256				bias-pull-down;
257			};
258
259			/* SPI_NSS */
260
261			spi1_nss_pa4: spi1_nss_pa4 {
262				pinmux = <STM32_PINMUX('A', 4, AF5)>;
263				bias-pull-up;
264			};
265
266			spi1_nss_pa15: spi1_nss_pa15 {
267				pinmux = <STM32_PINMUX('A', 15, AF5)>;
268				bias-pull-up;
269			};
270
271			spi1_nss_pb0: spi1_nss_pb0 {
272				pinmux = <STM32_PINMUX('B', 0, AF5)>;
273				bias-pull-up;
274			};
275
276			spi2_nss_pb9: spi2_nss_pb9 {
277				pinmux = <STM32_PINMUX('B', 9, AF5)>;
278				bias-pull-up;
279			};
280
281			spi2_nss_pb12: spi2_nss_pb12 {
282				pinmux = <STM32_PINMUX('B', 12, AF5)>;
283				bias-pull-up;
284			};
285
286			spi3_nss_pa4: spi3_nss_pa4 {
287				pinmux = <STM32_PINMUX('A', 4, AF6)>;
288				bias-pull-up;
289			};
290
291			spi3_nss_pa15: spi3_nss_pa15 {
292				pinmux = <STM32_PINMUX('A', 15, AF6)>;
293				bias-pull-up;
294			};
295
296			/* SPI_SCK */
297
298			spi1_sck_pa1: spi1_sck_pa1 {
299				pinmux = <STM32_PINMUX('A', 1, AF5)>;
300				bias-pull-down;
301				slew-rate = "very-high-speed";
302			};
303
304			spi1_sck_pa5: spi1_sck_pa5 {
305				pinmux = <STM32_PINMUX('A', 5, AF5)>;
306				bias-pull-down;
307				slew-rate = "very-high-speed";
308			};
309
310			spi1_sck_pb3: spi1_sck_pb3 {
311				pinmux = <STM32_PINMUX('B', 3, AF5)>;
312				bias-pull-down;
313				slew-rate = "very-high-speed";
314			};
315
316			spi2_sck_pb10: spi2_sck_pb10 {
317				pinmux = <STM32_PINMUX('B', 10, AF5)>;
318				bias-pull-down;
319				slew-rate = "very-high-speed";
320			};
321
322			spi2_sck_pb13: spi2_sck_pb13 {
323				pinmux = <STM32_PINMUX('B', 13, AF5)>;
324				bias-pull-down;
325				slew-rate = "very-high-speed";
326			};
327
328			spi3_sck_pb3: spi3_sck_pb3 {
329				pinmux = <STM32_PINMUX('B', 3, AF6)>;
330				bias-pull-down;
331				slew-rate = "very-high-speed";
332			};
333
334			/* TIM_CH / TIM_CHN */
335
336			tim1_ch1n_pa7: tim1_ch1n_pa7 {
337				pinmux = <STM32_PINMUX('A', 7, AF1)>;
338			};
339
340			tim1_ch1_pa8: tim1_ch1_pa8 {
341				pinmux = <STM32_PINMUX('A', 8, AF1)>;
342			};
343
344			tim1_ch2_pa9: tim1_ch2_pa9 {
345				pinmux = <STM32_PINMUX('A', 9, AF1)>;
346			};
347
348			tim1_ch3_pa10: tim1_ch3_pa10 {
349				pinmux = <STM32_PINMUX('A', 10, AF1)>;
350			};
351
352			tim1_ch4_pa11: tim1_ch4_pa11 {
353				pinmux = <STM32_PINMUX('A', 11, AF1)>;
354			};
355
356			tim1_ch2n_pb0: tim1_ch2n_pb0 {
357				pinmux = <STM32_PINMUX('B', 0, AF1)>;
358			};
359
360			tim1_ch3n_pb1: tim1_ch3n_pb1 {
361				pinmux = <STM32_PINMUX('B', 1, AF1)>;
362			};
363
364			tim1_ch1n_pb13: tim1_ch1n_pb13 {
365				pinmux = <STM32_PINMUX('B', 13, AF1)>;
366			};
367
368			tim1_ch2n_pb14: tim1_ch2n_pb14 {
369				pinmux = <STM32_PINMUX('B', 14, AF1)>;
370			};
371
372			tim1_ch3n_pb15: tim1_ch3n_pb15 {
373				pinmux = <STM32_PINMUX('B', 15, AF1)>;
374			};
375
376			tim2_ch1_pa0: tim2_ch1_pa0 {
377				pinmux = <STM32_PINMUX('A', 0, AF1)>;
378			};
379
380			tim2_ch2_pa1: tim2_ch2_pa1 {
381				pinmux = <STM32_PINMUX('A', 1, AF1)>;
382			};
383
384			tim2_ch3_pa2: tim2_ch3_pa2 {
385				pinmux = <STM32_PINMUX('A', 2, AF1)>;
386			};
387
388			tim2_ch4_pa3: tim2_ch4_pa3 {
389				pinmux = <STM32_PINMUX('A', 3, AF1)>;
390			};
391
392			tim2_ch1_pa5: tim2_ch1_pa5 {
393				pinmux = <STM32_PINMUX('A', 5, AF1)>;
394			};
395
396			tim2_ch1_pa15: tim2_ch1_pa15 {
397				pinmux = <STM32_PINMUX('A', 15, AF1)>;
398			};
399
400			tim2_ch2_pb3: tim2_ch2_pb3 {
401				pinmux = <STM32_PINMUX('B', 3, AF1)>;
402			};
403
404			tim2_ch3_pb10: tim2_ch3_pb10 {
405				pinmux = <STM32_PINMUX('B', 10, AF1)>;
406			};
407
408			tim2_ch4_pb11: tim2_ch4_pb11 {
409				pinmux = <STM32_PINMUX('B', 11, AF1)>;
410			};
411
412			tim15_ch1n_pa1: tim15_ch1n_pa1 {
413				pinmux = <STM32_PINMUX('A', 1, AF14)>;
414			};
415
416			tim15_ch1_pa2: tim15_ch1_pa2 {
417				pinmux = <STM32_PINMUX('A', 2, AF14)>;
418			};
419
420			tim15_ch2_pa3: tim15_ch2_pa3 {
421				pinmux = <STM32_PINMUX('A', 3, AF14)>;
422			};
423
424			tim15_ch1n_pb13: tim15_ch1n_pb13 {
425				pinmux = <STM32_PINMUX('B', 13, AF14)>;
426			};
427
428			tim15_ch1_pb14: tim15_ch1_pb14 {
429				pinmux = <STM32_PINMUX('B', 14, AF14)>;
430			};
431
432			tim15_ch2_pb15: tim15_ch2_pb15 {
433				pinmux = <STM32_PINMUX('B', 15, AF14)>;
434			};
435
436			tim16_ch1_pa6: tim16_ch1_pa6 {
437				pinmux = <STM32_PINMUX('A', 6, AF14)>;
438			};
439
440			tim16_ch1n_pb6: tim16_ch1n_pb6 {
441				pinmux = <STM32_PINMUX('B', 6, AF14)>;
442			};
443
444			tim16_ch1_pb8: tim16_ch1_pb8 {
445				pinmux = <STM32_PINMUX('B', 8, AF14)>;
446			};
447
448			/* UART_CTS / USART_CTS / LPUART_CTS */
449
450			lpuart1_cts_pa6: lpuart1_cts_pa6 {
451				pinmux = <STM32_PINMUX('A', 6, AF8)>;
452				bias-pull-up;
453				drive-open-drain;
454			};
455
456			usart1_cts_pa11: usart1_cts_pa11 {
457				pinmux = <STM32_PINMUX('A', 11, AF7)>;
458				bias-pull-up;
459				drive-open-drain;
460			};
461
462			usart1_cts_pb4: usart1_cts_pb4 {
463				pinmux = <STM32_PINMUX('B', 4, AF7)>;
464				bias-pull-up;
465				drive-open-drain;
466			};
467
468			lpuart1_cts_pb13: lpuart1_cts_pb13 {
469				pinmux = <STM32_PINMUX('B', 13, AF8)>;
470				bias-pull-up;
471				drive-open-drain;
472			};
473
474			usart2_cts_pa0: usart2_cts_pa0 {
475				pinmux = <STM32_PINMUX('A', 0, AF7)>;
476				bias-pull-up;
477				drive-open-drain;
478			};
479
480			usart3_cts_pa6: usart3_cts_pa6 {
481				pinmux = <STM32_PINMUX('A', 6, AF7)>;
482				bias-pull-up;
483				drive-open-drain;
484			};
485
486			usart3_cts_pb13: usart3_cts_pb13 {
487				pinmux = <STM32_PINMUX('B', 13, AF7)>;
488				bias-pull-up;
489				drive-open-drain;
490			};
491
492			/* UART_RTS / USART_RTS / LPUART_RTS */
493
494			usart1_rts_pa12: usart1_rts_pa12 {
495				pinmux = <STM32_PINMUX('A', 12, AF7)>;
496				bias-pull-up;
497				drive-open-drain;
498			};
499
500			lpuart1_rts_pb1: lpuart1_rts_pb1 {
501				pinmux = <STM32_PINMUX('B', 1, AF8)>;
502				bias-pull-up;
503				drive-open-drain;
504			};
505
506			usart1_rts_pb3: usart1_rts_pb3 {
507				pinmux = <STM32_PINMUX('B', 3, AF7)>;
508				bias-pull-up;
509				drive-open-drain;
510			};
511
512			lpuart1_rts_pb12: lpuart1_rts_pb12 {
513				pinmux = <STM32_PINMUX('B', 12, AF8)>;
514				bias-pull-up;
515				drive-open-drain;
516			};
517
518			usart2_rts_pa1: usart2_rts_pa1 {
519				pinmux = <STM32_PINMUX('A', 1, AF7)>;
520				bias-pull-up;
521				drive-open-drain;
522			};
523
524			usart3_rts_pa15: usart3_rts_pa15 {
525				pinmux = <STM32_PINMUX('A', 15, AF7)>;
526				bias-pull-up;
527				drive-open-drain;
528			};
529
530			usart3_rts_pb1: usart3_rts_pb1 {
531				pinmux = <STM32_PINMUX('B', 1, AF7)>;
532				bias-pull-up;
533				drive-open-drain;
534			};
535
536			usart3_rts_pb14: usart3_rts_pb14 {
537				pinmux = <STM32_PINMUX('B', 14, AF7)>;
538				bias-pull-up;
539				drive-open-drain;
540			};
541
542			/* UART_RX / USART_RX / LPUART_RX */
543
544			lpuart1_rx_pa3: lpuart1_rx_pa3 {
545				pinmux = <STM32_PINMUX('A', 3, AF8)>;
546			};
547
548			usart1_rx_pa10: usart1_rx_pa10 {
549				pinmux = <STM32_PINMUX('A', 10, AF7)>;
550			};
551
552			usart1_rx_pb7: usart1_rx_pb7 {
553				pinmux = <STM32_PINMUX('B', 7, AF7)>;
554			};
555
556			lpuart1_rx_pb10: lpuart1_rx_pb10 {
557				pinmux = <STM32_PINMUX('B', 10, AF8)>;
558			};
559
560			usart2_rx_pa3: usart2_rx_pa3 {
561				pinmux = <STM32_PINMUX('A', 3, AF7)>;
562			};
563
564			usart2_rx_pa15: usart2_rx_pa15 {
565				pinmux = <STM32_PINMUX('A', 15, AF3)>;
566			};
567
568			usart3_rx_pb11: usart3_rx_pb11 {
569				pinmux = <STM32_PINMUX('B', 11, AF7)>;
570			};
571
572			/* UART_TX / USART_TX / LPUART_TX */
573
574			lpuart1_tx_pa2: lpuart1_tx_pa2 {
575				pinmux = <STM32_PINMUX('A', 2, AF8)>;
576				bias-pull-up;
577			};
578
579			usart1_tx_pa9: usart1_tx_pa9 {
580				pinmux = <STM32_PINMUX('A', 9, AF7)>;
581				bias-pull-up;
582			};
583
584			usart1_tx_pb6: usart1_tx_pb6 {
585				pinmux = <STM32_PINMUX('B', 6, AF7)>;
586				bias-pull-up;
587			};
588
589			lpuart1_tx_pb11: lpuart1_tx_pb11 {
590				pinmux = <STM32_PINMUX('B', 11, AF8)>;
591				bias-pull-up;
592			};
593
594			usart2_tx_pa2: usart2_tx_pa2 {
595				pinmux = <STM32_PINMUX('A', 2, AF7)>;
596				bias-pull-up;
597			};
598
599			usart3_tx_pb10: usart3_tx_pb10 {
600				pinmux = <STM32_PINMUX('B', 10, AF7)>;
601				bias-pull-up;
602			};
603
604		};
605	};
606};