1/* 2 * NOTE: Autogenerated file using genpinctrl.py 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <dt-bindings/pinctrl/stm32-pinctrl.h> 8 9/ { 10 soc { 11 pinctrl: pin-controller@48000000 { 12 13 /* ADC_IN / ADC_INN / ADC_INP */ 14 15 adc1_in5_pa0: adc1_in5_pa0 { 16 pinmux = <STM32_PINMUX('A', 0, ANALOG)>; 17 }; 18 19 adc1_in6_pa1: adc1_in6_pa1 { 20 pinmux = <STM32_PINMUX('A', 1, ANALOG)>; 21 }; 22 23 adc1_in7_pa2: adc1_in7_pa2 { 24 pinmux = <STM32_PINMUX('A', 2, ANALOG)>; 25 }; 26 27 adc1_in8_pa3: adc1_in8_pa3 { 28 pinmux = <STM32_PINMUX('A', 3, ANALOG)>; 29 }; 30 31 adc1_in9_pa4: adc1_in9_pa4 { 32 pinmux = <STM32_PINMUX('A', 4, ANALOG)>; 33 }; 34 35 adc1_in10_pa5: adc1_in10_pa5 { 36 pinmux = <STM32_PINMUX('A', 5, ANALOG)>; 37 }; 38 39 adc1_in11_pa6: adc1_in11_pa6 { 40 pinmux = <STM32_PINMUX('A', 6, ANALOG)>; 41 }; 42 43 adc1_in12_pa7: adc1_in12_pa7 { 44 pinmux = <STM32_PINMUX('A', 7, ANALOG)>; 45 }; 46 47 adc1_in15_pb0: adc1_in15_pb0 { 48 pinmux = <STM32_PINMUX('B', 0, ANALOG)>; 49 }; 50 51 adc1_in16_pb1: adc1_in16_pb1 { 52 pinmux = <STM32_PINMUX('B', 1, ANALOG)>; 53 }; 54 55 adc2_in7_pa2: adc2_in7_pa2 { 56 pinmux = <STM32_PINMUX('A', 2, ANALOG)>; 57 }; 58 59 adc2_in8_pa3: adc2_in8_pa3 { 60 pinmux = <STM32_PINMUX('A', 3, ANALOG)>; 61 }; 62 63 adc2_in9_pa4: adc2_in9_pa4 { 64 pinmux = <STM32_PINMUX('A', 4, ANALOG)>; 65 }; 66 67 adc2_in10_pa5: adc2_in10_pa5 { 68 pinmux = <STM32_PINMUX('A', 5, ANALOG)>; 69 }; 70 71 adc2_in11_pa6: adc2_in11_pa6 { 72 pinmux = <STM32_PINMUX('A', 6, ANALOG)>; 73 }; 74 75 adc2_in12_pa7: adc2_in12_pa7 { 76 pinmux = <STM32_PINMUX('A', 7, ANALOG)>; 77 }; 78 79 adc2_in15_pb0: adc2_in15_pb0 { 80 pinmux = <STM32_PINMUX('B', 0, ANALOG)>; 81 }; 82 83 adc2_in16_pb1: adc2_in16_pb1 { 84 pinmux = <STM32_PINMUX('B', 1, ANALOG)>; 85 }; 86 87 /* I2C_SCL */ 88 89 i2c1_scl_pa9: i2c1_scl_pa9 { 90 pinmux = <STM32_PINMUX('A', 9, AF4)>; 91 bias-pull-up; 92 drive-open-drain; 93 }; 94 95 i2c1_scl_pb6: i2c1_scl_pb6 { 96 pinmux = <STM32_PINMUX('B', 6, AF4)>; 97 bias-pull-up; 98 drive-open-drain; 99 }; 100 101 i2c1_scl_pb8: i2c1_scl_pb8 { 102 pinmux = <STM32_PINMUX('B', 8, AF4)>; 103 bias-pull-up; 104 drive-open-drain; 105 }; 106 107 i2c3_scl_pa7: i2c3_scl_pa7 { 108 pinmux = <STM32_PINMUX('A', 7, AF4)>; 109 bias-pull-up; 110 drive-open-drain; 111 }; 112 113 /* I2C_SDA */ 114 115 i2c1_sda_pa10: i2c1_sda_pa10 { 116 pinmux = <STM32_PINMUX('A', 10, AF4)>; 117 bias-pull-up; 118 drive-open-drain; 119 }; 120 121 i2c1_sda_pb7: i2c1_sda_pb7 { 122 pinmux = <STM32_PINMUX('B', 7, AF4)>; 123 bias-pull-up; 124 drive-open-drain; 125 }; 126 127 i2c3_sda_pb4: i2c3_sda_pb4 { 128 pinmux = <STM32_PINMUX('B', 4, AF4)>; 129 bias-pull-up; 130 drive-open-drain; 131 }; 132 133 /* QUADSPI */ 134 135 quadspi_bk1_ncs_pa2: quadspi_bk1_ncs_pa2 { 136 pinmux = <STM32_PINMUX('A', 2, AF10)>; 137 slew-rate = "very-high-speed"; 138 }; 139 140 quadspi_clk_pa3: quadspi_clk_pa3 { 141 pinmux = <STM32_PINMUX('A', 3, AF10)>; 142 slew-rate = "very-high-speed"; 143 }; 144 145 quadspi_bk1_io3_pa6: quadspi_bk1_io3_pa6 { 146 pinmux = <STM32_PINMUX('A', 6, AF10)>; 147 slew-rate = "very-high-speed"; 148 }; 149 150 quadspi_bk1_io2_pa7: quadspi_bk1_io2_pa7 { 151 pinmux = <STM32_PINMUX('A', 7, AF10)>; 152 slew-rate = "very-high-speed"; 153 }; 154 155 quadspi_bk1_io1_pb0: quadspi_bk1_io1_pb0 { 156 pinmux = <STM32_PINMUX('B', 0, AF10)>; 157 slew-rate = "very-high-speed"; 158 }; 159 160 quadspi_bk1_io0_pb1: quadspi_bk1_io0_pb1 { 161 pinmux = <STM32_PINMUX('B', 1, AF10)>; 162 slew-rate = "very-high-speed"; 163 }; 164 165 quadspi_clk_pb10: quadspi_clk_pb10 { 166 pinmux = <STM32_PINMUX('B', 10, AF10)>; 167 slew-rate = "very-high-speed"; 168 }; 169 170 /* SPI_MISO */ 171 172 spi1_miso_pa6: spi1_miso_pa6 { 173 pinmux = <STM32_PINMUX('A', 6, AF5)>; 174 bias-pull-down; 175 }; 176 177 spi1_miso_pa11: spi1_miso_pa11 { 178 pinmux = <STM32_PINMUX('A', 11, AF5)>; 179 bias-pull-down; 180 }; 181 182 spi1_miso_pb4: spi1_miso_pb4 { 183 pinmux = <STM32_PINMUX('B', 4, AF5)>; 184 bias-pull-down; 185 }; 186 187 /* SPI_MOSI */ 188 189 spi1_mosi_pa7: spi1_mosi_pa7 { 190 pinmux = <STM32_PINMUX('A', 7, AF5)>; 191 bias-pull-down; 192 }; 193 194 spi1_mosi_pa12: spi1_mosi_pa12 { 195 pinmux = <STM32_PINMUX('A', 12, AF5)>; 196 bias-pull-down; 197 }; 198 199 spi1_mosi_pb5: spi1_mosi_pb5 { 200 pinmux = <STM32_PINMUX('B', 5, AF5)>; 201 bias-pull-down; 202 }; 203 204 /* SPI_NSS */ 205 206 spi1_nss_pa4: spi1_nss_pa4 { 207 pinmux = <STM32_PINMUX('A', 4, AF5)>; 208 bias-pull-up; 209 }; 210 211 spi1_nss_pa15: spi1_nss_pa15 { 212 pinmux = <STM32_PINMUX('A', 15, AF5)>; 213 bias-pull-up; 214 }; 215 216 spi1_nss_pb0: spi1_nss_pb0 { 217 pinmux = <STM32_PINMUX('B', 0, AF5)>; 218 bias-pull-up; 219 }; 220 221 /* SPI_SCK */ 222 223 spi1_sck_pa1: spi1_sck_pa1 { 224 pinmux = <STM32_PINMUX('A', 1, AF5)>; 225 bias-pull-down; 226 slew-rate = "very-high-speed"; 227 }; 228 229 spi1_sck_pa5: spi1_sck_pa5 { 230 pinmux = <STM32_PINMUX('A', 5, AF5)>; 231 bias-pull-down; 232 slew-rate = "very-high-speed"; 233 }; 234 235 spi1_sck_pb3: spi1_sck_pb3 { 236 pinmux = <STM32_PINMUX('B', 3, AF5)>; 237 bias-pull-down; 238 slew-rate = "very-high-speed"; 239 }; 240 241 /* TIM_CH / TIM_CHN */ 242 243 tim1_ch1n_pa7: tim1_ch1n_pa7 { 244 pinmux = <STM32_PINMUX('A', 7, AF1)>; 245 }; 246 247 tim1_ch1_pa8: tim1_ch1_pa8 { 248 pinmux = <STM32_PINMUX('A', 8, AF1)>; 249 }; 250 251 tim1_ch2_pa9: tim1_ch2_pa9 { 252 pinmux = <STM32_PINMUX('A', 9, AF1)>; 253 }; 254 255 tim1_ch3_pa10: tim1_ch3_pa10 { 256 pinmux = <STM32_PINMUX('A', 10, AF1)>; 257 }; 258 259 tim1_ch4_pa11: tim1_ch4_pa11 { 260 pinmux = <STM32_PINMUX('A', 11, AF1)>; 261 }; 262 263 tim1_ch2n_pb0: tim1_ch2n_pb0 { 264 pinmux = <STM32_PINMUX('B', 0, AF1)>; 265 }; 266 267 tim1_ch3n_pb1: tim1_ch3n_pb1 { 268 pinmux = <STM32_PINMUX('B', 1, AF1)>; 269 }; 270 271 tim2_ch1_pa0: tim2_ch1_pa0 { 272 pinmux = <STM32_PINMUX('A', 0, AF1)>; 273 }; 274 275 tim2_ch2_pa1: tim2_ch2_pa1 { 276 pinmux = <STM32_PINMUX('A', 1, AF1)>; 277 }; 278 279 tim2_ch3_pa2: tim2_ch3_pa2 { 280 pinmux = <STM32_PINMUX('A', 2, AF1)>; 281 }; 282 283 tim2_ch4_pa3: tim2_ch4_pa3 { 284 pinmux = <STM32_PINMUX('A', 3, AF1)>; 285 }; 286 287 tim2_ch1_pa5: tim2_ch1_pa5 { 288 pinmux = <STM32_PINMUX('A', 5, AF1)>; 289 }; 290 291 tim2_ch1_pa15: tim2_ch1_pa15 { 292 pinmux = <STM32_PINMUX('A', 15, AF1)>; 293 }; 294 295 tim2_ch2_pb3: tim2_ch2_pb3 { 296 pinmux = <STM32_PINMUX('B', 3, AF1)>; 297 }; 298 299 tim2_ch3_pb10: tim2_ch3_pb10 { 300 pinmux = <STM32_PINMUX('B', 10, AF1)>; 301 }; 302 303 tim15_ch1n_pa1: tim15_ch1n_pa1 { 304 pinmux = <STM32_PINMUX('A', 1, AF14)>; 305 }; 306 307 tim15_ch1_pa2: tim15_ch1_pa2 { 308 pinmux = <STM32_PINMUX('A', 2, AF14)>; 309 }; 310 311 tim15_ch2_pa3: tim15_ch2_pa3 { 312 pinmux = <STM32_PINMUX('A', 3, AF14)>; 313 }; 314 315 tim16_ch1_pa6: tim16_ch1_pa6 { 316 pinmux = <STM32_PINMUX('A', 6, AF14)>; 317 }; 318 319 tim16_ch1n_pb6: tim16_ch1n_pb6 { 320 pinmux = <STM32_PINMUX('B', 6, AF14)>; 321 }; 322 323 tim16_ch1_pb8: tim16_ch1_pb8 { 324 pinmux = <STM32_PINMUX('B', 8, AF14)>; 325 }; 326 327 /* UART_CTS / USART_CTS / LPUART_CTS */ 328 329 lpuart1_cts_pa6: lpuart1_cts_pa6 { 330 pinmux = <STM32_PINMUX('A', 6, AF8)>; 331 bias-pull-up; 332 drive-open-drain; 333 }; 334 335 usart1_cts_pa11: usart1_cts_pa11 { 336 pinmux = <STM32_PINMUX('A', 11, AF7)>; 337 bias-pull-up; 338 drive-open-drain; 339 }; 340 341 usart1_cts_pb4: usart1_cts_pb4 { 342 pinmux = <STM32_PINMUX('B', 4, AF7)>; 343 bias-pull-up; 344 drive-open-drain; 345 }; 346 347 usart2_cts_pa0: usart2_cts_pa0 { 348 pinmux = <STM32_PINMUX('A', 0, AF7)>; 349 bias-pull-up; 350 drive-open-drain; 351 }; 352 353 /* UART_RTS / USART_RTS / LPUART_RTS */ 354 355 usart1_rts_pa12: usart1_rts_pa12 { 356 pinmux = <STM32_PINMUX('A', 12, AF7)>; 357 bias-pull-up; 358 drive-open-drain; 359 }; 360 361 lpuart1_rts_pb1: lpuart1_rts_pb1 { 362 pinmux = <STM32_PINMUX('B', 1, AF8)>; 363 bias-pull-up; 364 drive-open-drain; 365 }; 366 367 usart1_rts_pb3: usart1_rts_pb3 { 368 pinmux = <STM32_PINMUX('B', 3, AF7)>; 369 bias-pull-up; 370 drive-open-drain; 371 }; 372 373 usart2_rts_pa1: usart2_rts_pa1 { 374 pinmux = <STM32_PINMUX('A', 1, AF7)>; 375 bias-pull-up; 376 drive-open-drain; 377 }; 378 379 /* UART_RX / USART_RX / LPUART_RX */ 380 381 lpuart1_rx_pa3: lpuart1_rx_pa3 { 382 pinmux = <STM32_PINMUX('A', 3, AF8)>; 383 }; 384 385 usart1_rx_pa10: usart1_rx_pa10 { 386 pinmux = <STM32_PINMUX('A', 10, AF7)>; 387 }; 388 389 usart1_rx_pb7: usart1_rx_pb7 { 390 pinmux = <STM32_PINMUX('B', 7, AF7)>; 391 }; 392 393 lpuart1_rx_pb10: lpuart1_rx_pb10 { 394 pinmux = <STM32_PINMUX('B', 10, AF8)>; 395 }; 396 397 usart2_rx_pa3: usart2_rx_pa3 { 398 pinmux = <STM32_PINMUX('A', 3, AF7)>; 399 }; 400 401 usart2_rx_pa15: usart2_rx_pa15 { 402 pinmux = <STM32_PINMUX('A', 15, AF3)>; 403 }; 404 405 /* UART_TX / USART_TX / LPUART_TX */ 406 407 lpuart1_tx_pa2: lpuart1_tx_pa2 { 408 pinmux = <STM32_PINMUX('A', 2, AF8)>; 409 bias-pull-up; 410 }; 411 412 usart1_tx_pa9: usart1_tx_pa9 { 413 pinmux = <STM32_PINMUX('A', 9, AF7)>; 414 bias-pull-up; 415 }; 416 417 usart1_tx_pb6: usart1_tx_pb6 { 418 pinmux = <STM32_PINMUX('B', 6, AF7)>; 419 bias-pull-up; 420 }; 421 422 usart2_tx_pa2: usart2_tx_pa2 { 423 pinmux = <STM32_PINMUX('A', 2, AF7)>; 424 bias-pull-up; 425 }; 426 427 /* USB */ 428 429 usb_dm_pa11: usb_dm_pa11 { 430 pinmux = <STM32_PINMUX('A', 11, AF10)>; 431 }; 432 433 usb_dp_pa12: usb_dp_pa12 { 434 pinmux = <STM32_PINMUX('A', 12, AF10)>; 435 }; 436 437 usb_noe_pa13: usb_noe_pa13 { 438 pinmux = <STM32_PINMUX('A', 13, AF10)>; 439 }; 440 441 }; 442 }; 443};