1 /***************************************************************************//** 2 * @file 3 * @brief Auxiliary header for the RAIL library. Includes consistent definitions 4 * of features available across different chips. 5 ******************************************************************************* 6 * # License 7 * <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b> 8 ******************************************************************************* 9 * 10 * SPDX-License-Identifier: Zlib 11 * 12 * The licensor of this software is Silicon Laboratories Inc. 13 * 14 * This software is provided 'as-is', without any express or implied 15 * warranty. In no event will the authors be held liable for any damages 16 * arising from the use of this software. 17 * 18 * Permission is granted to anyone to use this software for any purpose, 19 * including commercial applications, and to alter it and redistribute it 20 * freely, subject to the following restrictions: 21 * 22 * 1. The origin of this software must not be misrepresented; you must not 23 * claim that you wrote the original software. If you use this software 24 * in a product, an acknowledgment in the product documentation would be 25 * appreciated but is not required. 26 * 2. Altered source versions must be plainly marked as such, and must not be 27 * misrepresented as being the original software. 28 * 3. This notice may not be removed or altered from any source distribution. 29 * 30 ******************************************************************************/ 31 32 #ifndef __RAIL_FEATURES_H__ 33 #define __RAIL_FEATURES_H__ 34 35 #include "em_device.h" 36 37 #ifdef __cplusplus 38 extern "C" { 39 #endif 40 41 /** 42 * @addtogroup RAIL_API 43 * @{ 44 */ 45 46 /****************************************************************************** 47 * RAIL Features 48 *****************************************************************************/ 49 /** 50 * @addtogroup Features 51 * @brief Overview of support for various features across hardware platforms. 52 * These defines can be used at compile time to determine which 53 * features are available on your platform. However, keep in mind that 54 * these defines hold true for chip families. Your specific part 55 * may have further restrictions (band limitations, power amplifier 56 * restrictions, and so on) on top of those listed below, for which 57 * runtime RAIL_*Supports*() APIs can be used to check availability 58 * on a particular chip (after \ref RAIL_Init() has been called). 59 * In general, an attempt to call an API that is not supported on your 60 * chip family as listed below will result in a 61 * \ref RAIL_STATUS_INVALID_CALL. 62 * @{ 63 */ 64 65 /// Boolean to indicate whether the selected chip supports both Sub-GHz and 2.4 GHz bands. 66 /// See also runtime refinement \ref RAIL_SupportsDualBand(). 67 #if ((_SILICON_LABS_EFR32_RADIO_TYPE == _SILICON_LABS_EFR32_RADIO_DUALBAND) \ 68 || ((FEAT_RF_2G4 == 1) && (FEAT_RF_SUBG == 1))) 69 #define RAIL_SUPPORTS_DUAL_BAND 1 70 #else 71 #define RAIL_SUPPORTS_DUAL_BAND 0 72 #endif 73 /// Backwards-compatible synonym of \ref RAIL_SUPPORTS_DUAL_BAND. 74 #define RAIL_FEAT_DUAL_BAND_RADIO RAIL_SUPPORTS_DUAL_BAND 75 76 /// Boolean to indicate whether the selected chip supports the 2.4 GHz band. 77 /// See also runtime refinement \ref RAIL_Supports2p4GHzBand(). 78 #if (((_SILICON_LABS_EFR32_RADIO_TYPE == _SILICON_LABS_EFR32_RADIO_DUALBAND) \ 79 || (_SILICON_LABS_EFR32_RADIO_TYPE == _SILICON_LABS_EFR32_RADIO_2G4HZ)) \ 80 || (FEAT_RF_2G4 == 1)) 81 #define RAIL_SUPPORTS_2P4GHZ_BAND 1 82 #else 83 #define RAIL_SUPPORTS_2P4GHZ_BAND 0 84 #endif 85 /// Backwards-compatible synonym of \ref RAIL_SUPPORTS_2P4GHZ_BAND. 86 #define RAIL_FEAT_2G4_RADIO RAIL_SUPPORTS_2P4GHZ_BAND 87 88 /// Boolean to indicate whether the selected chip supports Sub-GHz bands. 89 /// See also runtime refinement \ref RAIL_SupportsSubGHzBand(). 90 #if (((_SILICON_LABS_EFR32_RADIO_TYPE == _SILICON_LABS_EFR32_RADIO_DUALBAND) \ 91 || (_SILICON_LABS_EFR32_RADIO_TYPE == _SILICON_LABS_EFR32_RADIO_SUBGHZ)) \ 92 || (FEAT_RF_SUBG == 1)) 93 #define RAIL_SUPPORTS_SUBGHZ_BAND 1 94 #else 95 #define RAIL_SUPPORTS_SUBGHZ_BAND 0 96 #endif 97 /// Backwards-compatible synonym of \ref RAIL_SUPPORTS_SUBGHZ_BAND. 98 #define RAIL_FEAT_SUBGIG_RADIO RAIL_SUPPORTS_SUBGHZ_BAND 99 100 /// Boolean to indicate whether the selected chip supports OFDM PA. 101 /// See also runtime refinement \ref RAIL_SupportsOFDMPA(). 102 #if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5) 103 #define RAIL_SUPPORTS_OFDM_PA 1 104 #else 105 #define RAIL_SUPPORTS_OFDM_PA 0 106 #endif 107 108 /// Boolean to indicate whether the selected chip supports 109 /// bit masked address filtering. 110 /// See also runtime refinement \ref RAIL_SupportsAddrFilterAddressBitMask(). 111 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG >= 2) \ 112 || (_SILICON_LABS_32B_SERIES_3_CONFIG == 301) \ 113 || (_SILICON_LABS_32B_SERIES_3_CONFIG == 300)) 114 #define RAIL_SUPPORTS_ADDR_FILTER_ADDRESS_BIT_MASK 1 115 #else 116 #define RAIL_SUPPORTS_ADDR_FILTER_ADDRESS_BIT_MASK 0 117 #endif 118 119 /// Boolean to indicate whether the selected chip supports 120 /// address filter mask information for incoming packets in 121 /// \ref RAIL_RxPacketInfo_t::filterMask and 122 /// \ref RAIL_IEEE802154_Address_t::filterMask. 123 /// See also runtime refinement \ref RAIL_SupportsAddrFilterMask(). 124 #if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1) 125 #define RAIL_SUPPORTS_ADDR_FILTER_MASK 1 126 #else 127 #define RAIL_SUPPORTS_ADDR_FILTER_MASK 0 128 #endif 129 130 /// Boolean to indicate whether the selected chip supports 131 /// alternate power settings for the Power Amplifier. 132 /// See also runtime refinement \ref RAIL_SupportsAlternateTxPower(). 133 #if ((_SILICON_LABS_32B_SERIES_1_CONFIG > 1) \ 134 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \ 135 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)) 136 #define RAIL_SUPPORTS_ALTERNATE_TX_POWER 1 137 #else 138 #define RAIL_SUPPORTS_ALTERNATE_TX_POWER 0 139 #endif 140 /// Backwards-compatible synonym of \ref RAIL_SUPPORTS_ALTERNATE_TX_POWER. 141 #define RAIL_FEAT_ALTERNATE_POWER_TX_SUPPORTED RAIL_SUPPORTS_ALTERNATE_TX_POWER 142 143 /// Boolean to indicate whether the selected chip supports antenna diversity. 144 /// See also runtime refinement \ref RAIL_SupportsAntennaDiversity(). 145 #if ((_SILICON_LABS_32B_SERIES_1_CONFIG >= 2) \ 146 || (_SILICON_LABS_32B_SERIES == 2)) 147 #define RAIL_SUPPORTS_ANTENNA_DIVERSITY 1 148 #else 149 #define RAIL_SUPPORTS_ANTENNA_DIVERSITY 0 150 #endif 151 152 /// Backwards-compatible synonym of \ref RAIL_SUPPORTS_ANTENNA_DIVERSITY. 153 #define RAIL_FEAT_ANTENNA_DIVERSITY RAIL_SUPPORTS_ANTENNA_DIVERSITY 154 155 /// Boolean to indicate whether the selected chip supports internal RF path diversity. 156 /// See also runtime refinement \ref RAIL_SupportsPathDiversity(). 157 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \ 158 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)) 159 #define RAIL_SUPPORTS_PATH_DIVERSITY 1 160 #else 161 #define RAIL_SUPPORTS_PATH_DIVERSITY 0 162 #endif 163 164 /// Boolean to indicate whether the selected chip supports channel hopping. 165 /// See also runtime refinement \ref RAIL_SupportsChannelHopping(). 166 #if ((_SILICON_LABS_32B_SERIES_1_CONFIG >= 2) \ 167 || (_SILICON_LABS_32B_SERIES_2_CONFIG >= 1) \ 168 || (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300)) 169 #define RAIL_SUPPORTS_CHANNEL_HOPPING 1 170 #else 171 #define RAIL_SUPPORTS_CHANNEL_HOPPING 0 172 #endif 173 /// Backwards-compatible synonym of \ref RAIL_SUPPORTS_CHANNEL_HOPPING. 174 #define RAIL_FEAT_CHANNEL_HOPPING RAIL_SUPPORTS_CHANNEL_HOPPING 175 176 /// Boolean to indicate whether the selected chip supports dual sync words. 177 /// See also runtime refinement \ref RAIL_SupportsDualSyncWords(). 178 #if 1 179 #define RAIL_SUPPORTS_DUAL_SYNC_WORDS 1 180 #else 181 #define RAIL_SUPPORTS_DUAL_SYNC_WORDS 0 182 #endif 183 184 /// Boolean to indicate whether the selected chip supports automatic transitions 185 /// from TX to TX. 186 /// See also runtime refinement \ref RAIL_SupportsTxToTx(). 187 #if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1) 188 #define RAIL_SUPPORTS_TX_TO_TX 1 189 #else 190 #define RAIL_SUPPORTS_TX_TO_TX 0 191 #endif 192 193 /// Boolean to indicate whether the selected chip supports \ref RAIL_TX_REPEAT_OPTION_START_TO_START. 194 /// See also runtime refinement \ref RAIL_SupportsTxRepeatStartToStart(). 195 #if (_SILICON_LABS_32B_SERIES_2_CONFIG >= 2) 196 #define RAIL_SUPPORTS_TX_REPEAT_START_TO_START RAIL_SUPPORTS_TX_TO_TX 197 #else 198 #define RAIL_SUPPORTS_TX_REPEAT_START_TO_START 0 199 #endif 200 201 /// Boolean to indicate whether the selected chip supports thermistor measurements. 202 /// See also runtime refinement \ref RAIL_SupportsExternalThermistor(). 203 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \ 204 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \ 205 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 5) \ 206 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \ 207 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 8) \ 208 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 9)) 209 #define RAIL_SUPPORTS_EXTERNAL_THERMISTOR 1 210 #else 211 #define RAIL_SUPPORTS_EXTERNAL_THERMISTOR 0 212 #endif 213 /// Backwards-compatible synonym of \ref RAIL_SUPPORTS_EXTERNAL_THERMISTOR. 214 #define RAIL_FEAT_EXTERNAL_THERMISTOR RAIL_SUPPORTS_EXTERNAL_THERMISTOR 215 216 /// Boolean to indicate whether the selected chip supports HFXO compensation. 217 /// See also runtime refinement \ref RAIL_SupportsHFXOCompensation(). 218 #if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5) 219 #define RAIL_SUPPORTS_HFXO_COMPENSATION RAIL_SUPPORTS_EXTERNAL_THERMISTOR 220 #else 221 #define RAIL_SUPPORTS_HFXO_COMPENSATION 0 222 #endif 223 224 /// Boolean to indicate whether the selected chip supports AUXADC measurements. 225 /// See also runtime refinement \ref RAIL_SupportsAuxAdc(). 226 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \ 227 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \ 228 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 5) \ 229 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \ 230 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 8) \ 231 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 9)) 232 #define RAIL_SUPPORTS_AUXADC 1 233 #else 234 #define RAIL_SUPPORTS_AUXADC 0 235 #endif 236 237 /// Boolean to indicate whether the selected chip supports a high-precision 238 /// LFRCO. 239 /// Best to use the runtime refinement \ref RAIL_SupportsPrecisionLFRCO() 240 /// because some chip revisions do not support it. 241 #if ((_SILICON_LABS_32B_SERIES_1_CONFIG == 3) \ 242 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \ 243 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \ 244 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 9)) 245 #define RAIL_SUPPORTS_PRECISION_LFRCO 1 246 #else 247 #define RAIL_SUPPORTS_PRECISION_LFRCO 0 248 #endif 249 250 /// Boolean to indicate whether the selected chip supports radio entropy. 251 /// See also runtime refinement \ref RAIL_SupportsRadioEntropy(). 252 #ifndef FPGA 253 #define RAIL_SUPPORTS_RADIO_ENTROPY 1 254 #else 255 #define RAIL_SUPPORTS_RADIO_ENTROPY 0 256 #endif 257 258 /// Boolean to indicate whether the selected chip supports 259 /// RFSENSE Energy Detection Mode. 260 /// See also runtime refinement \ref RAIL_SupportsRfSenseEnergyDetection(). 261 #if ((_SILICON_LABS_32B_SERIES == 1) \ 262 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \ 263 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \ 264 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 9)) 265 #define RAIL_SUPPORTS_RFSENSE_ENERGY_DETECTION 1 266 #else 267 #define RAIL_SUPPORTS_RFSENSE_ENERGY_DETECTION 0 268 #endif 269 270 /// Boolean to indicate whether the selected chip supports 271 /// RFSENSE Selective(OOK) Mode. 272 /// See also runtime refinement \ref RAIL_SupportsRfSenseSelectiveOok(). 273 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \ 274 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \ 275 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 9)) 276 #define RAIL_SUPPORTS_RFSENSE_SELECTIVE_OOK 1 277 #else 278 #define RAIL_SUPPORTS_RFSENSE_SELECTIVE_OOK 0 279 #endif 280 /// Backwards-compatible synonym of \ref RAIL_SUPPORTS_RFSENSE_SELECTIVE_OOK. 281 #define RAIL_FEAT_RFSENSE_SELECTIVE_OOK_MODE_SUPPORTED \ 282 RAIL_SUPPORTS_RFSENSE_SELECTIVE_OOK 283 284 /// Boolean to indicate whether the selected chip supports the 285 /// VDET voltage measurement feature. 286 /// See also runtime refinement \ref RAIL_SupportsVdet(). 287 #if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5) 288 #define RAIL_SUPPORTS_VDET 1 289 #else 290 #define RAIL_SUPPORTS_VDET 0 291 #endif 292 293 #ifndef DOXYGEN_SHOULD_SKIP_THIS 294 /// Boolean to indicate whether the selected chip supports the User Sequencer 295 /// See also runtime refinement \ref RAIL_SupportsUserSequencer(). 296 #if (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300) 297 #define RAIL_SUPPORTS_USER_SEQUENCER 1 298 #else 299 #define RAIL_SUPPORTS_USER_SEQUENCER 0 300 #endif 301 #endif //DOXYGEN_SHOULD_SKIP_THIS 302 303 // BLE features 304 // Some features may not be available on all platforms 305 // due to radio hardware limitations. 306 307 /// Boolean to indicate whether the selected chip supports BLE. 308 /// See also runtime refinement \ref RAIL_SupportsProtocolBLE(). 309 #if (_SILICON_LABS_32B_SERIES_1_CONFIG != 4) 310 #define RAIL_SUPPORTS_PROTOCOL_BLE RAIL_SUPPORTS_2P4GHZ_BAND 311 #else 312 #define RAIL_SUPPORTS_PROTOCOL_BLE 0 313 #endif 314 315 /// Boolean to indicate whether the selected chip supports BLE 1 Mbps 316 /// Non-Viterbi PHY. 317 /// See also runtime refinement \ref RAIL_BLE_Supports1MbpsNonViterbi(). 318 #if (_SILICON_LABS_32B_SERIES_1_CONFIG >= 1) 319 #define RAIL_BLE_SUPPORTS_1MBPS_NON_VITERBI RAIL_SUPPORTS_PROTOCOL_BLE 320 #else 321 #define RAIL_BLE_SUPPORTS_1MBPS_NON_VITERBI 0 322 #endif 323 324 /// Boolean to indicate whether the selected chip supports BLE 1 Mbps Viterbi 325 /// PHY. 326 /// See also runtime refinement \ref RAIL_BLE_Supports1MbpsViterbi(). 327 #if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1) 328 #define RAIL_BLE_SUPPORTS_1MBPS_VITERBI RAIL_SUPPORTS_PROTOCOL_BLE 329 #else 330 #define RAIL_BLE_SUPPORTS_1MBPS_VITERBI 0 331 #endif 332 333 /// Boolean to indicate whether the selected chip supports BLE 1 Mbps operation. 334 /// See also runtime refinement \ref RAIL_BLE_Supports1Mbps(). 335 #define RAIL_BLE_SUPPORTS_1MBPS \ 336 (RAIL_BLE_SUPPORTS_1MBPS_NON_VITERBI || RAIL_BLE_SUPPORTS_1MBPS_VITERBI) 337 338 /// Boolean to indicate whether the selected chip supports BLE 2 Mbps 339 /// Non-Viterbi PHY. 340 /// See also runtime refinement \ref RAIL_BLE_Supports2MbpsNonViterbi(). 341 #if (_SILICON_LABS_32B_SERIES_1_CONFIG >= 2) 342 #define RAIL_BLE_SUPPORTS_2MBPS_NON_VITERBI RAIL_SUPPORTS_PROTOCOL_BLE 343 #else 344 #define RAIL_BLE_SUPPORTS_2MBPS_NON_VITERBI 0 345 #endif 346 347 /// Boolean to indicate whether the selected chip supports BLE 2 Mbps Viterbi 348 /// PHY. 349 /// See also runtime refinement \ref RAIL_BLE_Supports2MbpsViterbi(). 350 #if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1) 351 #define RAIL_BLE_SUPPORTS_2MBPS_VITERBI RAIL_SUPPORTS_PROTOCOL_BLE 352 #else 353 #define RAIL_BLE_SUPPORTS_2MBPS_VITERBI 0 354 #endif 355 356 /// Boolean to indicate whether the selected chip supports BLE 2 Mbps operation. 357 /// See also runtime refinement \ref RAIL_BLE_Supports2Mbps(). 358 #define RAIL_BLE_SUPPORTS_2MBPS \ 359 (RAIL_BLE_SUPPORTS_2MBPS_NON_VITERBI || RAIL_BLE_SUPPORTS_2MBPS_VITERBI) 360 361 /// Boolean to indicate whether the selected chip supports BLE 362 /// Antenna Switching needed for Angle-of-Arrival receives or 363 /// Angle-of-Departure transmits. 364 /// See also runtime refinement \ref RAIL_BLE_SupportsAntennaSwitching(). 365 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \ 366 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \ 367 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \ 368 || (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300)) 369 #define RAIL_BLE_SUPPORTS_ANTENNA_SWITCHING RAIL_SUPPORTS_PROTOCOL_BLE 370 #else 371 #define RAIL_BLE_SUPPORTS_ANTENNA_SWITCHING 0 372 #endif 373 374 /// Boolean to indicate whether the selected chip supports the BLE Coded PHY 375 /// used for Long-Range. 376 /// See also runtime refinement \ref RAIL_BLE_SupportsCodedPhy(). 377 #if ((_SILICON_LABS_32B_SERIES_1_CONFIG == 3) \ 378 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 1) \ 379 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \ 380 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \ 381 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \ 382 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \ 383 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 9) \ 384 || (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300)) 385 #define RAIL_BLE_SUPPORTS_CODED_PHY RAIL_SUPPORTS_PROTOCOL_BLE 386 #else 387 #define RAIL_BLE_SUPPORTS_CODED_PHY 0 388 #endif 389 /// Backwards-compatible synonym of \ref RAIL_BLE_SUPPORTS_CODED_PHY. 390 #define RAIL_FEAT_BLE_CODED RAIL_BLE_SUPPORTS_CODED_PHY 391 392 /// Boolean to indicate whether the selected chip supports the BLE Simulscan PHY 393 /// used for simultaneous BLE 1 Mbps and Coded PHY reception. 394 /// See also runtime refinement \ref RAIL_BLE_SupportsSimulscanPhy(). 395 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \ 396 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \ 397 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \ 398 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \ 399 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 9) \ 400 || (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300)) 401 #define RAIL_BLE_SUPPORTS_SIMULSCAN_PHY RAIL_SUPPORTS_PROTOCOL_BLE 402 #else 403 #define RAIL_BLE_SUPPORTS_SIMULSCAN_PHY 0 404 #endif 405 406 /// Boolean to indicate whether the selected chip supports BLE 407 /// CTE (Constant Tone Extension) needed for Angle-of-Arrival/Departure 408 /// transmits. 409 /// See also runtime refinement \ref RAIL_BLE_SupportsCte(). 410 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \ 411 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \ 412 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \ 413 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \ 414 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 9) \ 415 || (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300)) 416 #define RAIL_BLE_SUPPORTS_CTE RAIL_SUPPORTS_PROTOCOL_BLE 417 #else 418 #define RAIL_BLE_SUPPORTS_CTE 0 419 #endif 420 421 /// Boolean to indicate whether the selected chip supports the 422 /// Quuppa PHY. 423 /// See also runtime refinement \ref RAIL_BLE_SupportsQuuppa(). 424 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \ 425 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \ 426 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 9)) 427 #define RAIL_BLE_SUPPORTS_QUUPPA RAIL_SUPPORTS_PROTOCOL_BLE 428 #else 429 #define RAIL_BLE_SUPPORTS_QUUPPA 0 430 #endif 431 432 /// Boolean to indicate whether the selected chip supports BLE 433 /// IQ Sampling needed for Angle-of-Arrival/Departure receives. 434 /// See also runtime refinement \ref RAIL_BLE_SupportsIQSampling(). 435 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \ 436 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \ 437 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \ 438 || (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300)) 439 #define RAIL_BLE_SUPPORTS_IQ_SAMPLING RAIL_SUPPORTS_PROTOCOL_BLE 440 #else 441 #define RAIL_BLE_SUPPORTS_IQ_SAMPLING 0 442 #endif 443 444 /// Boolean to indicate whether the selected chip supports some BLE AOX 445 /// features. 446 #define RAIL_BLE_SUPPORTS_AOX \ 447 (RAIL_BLE_SUPPORTS_ANTENNA_SWITCHING \ 448 || RAIL_BLE_SUPPORTS_IQ_SAMPLING \ 449 || RAIL_BLE_SUPPORTS_CTE) 450 451 /// Backwards-compatible synonym of \ref RAIL_BLE_SUPPORTS_AOX 452 #define RAIL_FEAT_BLE_AOX_SUPPORTED RAIL_BLE_SUPPORTS_AOX 453 454 #ifndef DOXYGEN_SHOULD_SKIP_THIS 455 /// Boolean to indicate whether the selected chip supports BLE 456 /// CS (Channel Sounding). 457 #if (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) 458 #define RAIL_BLE_SUPPORTS_CS RAIL_SUPPORTS_PROTOCOL_BLE 459 #else 460 #define RAIL_BLE_SUPPORTS_CS 0 461 #endif 462 #endif//DOXYGEN_SHOULD_SKIP_THIS 463 464 /// Boolean to indicate whether the selected chip supports BLE PHY switch to RX 465 /// functionality, which is used to switch BLE PHYs at a specific time 466 /// to receive auxiliary packets. 467 /// See also runtime refinement \ref RAIL_BLE_SupportsPhySwitchToRx(). 468 #if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1) 469 #define RAIL_BLE_SUPPORTS_PHY_SWITCH_TO_RX RAIL_SUPPORTS_PROTOCOL_BLE 470 #else 471 #define RAIL_BLE_SUPPORTS_PHY_SWITCH_TO_RX 0 472 #endif 473 /// Backwards-compatible synonym of \ref RAIL_BLE_SUPPORTS_PHY_SWITCH_TO_RX. 474 #define RAIL_FEAT_BLE_PHY_SWITCH_TO_RX RAIL_BLE_SUPPORTS_PHY_SWITCH_TO_RX 475 476 // IEEE 802.15.4 features 477 // Some features may not be available on all platforms 478 // due to radio hardware limitations. 479 480 /// Boolean to indicate whether the selected chip supports IEEE 802.15.4. 481 /// See also runtime refinement \ref RAIL_SupportsProtocolIEEE802154(). 482 #if 1 483 #define RAIL_SUPPORTS_PROTOCOL_IEEE802154 1 484 #else 485 #define RAIL_SUPPORTS_PROTOCOL_IEEE802154 0 486 #endif 487 488 /// Boolean to indicate whether the selected chip supports the 489 /// 802.15.4 Wi-Fi Coexistence PHY. 490 /// See also runtime refinement \ref RAIL_IEEE802154_SupportsCoexPhy(). 491 #if (_SILICON_LABS_32B_SERIES_1_CONFIG > 1) 492 #define RAIL_IEEE802154_SUPPORTS_COEX_PHY (RAIL_SUPPORTS_PROTOCOL_IEEE802154 && RAIL_SUPPORTS_2P4GHZ_BAND) 493 #else 494 #define RAIL_IEEE802154_SUPPORTS_COEX_PHY 0 495 #endif 496 /// Backwards-compatible synonym of \ref RAIL_IEEE802154_SUPPORTS_COEX_PHY. 497 #define RAIL_FEAT_802154_COEX_PHY RAIL_IEEE802154_SUPPORTS_COEX_PHY 498 499 /// Boolean to indicate whether the selected chip supports 500 /// the IEEE 802.15.4 2.4 GHz band variant. 501 /// See also runtime refinement \ref RAIL_SupportsIEEE802154Band2P4(). 502 #if (_SILICON_LABS_32B_SERIES_2_CONFIG != 3) 503 #define RAIL_SUPPORTS_IEEE802154_BAND_2P4 (RAIL_SUPPORTS_PROTOCOL_IEEE802154 && RAIL_SUPPORTS_2P4GHZ_BAND) 504 #else 505 #define RAIL_SUPPORTS_IEEE802154_BAND_2P4 0 506 #endif 507 508 /// Boolean to indicate whether the selected chip supports 509 /// the IEEE 802.15.4 2.4 RX channel switching. 510 /// See also runtime refinement \ref RAIL_IEEE802154_SupportsRxChannelSwitching(). 511 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 1) \ 512 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \ 513 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 6)) 514 #define RAIL_IEEE802154_SUPPORTS_RX_CHANNEL_SWITCHING (RAIL_SUPPORTS_IEEE802154_BAND_2P4) 515 #else 516 #define RAIL_IEEE802154_SUPPORTS_RX_CHANNEL_SWITCHING 0 517 #endif 518 519 /// Boolean to indicate whether the selected chip supports a front end module. 520 /// See also runtime refinement \ref RAIL_IEEE802154_SupportsFemPhy(). 521 #if (_SILICON_LABS_32B_SERIES_2_CONFIG != 8) 522 #define RAIL_IEEE802154_SUPPORTS_FEM_PHY (RAIL_SUPPORTS_IEEE802154_BAND_2P4) 523 #else 524 #define RAIL_IEEE802154_SUPPORTS_FEM_PHY 0 525 #endif 526 527 /// Boolean to indicate whether the selected chip supports 528 /// IEEE 802.15.4E-2012 feature subset needed for Zigbee R22 GB868. 529 /// See also runtime refinement \ref 530 /// RAIL_IEEE802154_SupportsESubsetGB868(). 531 #if 1 532 #define RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868 RAIL_SUPPORTS_PROTOCOL_IEEE802154 533 #else 534 #define RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868 0 535 #endif 536 /// Backwards-compatible synonym of \ref 537 /// RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868. 538 #define RAIL_FEAT_IEEE802154_E_GB868_SUPPORTED \ 539 RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868 540 541 /// Boolean to indicate whether the selected chip supports 542 /// IEEE 802.15.4E-2012 Enhanced ACKing. 543 /// See also runtime refinement \ref 544 /// RAIL_IEEE802154_SupportsEEnhancedAck(). 545 #if 1 546 #define RAIL_IEEE802154_SUPPORTS_E_ENHANCED_ACK RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868 547 #else 548 #define RAIL_IEEE802154_SUPPORTS_E_ENHANCED_ACK 0 549 #endif 550 /// Backwards-compatible synonym of \ref 551 /// RAIL_IEEE802154_SUPPORTS_E_ENHANCED_ACK. 552 #define RAIL_FEAT_IEEE802154_E_ENH_ACK_SUPPORTED \ 553 RAIL_IEEE802154_SUPPORTS_E_ENHANCED_ACK 554 555 /// Boolean to indicate whether the selected chip supports 556 /// receiving IEEE 802.15.4E-2012 Multipurpose frames. 557 /// See also runtime refinement \ref 558 /// RAIL_IEEE802154_SupportsEMultipurposeFrames(). 559 #if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1) 560 #define RAIL_IEEE802154_SUPPORTS_E_MULTIPURPOSE_FRAMES RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868 561 #else 562 #define RAIL_IEEE802154_SUPPORTS_E_MULTIPURPOSE_FRAMES 0 563 #endif 564 /// Backwards-compatible synonym of \ref 565 /// RAIL_IEEE802154_SUPPORTS_E_MULTIPURPOSE_FRAMES. 566 #define RAIL_FEAT_IEEE802154_MULTIPURPOSE_FRAME_SUPPORTED \ 567 RAIL_IEEE802154_SUPPORTS_E_MULTIPURPOSE_FRAMES 568 569 /// Boolean to indicate whether the selected chip supports 570 /// IEEE 802.15.4G-2012 feature subset needed for Zigbee R22 GB868. 571 /// See also runtime refinement \ref 572 /// RAIL_IEEE802154_SupportsGSubsetGB868(). 573 #if (_SILICON_LABS_32B_SERIES_2_CONFIG != 3) 574 #define RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868 \ 575 ((RAIL_SUPPORTS_PROTOCOL_IEEE802154 != 0) && (RAIL_SUPPORTS_SUBGHZ_BAND != 0)) 576 #else 577 #define RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868 0 578 #endif 579 /// Backwards-compatible synonym of \ref 580 /// RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868. 581 #define RAIL_FEAT_IEEE802154_G_GB868_SUPPORTED \ 582 RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868 583 584 /// Boolean to indicate whether the selected chip supports 585 /// dynamic FEC 586 /// See also runtime refinement \ref 587 /// RAIL_IEEE802154_SupportsGDynFec(). 588 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG > 1) \ 589 || (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300)) 590 #define RAIL_IEEE802154_SUPPORTS_G_DYNFEC \ 591 RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868 // limit to Sub-GHz for now 592 #else 593 #define RAIL_IEEE802154_SUPPORTS_G_DYNFEC 0 594 #endif 595 596 /// Boolean to indicate whether the selected chip supports 597 /// Wi-SUN mode switching 598 /// See also runtime refinement \ref 599 /// RAIL_IEEE802154_SupportsGModeSwitch(). 600 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 5) \ 601 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)) 602 #define RAIL_IEEE802154_SUPPORTS_G_MODESWITCH \ 603 RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868 // limit to Sub-GHz for now 604 #else 605 #define RAIL_IEEE802154_SUPPORTS_G_MODESWITCH 0 606 #endif 607 608 /// Boolean to indicate whether the selected chip supports 609 /// IEEE 802.15.4G-2012 reception and transmission of frames 610 /// with 4-byte CRC. 611 /// See also runtime refinement \ref RAIL_IEEE802154_SupportsG4ByteCrc(). 612 #if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1) 613 #define RAIL_IEEE802154_SUPPORTS_G_4BYTE_CRC RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868 614 #else 615 #define RAIL_IEEE802154_SUPPORTS_G_4BYTE_CRC 0 616 #endif 617 /// Backwards-compatible synonym of \ref RAIL_IEEE802154_SUPPORTS_G_4BYTE_CRC. 618 #define RAIL_FEAT_IEEE802154_G_4BYTE_CRC_SUPPORTED \ 619 RAIL_IEEE802154_SUPPORTS_G_4BYTE_CRC 620 621 /// Boolean to indicate whether the selected chip supports 622 /// IEEE 802.15.4G-2012 reception of unwhitened frames. 623 /// See also runtime refinement \ref 624 /// RAIL_IEEE802154_SupportsGUnwhitenedRx(). 625 #if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1) 626 #define RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_RX RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868 627 #else 628 #define RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_RX 0 629 #endif 630 /// Backwards-compatible synonym of \ref 631 /// RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_RX. 632 #define RAIL_FEAT_IEEE802154_G_UNWHITENED_RX_SUPPORTED \ 633 RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_RX 634 635 /// Boolean to indicate whether the selected chip supports 636 /// IEEE 802.15.4G-2012 transmission of unwhitened frames. 637 /// See also runtime refinement \ref 638 /// RAIL_IEEE802154_SupportsGUnwhitenedTx(). 639 #if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1) 640 #define RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_TX RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868 641 #else 642 #define RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_TX 0 643 #endif 644 /// Backwards-compatible synonym of \ref 645 /// RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_TX. 646 #define RAIL_FEAT_IEEE802154_G_UNWHITENED_TX_SUPPORTED \ 647 RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_TX 648 649 /// Boolean to indicate whether the selected chip supports 650 /// canceling the frame-pending lookup event 651 /// \ref RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND 652 /// when the radio transitions to a state that renders the 653 /// the reporting of this event moot (i.e., too late for 654 /// the stack to influence the outgoing ACK). 655 /// See also runtime refinement \ref 656 /// RAIL_IEEE802154_SupportsCancelFramePendingLookup(). 657 #if 1 658 #define RAIL_IEEE802154_SUPPORTS_CANCEL_FRAME_PENDING_LOOKUP RAIL_SUPPORTS_PROTOCOL_IEEE802154 659 #else 660 #define RAIL_IEEE802154_SUPPORTS_CANCEL_FRAME_PENDING_LOOKUP 0 661 #endif 662 /// Backwards-compatible synonym of \ref 663 /// RAIL_IEEE802154_SUPPORTS_CANCEL_FRAME_PENDING_LOOKUP. 664 #define RAIL_FEAT_IEEE802154_CANCEL_FP_LOOKUP_SUPPORTED \ 665 RAIL_IEEE802154_SUPPORTS_CANCEL_FRAME_PENDING_LOOKUP 666 667 /// Boolean to indicate whether the selected chip supports 668 /// early triggering of the frame-pending lookup event 669 /// \ref RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND 670 /// just after MAC address fields have been received. 671 /// See also runtime refinement \ref 672 /// RAIL_IEEE802154_SupportsEarlyFramePendingLookup(). 673 #if 1 674 #define RAIL_IEEE802154_SUPPORTS_EARLY_FRAME_PENDING_LOOKUP RAIL_SUPPORTS_PROTOCOL_IEEE802154 675 #else 676 #define RAIL_IEEE802154_SUPPORTS_EARLY_FRAME_PENDING_LOOKUP 0 677 #endif 678 /// Backwards-compatible synonym of \ref 679 /// RAIL_IEEE802154_SUPPORTS_EARLY_FRAME_PENDING_LOOKUP. 680 #define RAIL_FEAT_IEEE802154_EARLY_FP_LOOKUP_SUPPORTED \ 681 RAIL_IEEE802154_SUPPORTS_EARLY_FRAME_PENDING_LOOKUP 682 683 /// Boolean to indicate whether the selected chip supports dual PA configs for mode switch 684 /// or concurrent mode. 685 /// See also runtime refinement \ref RAIL_IEEE802154_SupportsDualPaConfig(). 686 #if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5) 687 #define RAIL_IEEE802154_SUPPORTS_DUAL_PA_CONFIG 1 688 #else 689 #define RAIL_IEEE802154_SUPPORTS_DUAL_PA_CONFIG 0 690 #endif 691 692 /// Boolean to indicate whether the selected chip supports the pa power setting table. 693 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 5) \ 694 || (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300)) 695 #define RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE 1 696 #else 697 #define RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE 0 698 #endif 699 700 #ifndef DOXYGEN_SHOULD_SKIP_THIS 701 /// Boolean to indicate whether the selected chip uses the common PA interface. 702 /// This feature is available when the configuration for Silicon Labs Series 3 703 /// devices is set to 1, enabling the use of a unified Power Amplifier (PA) interface 704 /// across different configurations. 705 #if (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300) 706 #define RAIL_SUPPORTS_COMMON_PA_INTERFACE 1 707 #else 708 #define RAIL_SUPPORTS_COMMON_PA_INTERFACE 0 709 #endif 710 #endif //DOXYGEN_SHOULD_SKIP_THIS 711 712 #ifndef DOXYGEN_SHOULD_SKIP_THIS 713 /// Boolean to indicate whether the selected chip supports 714 /// IEEE802.15.4 2.4 GHz at 2 Mbps 715 /// See also runtime refinement \ref 716 /// RAIL_IEEE802154_Supports2MbpsPhy(). 717 #if (_SILICON_LABS_32B_SERIES_1_CONFIG == 3) \ 718 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 1) \ 719 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \ 720 || (_SILICON_LABS_32B_SERIES_3_CONFIG == 301) \ 721 || (_SILICON_LABS_32B_SERIES_3_CONFIG == 300) 722 #define RAIL_IEEE802154_SUPPORTS_2MBPS_PHY \ 723 (RAIL_SUPPORTS_PROTOCOL_IEEE802154 && RAIL_SUPPORTS_2P4GHZ_BAND) 724 #else 725 #define RAIL_IEEE802154_SUPPORTS_2MBPS_PHY 0 726 #endif 727 #endif //DOXYGEN_SHOULD_SKIP_THIS 728 729 /// Boolean to indicate whether the selected chip supports IEEE 802.15.4 PHY 730 /// with custom settings 731 #if ((_SILICON_LABS_32B_SERIES_1_CONFIG == 2) \ 732 || (_SILICON_LABS_32B_SERIES_1_CONFIG == 3)) 733 #define RAIL_IEEE802154_SUPPORTS_CUSTOM1_PHY (RAIL_SUPPORTS_PROTOCOL_IEEE802154 && RAIL_SUPPORTS_2P4GHZ_BAND) 734 #else 735 #define RAIL_IEEE802154_SUPPORTS_CUSTOM1_PHY 0 736 #endif 737 738 // Wi_SUN features 739 740 /// Boolean to indicate whether the selected chip supports 741 /// Wi-SUN 742 /// See also runtime refinement \ref 743 /// RAIL_SupportsProtocolWiSUN(). 744 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 5) \ 745 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)) 746 #define RAIL_SUPPORTS_PROTOCOL_WI_SUN 1 747 #else 748 #define RAIL_SUPPORTS_PROTOCOL_WI_SUN 0 749 #endif 750 751 // WMBUS features 752 753 /// Boolean to indicate whether the selected chip supports WMBUS simultaneous 754 /// M2O RX of T and C modes set by \ref RAIL_WMBUS_Config(). 755 /// See also runtime refinement \ref RAIL_WMBUS_SupportsSimultaneousTCRx(). 756 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \ 757 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)) 758 #define RAIL_WMBUS_SUPPORTS_SIMULTANEOUS_T_C_RX 1 759 #else 760 #define RAIL_WMBUS_SUPPORTS_SIMULTANEOUS_T_C_RX 0 761 #endif 762 763 // Z-Wave features 764 // Some features may not be available on all platforms 765 // due to radio hardware limitations. 766 767 /// Boolean to indicate whether the selected chip supports Z-Wave. 768 /// See also runtime refinement \ref RAIL_SupportsProtocolZWave(). 769 #if ((_SILICON_LABS_32B_SERIES_1_CONFIG >= 3) \ 770 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \ 771 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)) 772 #define RAIL_SUPPORTS_PROTOCOL_ZWAVE RAIL_SUPPORTS_SUBGHZ_BAND 773 #else 774 #define RAIL_SUPPORTS_PROTOCOL_ZWAVE 0 775 #endif 776 /// Backwards-compatible synonym of \ref RAIL_SUPPORTS_PROTOCOL_ZWAVE. 777 #define RAIL_FEAT_ZWAVE_SUPPORTED RAIL_SUPPORTS_PROTOCOL_ZWAVE 778 779 /// Boolean to indicate whether the selected chip supports energy detect PHY. 780 /// See also runtime refinement \ref RAIL_ZWAVE_SupportsEnergyDetectPhy(). 781 #if (_SILICON_LABS_32B_SERIES_1_CONFIG >= 3) 782 #define RAIL_ZWAVE_SUPPORTS_ED_PHY RAIL_SUPPORTS_PROTOCOL_ZWAVE 783 #else 784 #define RAIL_ZWAVE_SUPPORTS_ED_PHY 0 785 #endif 786 787 /// Boolean to indicate whether the selected chip supports concurrent PHY. 788 /// See also runtime refinement \ref RAIL_ZWAVE_SupportsConcPhy(). 789 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \ 790 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)) 791 #define RAIL_ZWAVE_SUPPORTS_CONC_PHY RAIL_SUPPORTS_PROTOCOL_ZWAVE 792 #else 793 #define RAIL_ZWAVE_SUPPORTS_CONC_PHY 0 794 #endif 795 796 /// Boolean to indicate whether the selected chip supports SQ-based PHY. 797 /// See also runtime refinement \ref RAIL_SupportsSQPhy(). 798 #if (((_SILICON_LABS_32B_SERIES_2_CONFIG >= 3) \ 799 && (_SILICON_LABS_32B_SERIES_2_CONFIG != 7) \ 800 && (_SILICON_LABS_32B_SERIES_2_CONFIG != 9)) \ 801 || (_SILICON_LABS_32B_SERIES_3_CONFIG == 301) \ 802 || (_SILICON_LABS_32B_SERIES_3_CONFIG == 300)) 803 #define RAIL_SUPPORTS_SQ_PHY 1 804 #else 805 #define RAIL_SUPPORTS_SQ_PHY 0 806 #endif 807 808 /// Boolean to indicate whether the code supports Z-Wave 809 /// region information in PTI and 810 /// newer \ref RAIL_ZWAVE_RegionConfig_t structure 811 /// See also runtime refinement \ref RAIL_ZWAVE_SupportsRegionPti(). 812 #if 1 813 #define RAIL_ZWAVE_SUPPORTS_REGION_PTI RAIL_SUPPORTS_PROTOCOL_ZWAVE 814 #else 815 #define RAIL_ZWAVE_SUPPORTS_REGION_PTI 0 816 #endif 817 /// Backwards-compatible synonym of \ref RAIL_ZWAVE_SUPPORTS_REGION_PTI. 818 #define RAIL_FEAT_ZWAVE_REGION_PTI RAIL_ZWAVE_SUPPORTS_REGION_PTI 819 820 /// Boolean to indicate whether the selected chip supports raw RX data 821 /// sources other than \ref RAIL_RxDataSource_t::RX_PACKET_DATA. 822 /// See also runtime refinement \ref RAIL_SupportsRxRawData(). 823 #if (_SILICON_LABS_32B_SERIES_3_CONFIG == 0) 824 #define RAIL_SUPPORTS_RX_RAW_DATA 1 825 #else 826 #define RAIL_SUPPORTS_RX_RAW_DATA 0 827 #endif 828 829 /// Boolean to indicate whether the selected chip supports 830 /// direct mode. 831 /// See also runtime refinement \ref RAIL_SupportsDirectMode(). 832 #if ((_SILICON_LABS_32B_SERIES == 1) \ 833 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \ 834 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)) 835 #define RAIL_SUPPORTS_DIRECT_MODE 1 836 #else 837 #define RAIL_SUPPORTS_DIRECT_MODE 0 838 #endif 839 840 /// Boolean to indicate whether the selected chip supports 841 /// RX direct mode data to FIFO. 842 /// See also runtime refinement \ref RAIL_SupportsRxDirectModeDataToFifo(). 843 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \ 844 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)) 845 #define RAIL_SUPPORTS_RX_DIRECT_MODE_DATA_TO_FIFO 1 846 #else 847 #define RAIL_SUPPORTS_RX_DIRECT_MODE_DATA_TO_FIFO 0 848 #endif 849 850 /// Boolean to indicate whether the selected chip supports 851 /// MFM protocol. 852 /// See also runtime refinement \ref RAIL_SupportsMfm(). 853 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \ 854 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)) 855 #define RAIL_SUPPORTS_MFM 1 856 #else 857 #define RAIL_SUPPORTS_MFM 0 858 #endif 859 860 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \ 861 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \ 862 || (_SILICON_LABS_32B_SERIES_3_CONFIG == 301) \ 863 || (_SILICON_LABS_32B_SERIES_3_CONFIG == 300)) 864 /// Boolean to indicate whether the selected chip supports 865 /// 802.15.4 signal detection 866 #define RAIL_IEEE802154_SUPPORTS_SIGNAL_IDENTIFIER (RAIL_SUPPORTS_PROTOCOL_IEEE802154) 867 /// Boolean to indicate whether the selected chip supports 868 /// BLE signal detection 869 #define RAIL_BLE_SUPPORTS_SIGNAL_IDENTIFIER (RAIL_SUPPORTS_PROTOCOL_BLE) 870 #else 871 /// Boolean to indicate whether the selected chip supports 872 /// 802.15.4 signal detection 873 #define RAIL_IEEE802154_SUPPORTS_SIGNAL_IDENTIFIER 0 874 /// Boolean to indicate whether the selected chip supports 875 /// BLE signal detection 876 #define RAIL_BLE_SUPPORTS_SIGNAL_IDENTIFIER 0 877 #endif 878 879 /// Boolean to indicate whether the selected chip supports 880 /// configurable RSSI threshold set by \ref RAIL_SetRssiDetectThreshold(). 881 /// See also runtime refinement \ref RAIL_SupportsRssiDetectThreshold(). 882 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \ 883 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)) 884 #define RAIL_SUPPORTS_RSSI_DETECT_THRESHOLD (1U) 885 #else 886 #define RAIL_SUPPORTS_RSSI_DETECT_THRESHOLD (0U) 887 #endif 888 889 /// Boolean to indicate whether the selected chip supports 890 /// thermal protection set by \ref RAIL_ConfigThermalProtection(). 891 /// See also runtime refinement \ref RAIL_SupportsThermalProtection(). 892 #if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5) 893 #define RAIL_SUPPORTS_THERMAL_PROTECTION (1U) 894 #else 895 #define RAIL_SUPPORTS_THERMAL_PROTECTION (0U) 896 #endif 897 898 /// Boolean to indicate whether the selected chip supports fast RX-to-RX enabled by 899 /// \ref RAIL_RX_OPTION_FAST_RX2RX. 900 /// See also runtime refinement \ref RAIL_SupportsFastRx2Rx(). 901 #if (_SILICON_LABS_32B_SERIES_2_CONFIG >= 2) 902 #define RAIL_SUPPORTS_FAST_RX2RX (1U) 903 #else 904 #define RAIL_SUPPORTS_FAST_RX2RX (0U) 905 #endif 906 907 /// Boolean to indicate whether the selected chip supports collision detection 908 /// enabled by \ref RAIL_RX_OPTION_ENABLE_COLLISION_DETECTION 909 /// See also runtime refinement \ref RAIL_SupportsCollisionDetection(). 910 #if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5) 911 #define RAIL_SUPPORTS_COLLISION_DETECTION (1U) 912 #else 913 #define RAIL_SUPPORTS_COLLISION_DETECTION (0U) 914 #endif 915 916 /// Boolean to indicate whether the selected chip supports Sidewalk protocol. 917 /// See also runtime refinement \ref RAIL_SupportsProtocolSidewalk(). 918 #if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \ 919 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)) 920 #define RAIL_SUPPORTS_PROTOCOL_SIDEWALK (1U) 921 #else 922 #define RAIL_SUPPORTS_PROTOCOL_SIDEWALK (0U) 923 #endif 924 925 /// Boolean to indicate whether the selected chip supports TrustZone secure 926 /// configuration of peripherals used by RAIL. 927 /// See also runtime refinement \ref RAIL_SupportsTrustZoneSecurePeripherals(). 928 #if (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \ 929 || (_SILICON_LABS_32B_SERIES_2_CONFIG == 8) 930 #define RAIL_SUPPORTS_TRUSTZONE_SECURE_PERIPHERALS (1U) 931 #else 932 #define RAIL_SUPPORTS_TRUSTZONE_SECURE_PERIPHERALS (0U) 933 #endif 934 935 /// Boolean to indicate whether the selected chip supports automatic PRS LNA 936 /// bypass for external FEM. 937 /// See also runtime refinement \ref RAIL_SupportsPrsLnaBypass(). 938 #if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5) 939 #define RAIL_SUPPORTS_PRS_LNA_BYPASS (1U) 940 #else 941 #define RAIL_SUPPORTS_PRS_LNA_BYPASS (0U) 942 #endif 943 944 /** @} */ // end of group Features 945 946 /** @} */ // end of group RAIL_API 947 948 #ifdef __cplusplus 949 } 950 #endif 951 952 #endif // __RAIL_FEATURES_H__ 953
