1 /**************************************************************************//**
2  * @file
3  * @brief CMSIS system header file for EFR32MG21
4  ******************************************************************************
5  * # License
6  * <b>Copyright 2024 Silicon Laboratories, Inc. www.silabs.com</b>
7  ******************************************************************************
8  *
9  * SPDX-License-Identifier: Zlib
10  *
11  * The licensor of this software is Silicon Laboratories Inc.
12  *
13  * This software is provided 'as-is', without any express or implied
14  * warranty. In no event will the authors be held liable for any damages
15  * arising from the use of this software.
16  *
17  * Permission is granted to anyone to use this software for any purpose,
18  * including commercial applications, and to alter it and redistribute it
19  * freely, subject to the following restrictions:
20  *
21  * 1. The origin of this software must not be misrepresented; you must not
22  *    claim that you wrote the original software. If you use this software
23  *    in a product, an acknowledgment in the product documentation would be
24  *    appreciated but is not required.
25  * 2. Altered source versions must be plainly marked as such, and must not be
26  *    misrepresented as being the original software.
27  * 3. This notice may not be removed or altered from any source distribution.
28  *
29  *****************************************************************************/
30 
31 #ifndef SYSTEM_EFR32MG21_H
32 #define SYSTEM_EFR32MG21_H
33 
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37 
38 #include <stdint.h>
39 #include "sl_code_classification.h"
40 
41 /***************************************************************************//**
42  * @addtogroup Parts
43  * @{
44  ******************************************************************************/
45 /***************************************************************************//**
46  * @addtogroup EFR32MG21 EFR32MG21
47  * @{
48  ******************************************************************************/
49 
50 /*******************************************************************************
51  ******************************   TYPEDEFS   ***********************************
52  ******************************************************************************/
53 
54 /* Interrupt vectortable entry */
55 typedef union {
56   void (*VECTOR_TABLE_Type)(void);
57   void *topOfStack;
58 } tVectorEntry;
59 
60 /*******************************************************************************
61  **************************   GLOBAL VARIABLES   *******************************
62  ******************************************************************************/
63 
64 #if !defined(SYSTEM_NO_STATIC_MEMORY)
65 extern uint32_t SystemCoreClock;     /**< System Clock Frequency (Core Clock) */
66 extern uint32_t SystemHfrcoFreq;     /**< System HFRCO frequency */
67 #endif
68 
69 /*******************************************************************************
70  *****************************   PROTOTYPES   **********************************
71  ******************************************************************************/
72 
73 void Reset_Handler(void);           /**< Reset Handler */
74 void NMI_Handler(void);             /**< NMI Handler */
75 void HardFault_Handler(void);       /**< Hard Fault Handler */
76 void MemManage_Handler(void);       /**< MPU Fault Handler */
77 void BusFault_Handler(void);        /**< Bus Fault Handler */
78 void UsageFault_Handler(void);      /**< Usage Fault Handler */
79 void SecureFault_Handler(void);     /**< Secure Fault Handler */
80 void SVC_Handler(void);             /**< SVCall Handler */
81 void DebugMon_Handler(void);        /**< Debug Monitor Handler */
82 void PendSV_Handler(void);          /**< PendSV Handler */
83 void SysTick_Handler(void);         /**< SysTick Handler */
84 
85 /* Part Specific Interrupts */
86 void SETAMPERHOST_IRQHandler(void);   /**< SETAMPERHOST IRQ Handler */
87 void SEMBRX_IRQHandler(void);         /**< SEMBRX IRQ Handler */
88 void SEMBTX_IRQHandler(void);         /**< SEMBTX IRQ Handler */
89 void SMU_SECURE_IRQHandler(void);     /**< SMU_SECURE IRQ Handler */
90 void SMU_PRIVILEGED_IRQHandler(void); /**< SMU_PRIVILEGED IRQ Handler */
91 void EMU_IRQHandler(void);            /**< EMU IRQ Handler */
92 void TIMER0_IRQHandler(void);         /**< TIMER0 IRQ Handler */
93 void TIMER1_IRQHandler(void);         /**< TIMER1 IRQ Handler */
94 void TIMER2_IRQHandler(void);         /**< TIMER2 IRQ Handler */
95 void TIMER3_IRQHandler(void);         /**< TIMER3 IRQ Handler */
96 void RTCC_IRQHandler(void);           /**< RTCC IRQ Handler */
97 void USART0_RX_IRQHandler(void);      /**< USART0_RX IRQ Handler */
98 void USART0_TX_IRQHandler(void);      /**< USART0_TX IRQ Handler */
99 void USART1_RX_IRQHandler(void);      /**< USART1_RX IRQ Handler */
100 void USART1_TX_IRQHandler(void);      /**< USART1_TX IRQ Handler */
101 void USART2_RX_IRQHandler(void);      /**< USART2_RX IRQ Handler */
102 void USART2_TX_IRQHandler(void);      /**< USART2_TX IRQ Handler */
103 void ICACHE0_IRQHandler(void);        /**< ICACHE0 IRQ Handler */
104 void BURTC_IRQHandler(void);          /**< BURTC IRQ Handler */
105 void LETIMER0_IRQHandler(void);       /**< LETIMER0 IRQ Handler */
106 void SYSCFG_IRQHandler(void);         /**< SYSCFG IRQ Handler */
107 void LDMA_IRQHandler(void);           /**< LDMA IRQ Handler */
108 void LFXO_IRQHandler(void);           /**< LFXO IRQ Handler */
109 void LFRCO_IRQHandler(void);          /**< LFRCO IRQ Handler */
110 void ULFRCO_IRQHandler(void);         /**< ULFRCO IRQ Handler */
111 void GPIO_ODD_IRQHandler(void);       /**< GPIO_ODD IRQ Handler */
112 void GPIO_EVEN_IRQHandler(void);      /**< GPIO_EVEN IRQ Handler */
113 void I2C0_IRQHandler(void);           /**< I2C0 IRQ Handler */
114 void I2C1_IRQHandler(void);           /**< I2C1 IRQ Handler */
115 void EMUDG_IRQHandler(void);          /**< EMUDG IRQ Handler */
116 void EMUSE_IRQHandler(void);          /**< EMUSE IRQ Handler */
117 void AGC_IRQHandler(void);            /**< AGC IRQ Handler */
118 void BUFC_IRQHandler(void);           /**< BUFC IRQ Handler */
119 void FRC_PRI_IRQHandler(void);        /**< FRC_PRI IRQ Handler */
120 void FRC_IRQHandler(void);            /**< FRC IRQ Handler */
121 void MODEM_IRQHandler(void);          /**< MODEM IRQ Handler */
122 void PROTIMER_IRQHandler(void);       /**< PROTIMER IRQ Handler */
123 void RAC_RSM_IRQHandler(void);        /**< RAC_RSM IRQ Handler */
124 void RAC_SEQ_IRQHandler(void);        /**< RAC_SEQ IRQ Handler */
125 void PRORTC_IRQHandler(void);         /**< PRORTC IRQ Handler */
126 void SYNTH_IRQHandler(void);          /**< SYNTH IRQ Handler */
127 void ACMP0_IRQHandler(void);          /**< ACMP0 IRQ Handler */
128 void ACMP1_IRQHandler(void);          /**< ACMP1 IRQ Handler */
129 void WDOG0_IRQHandler(void);          /**< WDOG0 IRQ Handler */
130 void WDOG1_IRQHandler(void);          /**< WDOG1 IRQ Handler */
131 void HFXO00_IRQHandler(void);         /**< HFXO00 IRQ Handler */
132 void HFRCO0_IRQHandler(void);         /**< HFRCO0 IRQ Handler */
133 void HFRCOEM23_IRQHandler(void);      /**< HFRCOEM23 IRQ Handler */
134 void CMU_IRQHandler(void);            /**< CMU IRQ Handler */
135 void AES_IRQHandler(void);            /**< AES IRQ Handler */
136 void IADC_IRQHandler(void);           /**< IADC IRQ Handler */
137 void MSC_IRQHandler(void);            /**< MSC IRQ Handler */
138 void DPLL0_IRQHandler(void);          /**< DPLL0 IRQ Handler */
139 void SW0_IRQHandler(void);            /**< SW0 IRQ Handler */
140 void SW1_IRQHandler(void);            /**< SW1 IRQ Handler */
141 void SW2_IRQHandler(void);            /**< SW2 IRQ Handler */
142 void SW3_IRQHandler(void);            /**< SW3 IRQ Handler */
143 void KERNEL0_IRQHandler(void);        /**< KERNEL0 IRQ Handler */
144 void KERNEL1_IRQHandler(void);        /**< KERNEL1 IRQ Handler */
145 void M33CTI0_IRQHandler(void);        /**< M33CTI0 IRQ Handler */
146 void M33CTI1_IRQHandler(void);        /**< M33CTI1 IRQ Handler */
147 
148 #if (__FPU_PRESENT == 1)
149 void FPUEH_IRQHandler(void);        /**< FPU IRQ Handler */
150 #endif
151 
152 SL_CODE_CLASSIFY(SL_CODE_COMPONENT_SYSTEM, SL_CODE_CLASS_TIME_CRITICAL)
153 uint32_t SystemHCLKGet(void);
154 
155 /**************************************************************************//**
156  * @brief
157  *   Update CMSIS SystemCoreClock variable.
158  *
159  * @details
160  *   CMSIS defines a global variable SystemCoreClock that shall hold the
161  *   core frequency in Hz. If the core frequency is dynamically changed, the
162  *   variable must be kept updated in order to be CMSIS compliant.
163  *
164  *   Notice that only if changing the core clock frequency through the EMLIB
165  *   CMU API, this variable will be kept updated. This function is only
166  *   provided for CMSIS compliance and if a user modifies the the core clock
167  *   outside the EMLIB CMU API.
168  *****************************************************************************/
SL_CODE_CLASSIFY(SL_CODE_COMPONENT_SYSTEM,SL_CODE_CLASS_TIME_CRITICAL)169 SL_CODE_CLASSIFY(SL_CODE_COMPONENT_SYSTEM, SL_CODE_CLASS_TIME_CRITICAL)
170 static __INLINE uint32_t SystemCoreClockGet(void)
171 {
172   return SystemHCLKGet();
173 }
174 
175 /**************************************************************************//**
176  * @brief
177  *   Update CMSIS SystemCoreClock variable.
178  *
179  * @details
180  *   CMSIS defines a global variable SystemCoreClock that shall hold the
181  *   core frequency in Hz. If the core frequency is dynamically changed, the
182  *   variable must be kept updated in order to be CMSIS compliant.
183  *
184  *   Notice that only if changing the core clock frequency through the EMLIB
185  *   CMU API, this variable will be kept updated. This function is only
186  *   provided for CMSIS compliance and if a user modifies the the core clock
187  *   outside the EMLIB CMU API.
188  *****************************************************************************/
SL_CODE_CLASSIFY(SL_CODE_COMPONENT_SYSTEM,SL_CODE_CLASS_TIME_CRITICAL)189 SL_CODE_CLASSIFY(SL_CODE_COMPONENT_SYSTEM, SL_CODE_CLASS_TIME_CRITICAL)
190 static __INLINE void SystemCoreClockUpdate(void)
191 {
192   SystemHCLKGet();
193 }
194 
195 void     SystemInit(void);
196 SL_CODE_CLASSIFY(SL_CODE_COMPONENT_SYSTEM, SL_CODE_CLASS_TIME_CRITICAL)
197 uint32_t SystemHFRCODPLLClockGet(void);
198 void     SystemHFRCODPLLClockSet(uint32_t freq);
199 SL_CODE_CLASSIFY(SL_CODE_COMPONENT_SYSTEM, SL_CODE_CLASS_TIME_CRITICAL)
200 uint32_t SystemSYSCLKGet(void);
201 SL_CODE_CLASSIFY(SL_CODE_COMPONENT_SYSTEM, SL_CODE_CLASS_TIME_CRITICAL)
202 uint32_t SystemMaxCoreClockGet(void);
203 SL_CODE_CLASSIFY(SL_CODE_COMPONENT_SYSTEM, SL_CODE_CLASS_TIME_CRITICAL)
204 uint32_t SystemFSRCOClockGet(void);
205 SL_CODE_CLASSIFY(SL_CODE_COMPONENT_SYSTEM, SL_CODE_CLASS_TIME_CRITICAL)
206 uint32_t SystemHFXOClockGet(void);
207 void     SystemHFXOClockSet(uint32_t freq);
208 SL_CODE_CLASSIFY(SL_CODE_COMPONENT_SYSTEM, SL_CODE_CLASS_TIME_CRITICAL)
209 uint32_t SystemCLKIN0Get(void);
210 SL_CODE_CLASSIFY(SL_CODE_COMPONENT_SYSTEM, SL_CODE_CLASS_TIME_CRITICAL)
211 uint32_t SystemHFRCOEM23ClockGet(void);
212 SL_CODE_CLASSIFY(SL_CODE_COMPONENT_SYSTEM, SL_CODE_CLASS_TIME_CRITICAL)
213 uint32_t SystemLFXOClockGet(void);
214 void     SystemLFXOClockSet(uint32_t freq);
215 SL_CODE_CLASSIFY(SL_CODE_COMPONENT_SYSTEM, SL_CODE_CLASS_TIME_CRITICAL)
216 uint32_t SystemLFRCOClockGet(void);
217 SL_CODE_CLASSIFY(SL_CODE_COMPONENT_SYSTEM, SL_CODE_CLASS_TIME_CRITICAL)
218 uint32_t SystemULFRCOClockGet(void);
219 
220 /** @} End of group */
221 /** @} End of group Parts */
222 
223 #ifdef __cplusplus
224 }
225 #endif
226 #endif /* SYSTEM_EFR32MG21_H */
227