1 /**************************************************************************//** 2 * @file 3 * @brief EFR32FG23 LCD register and bit field definitions 4 ****************************************************************************** 5 * # License 6 * <b>Copyright 2024 Silicon Laboratories, Inc. www.silabs.com</b> 7 ****************************************************************************** 8 * 9 * SPDX-License-Identifier: Zlib 10 * 11 * The licensor of this software is Silicon Laboratories Inc. 12 * 13 * This software is provided 'as-is', without any express or implied 14 * warranty. In no event will the authors be held liable for any damages 15 * arising from the use of this software. 16 * 17 * Permission is granted to anyone to use this software for any purpose, 18 * including commercial applications, and to alter it and redistribute it 19 * freely, subject to the following restrictions: 20 * 21 * 1. The origin of this software must not be misrepresented; you must not 22 * claim that you wrote the original software. If you use this software 23 * in a product, an acknowledgment in the product documentation would be 24 * appreciated but is not required. 25 * 2. Altered source versions must be plainly marked as such, and must not be 26 * misrepresented as being the original software. 27 * 3. This notice may not be removed or altered from any source distribution. 28 * 29 *****************************************************************************/ 30 #ifndef EFR32FG23_LCD_H 31 #define EFR32FG23_LCD_H 32 #define LCD_HAS_SET_CLEAR 33 34 /**************************************************************************//** 35 * @addtogroup Parts 36 * @{ 37 ******************************************************************************/ 38 /**************************************************************************//** 39 * @defgroup EFR32FG23_LCD LCD 40 * @{ 41 * @brief EFR32FG23 LCD Register Declaration. 42 *****************************************************************************/ 43 44 /** LCD Register Declaration. */ 45 typedef struct lcd_typedef{ 46 __IM uint32_t IPVERSION; /**< IPVERSION */ 47 __IOM uint32_t EN; /**< Enable */ 48 __IOM uint32_t SWRST; /**< Software Reset */ 49 __IOM uint32_t CTRL; /**< Control Register */ 50 __IOM uint32_t CMD; /**< Command register */ 51 __IOM uint32_t DISPCTRL; /**< Display Control Register */ 52 __IOM uint32_t BACFG; /**< Blink and Animation Config Register */ 53 __IOM uint32_t BACTRL; /**< Blink and Animation Control Register */ 54 __IM uint32_t STATUS; /**< Status Register */ 55 __IOM uint32_t AREGA; /**< Animation Register A */ 56 __IOM uint32_t AREGB; /**< Animation Register B */ 57 __IOM uint32_t IF; /**< Interrupt Enable Register */ 58 __IOM uint32_t IEN; /**< Interrupt Enable */ 59 __IOM uint32_t BIASCTRL; /**< Analog BIAS Control */ 60 __IOM uint32_t DISPCTRLX; /**< Display Control Extended */ 61 uint32_t RESERVED0[1U]; /**< Reserved for future use */ 62 __IOM uint32_t SEGD0; /**< Segment Data Register 0 */ 63 uint32_t RESERVED1[1U]; /**< Reserved for future use */ 64 __IOM uint32_t SEGD1; /**< Segment Data Register 1 */ 65 uint32_t RESERVED2[1U]; /**< Reserved for future use */ 66 __IOM uint32_t SEGD2; /**< Segment Data Register 2 */ 67 uint32_t RESERVED3[1U]; /**< Reserved for future use */ 68 __IOM uint32_t SEGD3; /**< Segment Data Register 3 */ 69 uint32_t RESERVED4[25U]; /**< Reserved for future use */ 70 __IOM uint32_t UPDATECTRL; /**< Update Control */ 71 uint32_t RESERVED5[11U]; /**< Reserved for future use */ 72 __IOM uint32_t FRAMERATE; /**< Frame Rate */ 73 uint32_t RESERVED6[963U]; /**< Reserved for future use */ 74 __IM uint32_t IPVERSION_SET; /**< IPVERSION */ 75 __IOM uint32_t EN_SET; /**< Enable */ 76 __IOM uint32_t SWRST_SET; /**< Software Reset */ 77 __IOM uint32_t CTRL_SET; /**< Control Register */ 78 __IOM uint32_t CMD_SET; /**< Command register */ 79 __IOM uint32_t DISPCTRL_SET; /**< Display Control Register */ 80 __IOM uint32_t BACFG_SET; /**< Blink and Animation Config Register */ 81 __IOM uint32_t BACTRL_SET; /**< Blink and Animation Control Register */ 82 __IM uint32_t STATUS_SET; /**< Status Register */ 83 __IOM uint32_t AREGA_SET; /**< Animation Register A */ 84 __IOM uint32_t AREGB_SET; /**< Animation Register B */ 85 __IOM uint32_t IF_SET; /**< Interrupt Enable Register */ 86 __IOM uint32_t IEN_SET; /**< Interrupt Enable */ 87 __IOM uint32_t BIASCTRL_SET; /**< Analog BIAS Control */ 88 __IOM uint32_t DISPCTRLX_SET; /**< Display Control Extended */ 89 uint32_t RESERVED7[1U]; /**< Reserved for future use */ 90 __IOM uint32_t SEGD0_SET; /**< Segment Data Register 0 */ 91 uint32_t RESERVED8[1U]; /**< Reserved for future use */ 92 __IOM uint32_t SEGD1_SET; /**< Segment Data Register 1 */ 93 uint32_t RESERVED9[1U]; /**< Reserved for future use */ 94 __IOM uint32_t SEGD2_SET; /**< Segment Data Register 2 */ 95 uint32_t RESERVED10[1U]; /**< Reserved for future use */ 96 __IOM uint32_t SEGD3_SET; /**< Segment Data Register 3 */ 97 uint32_t RESERVED11[25U]; /**< Reserved for future use */ 98 __IOM uint32_t UPDATECTRL_SET; /**< Update Control */ 99 uint32_t RESERVED12[11U]; /**< Reserved for future use */ 100 __IOM uint32_t FRAMERATE_SET; /**< Frame Rate */ 101 uint32_t RESERVED13[963U]; /**< Reserved for future use */ 102 __IM uint32_t IPVERSION_CLR; /**< IPVERSION */ 103 __IOM uint32_t EN_CLR; /**< Enable */ 104 __IOM uint32_t SWRST_CLR; /**< Software Reset */ 105 __IOM uint32_t CTRL_CLR; /**< Control Register */ 106 __IOM uint32_t CMD_CLR; /**< Command register */ 107 __IOM uint32_t DISPCTRL_CLR; /**< Display Control Register */ 108 __IOM uint32_t BACFG_CLR; /**< Blink and Animation Config Register */ 109 __IOM uint32_t BACTRL_CLR; /**< Blink and Animation Control Register */ 110 __IM uint32_t STATUS_CLR; /**< Status Register */ 111 __IOM uint32_t AREGA_CLR; /**< Animation Register A */ 112 __IOM uint32_t AREGB_CLR; /**< Animation Register B */ 113 __IOM uint32_t IF_CLR; /**< Interrupt Enable Register */ 114 __IOM uint32_t IEN_CLR; /**< Interrupt Enable */ 115 __IOM uint32_t BIASCTRL_CLR; /**< Analog BIAS Control */ 116 __IOM uint32_t DISPCTRLX_CLR; /**< Display Control Extended */ 117 uint32_t RESERVED14[1U]; /**< Reserved for future use */ 118 __IOM uint32_t SEGD0_CLR; /**< Segment Data Register 0 */ 119 uint32_t RESERVED15[1U]; /**< Reserved for future use */ 120 __IOM uint32_t SEGD1_CLR; /**< Segment Data Register 1 */ 121 uint32_t RESERVED16[1U]; /**< Reserved for future use */ 122 __IOM uint32_t SEGD2_CLR; /**< Segment Data Register 2 */ 123 uint32_t RESERVED17[1U]; /**< Reserved for future use */ 124 __IOM uint32_t SEGD3_CLR; /**< Segment Data Register 3 */ 125 uint32_t RESERVED18[25U]; /**< Reserved for future use */ 126 __IOM uint32_t UPDATECTRL_CLR; /**< Update Control */ 127 uint32_t RESERVED19[11U]; /**< Reserved for future use */ 128 __IOM uint32_t FRAMERATE_CLR; /**< Frame Rate */ 129 uint32_t RESERVED20[963U]; /**< Reserved for future use */ 130 __IM uint32_t IPVERSION_TGL; /**< IPVERSION */ 131 __IOM uint32_t EN_TGL; /**< Enable */ 132 __IOM uint32_t SWRST_TGL; /**< Software Reset */ 133 __IOM uint32_t CTRL_TGL; /**< Control Register */ 134 __IOM uint32_t CMD_TGL; /**< Command register */ 135 __IOM uint32_t DISPCTRL_TGL; /**< Display Control Register */ 136 __IOM uint32_t BACFG_TGL; /**< Blink and Animation Config Register */ 137 __IOM uint32_t BACTRL_TGL; /**< Blink and Animation Control Register */ 138 __IM uint32_t STATUS_TGL; /**< Status Register */ 139 __IOM uint32_t AREGA_TGL; /**< Animation Register A */ 140 __IOM uint32_t AREGB_TGL; /**< Animation Register B */ 141 __IOM uint32_t IF_TGL; /**< Interrupt Enable Register */ 142 __IOM uint32_t IEN_TGL; /**< Interrupt Enable */ 143 __IOM uint32_t BIASCTRL_TGL; /**< Analog BIAS Control */ 144 __IOM uint32_t DISPCTRLX_TGL; /**< Display Control Extended */ 145 uint32_t RESERVED21[1U]; /**< Reserved for future use */ 146 __IOM uint32_t SEGD0_TGL; /**< Segment Data Register 0 */ 147 uint32_t RESERVED22[1U]; /**< Reserved for future use */ 148 __IOM uint32_t SEGD1_TGL; /**< Segment Data Register 1 */ 149 uint32_t RESERVED23[1U]; /**< Reserved for future use */ 150 __IOM uint32_t SEGD2_TGL; /**< Segment Data Register 2 */ 151 uint32_t RESERVED24[1U]; /**< Reserved for future use */ 152 __IOM uint32_t SEGD3_TGL; /**< Segment Data Register 3 */ 153 uint32_t RESERVED25[25U]; /**< Reserved for future use */ 154 __IOM uint32_t UPDATECTRL_TGL; /**< Update Control */ 155 uint32_t RESERVED26[11U]; /**< Reserved for future use */ 156 __IOM uint32_t FRAMERATE_TGL; /**< Frame Rate */ 157 } LCD_TypeDef; 158 /** @} End of group EFR32FG23_LCD */ 159 160 /**************************************************************************//** 161 * @addtogroup EFR32FG23_LCD 162 * @{ 163 * @defgroup EFR32FG23_LCD_BitFields LCD Bit Fields 164 * @{ 165 *****************************************************************************/ 166 167 /* Bit fields for LCD IPVERSION */ 168 #define _LCD_IPVERSION_RESETVALUE 0x00000001UL /**< Default value for LCD_IPVERSION */ 169 #define _LCD_IPVERSION_MASK 0xFFFFFFFFUL /**< Mask for LCD_IPVERSION */ 170 #define _LCD_IPVERSION_IPVERSION_SHIFT 0 /**< Shift value for LCD_IPVERSION */ 171 #define _LCD_IPVERSION_IPVERSION_MASK 0xFFFFFFFFUL /**< Bit mask for LCD_IPVERSION */ 172 #define _LCD_IPVERSION_IPVERSION_DEFAULT 0x00000001UL /**< Mode DEFAULT for LCD_IPVERSION */ 173 #define LCD_IPVERSION_IPVERSION_DEFAULT (_LCD_IPVERSION_IPVERSION_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_IPVERSION */ 174 175 /* Bit fields for LCD EN */ 176 #define _LCD_EN_RESETVALUE 0x00000000UL /**< Default value for LCD_EN */ 177 #define _LCD_EN_MASK 0x00000003UL /**< Mask for LCD_EN */ 178 #define LCD_EN_EN (0x1UL << 0) /**< Enable */ 179 #define _LCD_EN_EN_SHIFT 0 /**< Shift value for LCD_EN */ 180 #define _LCD_EN_EN_MASK 0x1UL /**< Bit mask for LCD_EN */ 181 #define _LCD_EN_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_EN */ 182 #define _LCD_EN_EN_DISABLE 0x00000000UL /**< Mode DISABLE for LCD_EN */ 183 #define _LCD_EN_EN_ENABLE 0x00000001UL /**< Mode ENABLE for LCD_EN */ 184 #define LCD_EN_EN_DEFAULT (_LCD_EN_EN_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_EN */ 185 #define LCD_EN_EN_DISABLE (_LCD_EN_EN_DISABLE << 0) /**< Shifted mode DISABLE for LCD_EN */ 186 #define LCD_EN_EN_ENABLE (_LCD_EN_EN_ENABLE << 0) /**< Shifted mode ENABLE for LCD_EN */ 187 #define LCD_EN_DISABLING (0x1UL << 1) /**< Disablement busy status */ 188 #define _LCD_EN_DISABLING_SHIFT 1 /**< Shift value for LCD_DISABLING */ 189 #define _LCD_EN_DISABLING_MASK 0x2UL /**< Bit mask for LCD_DISABLING */ 190 #define _LCD_EN_DISABLING_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_EN */ 191 #define LCD_EN_DISABLING_DEFAULT (_LCD_EN_DISABLING_DEFAULT << 1) /**< Shifted mode DEFAULT for LCD_EN */ 192 193 /* Bit fields for LCD SWRST */ 194 #define _LCD_SWRST_RESETVALUE 0x00000000UL /**< Default value for LCD_SWRST */ 195 #define _LCD_SWRST_MASK 0x00000003UL /**< Mask for LCD_SWRST */ 196 #define LCD_SWRST_SWRST (0x1UL << 0) /**< Software reset command */ 197 #define _LCD_SWRST_SWRST_SHIFT 0 /**< Shift value for LCD_SWRST */ 198 #define _LCD_SWRST_SWRST_MASK 0x1UL /**< Bit mask for LCD_SWRST */ 199 #define _LCD_SWRST_SWRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SWRST */ 200 #define LCD_SWRST_SWRST_DEFAULT (_LCD_SWRST_SWRST_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_SWRST */ 201 #define LCD_SWRST_RESETTING (0x1UL << 1) /**< Software reset busy status */ 202 #define _LCD_SWRST_RESETTING_SHIFT 1 /**< Shift value for LCD_RESETTING */ 203 #define _LCD_SWRST_RESETTING_MASK 0x2UL /**< Bit mask for LCD_RESETTING */ 204 #define _LCD_SWRST_RESETTING_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SWRST */ 205 #define LCD_SWRST_RESETTING_DEFAULT (_LCD_SWRST_RESETTING_DEFAULT << 1) /**< Shifted mode DEFAULT for LCD_SWRST */ 206 207 /* Bit fields for LCD CTRL */ 208 #define _LCD_CTRL_RESETVALUE 0x00100000UL /**< Default value for LCD_CTRL */ 209 #define _LCD_CTRL_MASK 0x7F1D0006UL /**< Mask for LCD_CTRL */ 210 #define _LCD_CTRL_UDCTRL_SHIFT 1 /**< Shift value for LCD_UDCTRL */ 211 #define _LCD_CTRL_UDCTRL_MASK 0x6UL /**< Bit mask for LCD_UDCTRL */ 212 #define _LCD_CTRL_UDCTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_CTRL */ 213 #define _LCD_CTRL_UDCTRL_REGULAR 0x00000000UL /**< Mode REGULAR for LCD_CTRL */ 214 #define _LCD_CTRL_UDCTRL_FRAMESTART 0x00000001UL /**< Mode FRAMESTART for LCD_CTRL */ 215 #define _LCD_CTRL_UDCTRL_FCEVENT 0x00000002UL /**< Mode FCEVENT for LCD_CTRL */ 216 #define _LCD_CTRL_UDCTRL_DISPLAYEVENT 0x00000003UL /**< Mode DISPLAYEVENT for LCD_CTRL */ 217 #define LCD_CTRL_UDCTRL_DEFAULT (_LCD_CTRL_UDCTRL_DEFAULT << 1) /**< Shifted mode DEFAULT for LCD_CTRL */ 218 #define LCD_CTRL_UDCTRL_REGULAR (_LCD_CTRL_UDCTRL_REGULAR << 1) /**< Shifted mode REGULAR for LCD_CTRL */ 219 #define LCD_CTRL_UDCTRL_FRAMESTART (_LCD_CTRL_UDCTRL_FRAMESTART << 1) /**< Shifted mode FRAMESTART for LCD_CTRL */ 220 #define LCD_CTRL_UDCTRL_FCEVENT (_LCD_CTRL_UDCTRL_FCEVENT << 1) /**< Shifted mode FCEVENT for LCD_CTRL */ 221 #define LCD_CTRL_UDCTRL_DISPLAYEVENT (_LCD_CTRL_UDCTRL_DISPLAYEVENT << 1) /**< Shifted mode DISPLAYEVENT for LCD_CTRL */ 222 #define LCD_CTRL_DSC (0x1UL << 16) /**< Direct Segment Control */ 223 #define _LCD_CTRL_DSC_SHIFT 16 /**< Shift value for LCD_DSC */ 224 #define _LCD_CTRL_DSC_MASK 0x10000UL /**< Bit mask for LCD_DSC */ 225 #define _LCD_CTRL_DSC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_CTRL */ 226 #define _LCD_CTRL_DSC_DISABLE 0x00000000UL /**< Mode DISABLE for LCD_CTRL */ 227 #define _LCD_CTRL_DSC_ENABLE 0x00000001UL /**< Mode ENABLE for LCD_CTRL */ 228 #define LCD_CTRL_DSC_DEFAULT (_LCD_CTRL_DSC_DEFAULT << 16) /**< Shifted mode DEFAULT for LCD_CTRL */ 229 #define LCD_CTRL_DSC_DISABLE (_LCD_CTRL_DSC_DISABLE << 16) /**< Shifted mode DISABLE for LCD_CTRL */ 230 #define LCD_CTRL_DSC_ENABLE (_LCD_CTRL_DSC_ENABLE << 16) /**< Shifted mode ENABLE for LCD_CTRL */ 231 #define _LCD_CTRL_WARMUPDLY_SHIFT 18 /**< Shift value for LCD_WARMUPDLY */ 232 #define _LCD_CTRL_WARMUPDLY_MASK 0x1C0000UL /**< Bit mask for LCD_WARMUPDLY */ 233 #define _LCD_CTRL_WARMUPDLY_DEFAULT 0x00000004UL /**< Mode DEFAULT for LCD_CTRL */ 234 #define _LCD_CTRL_WARMUPDLY_WARMUP1 0x00000000UL /**< Mode WARMUP1 for LCD_CTRL */ 235 #define _LCD_CTRL_WARMUPDLY_WARMUP31 0x00000001UL /**< Mode WARMUP31 for LCD_CTRL */ 236 #define _LCD_CTRL_WARMUPDLY_WARMUP63 0x00000002UL /**< Mode WARMUP63 for LCD_CTRL */ 237 #define _LCD_CTRL_WARMUPDLY_WARMUP125 0x00000003UL /**< Mode WARMUP125 for LCD_CTRL */ 238 #define _LCD_CTRL_WARMUPDLY_WARMUP250 0x00000004UL /**< Mode WARMUP250 for LCD_CTRL */ 239 #define _LCD_CTRL_WARMUPDLY_WARMUP500 0x00000005UL /**< Mode WARMUP500 for LCD_CTRL */ 240 #define _LCD_CTRL_WARMUPDLY_WARMUP1000 0x00000006UL /**< Mode WARMUP1000 for LCD_CTRL */ 241 #define _LCD_CTRL_WARMUPDLY_WARMUP2000 0x00000007UL /**< Mode WARMUP2000 for LCD_CTRL */ 242 #define LCD_CTRL_WARMUPDLY_DEFAULT (_LCD_CTRL_WARMUPDLY_DEFAULT << 18) /**< Shifted mode DEFAULT for LCD_CTRL */ 243 #define LCD_CTRL_WARMUPDLY_WARMUP1 (_LCD_CTRL_WARMUPDLY_WARMUP1 << 18) /**< Shifted mode WARMUP1 for LCD_CTRL */ 244 #define LCD_CTRL_WARMUPDLY_WARMUP31 (_LCD_CTRL_WARMUPDLY_WARMUP31 << 18) /**< Shifted mode WARMUP31 for LCD_CTRL */ 245 #define LCD_CTRL_WARMUPDLY_WARMUP63 (_LCD_CTRL_WARMUPDLY_WARMUP63 << 18) /**< Shifted mode WARMUP63 for LCD_CTRL */ 246 #define LCD_CTRL_WARMUPDLY_WARMUP125 (_LCD_CTRL_WARMUPDLY_WARMUP125 << 18) /**< Shifted mode WARMUP125 for LCD_CTRL */ 247 #define LCD_CTRL_WARMUPDLY_WARMUP250 (_LCD_CTRL_WARMUPDLY_WARMUP250 << 18) /**< Shifted mode WARMUP250 for LCD_CTRL */ 248 #define LCD_CTRL_WARMUPDLY_WARMUP500 (_LCD_CTRL_WARMUPDLY_WARMUP500 << 18) /**< Shifted mode WARMUP500 for LCD_CTRL */ 249 #define LCD_CTRL_WARMUPDLY_WARMUP1000 (_LCD_CTRL_WARMUPDLY_WARMUP1000 << 18) /**< Shifted mode WARMUP1000 for LCD_CTRL */ 250 #define LCD_CTRL_WARMUPDLY_WARMUP2000 (_LCD_CTRL_WARMUPDLY_WARMUP2000 << 18) /**< Shifted mode WARMUP2000 for LCD_CTRL */ 251 #define _LCD_CTRL_PRESCALE_SHIFT 24 /**< Shift value for LCD_PRESCALE */ 252 #define _LCD_CTRL_PRESCALE_MASK 0x7F000000UL /**< Bit mask for LCD_PRESCALE */ 253 #define _LCD_CTRL_PRESCALE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_CTRL */ 254 #define LCD_CTRL_PRESCALE_DEFAULT (_LCD_CTRL_PRESCALE_DEFAULT << 24) /**< Shifted mode DEFAULT for LCD_CTRL */ 255 256 /* Bit fields for LCD CMD */ 257 #define _LCD_CMD_RESETVALUE 0x00000000UL /**< Default value for LCD_CMD */ 258 #define _LCD_CMD_MASK 0x00000003UL /**< Mask for LCD_CMD */ 259 #define LCD_CMD_LOAD (0x1UL << 0) /**< Load command */ 260 #define _LCD_CMD_LOAD_SHIFT 0 /**< Shift value for LCD_LOAD */ 261 #define _LCD_CMD_LOAD_MASK 0x1UL /**< Bit mask for LCD_LOAD */ 262 #define _LCD_CMD_LOAD_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_CMD */ 263 #define LCD_CMD_LOAD_DEFAULT (_LCD_CMD_LOAD_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_CMD */ 264 #define LCD_CMD_CLEAR (0x1UL << 1) /**< Clear command */ 265 #define _LCD_CMD_CLEAR_SHIFT 1 /**< Shift value for LCD_CLEAR */ 266 #define _LCD_CMD_CLEAR_MASK 0x2UL /**< Bit mask for LCD_CLEAR */ 267 #define _LCD_CMD_CLEAR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_CMD */ 268 #define LCD_CMD_CLEAR_DEFAULT (_LCD_CMD_CLEAR_DEFAULT << 1) /**< Shifted mode DEFAULT for LCD_CMD */ 269 270 /* Bit fields for LCD DISPCTRL */ 271 #define _LCD_DISPCTRL_RESETVALUE 0x00100000UL /**< Default value for LCD_DISPCTRL */ 272 #define _LCD_DISPCTRL_MASK 0x03700017UL /**< Mask for LCD_DISPCTRL */ 273 #define _LCD_DISPCTRL_MUX_SHIFT 0 /**< Shift value for LCD_MUX */ 274 #define _LCD_DISPCTRL_MUX_MASK 0x7UL /**< Bit mask for LCD_MUX */ 275 #define _LCD_DISPCTRL_MUX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_DISPCTRL */ 276 #define _LCD_DISPCTRL_MUX_STATIC 0x00000000UL /**< Mode STATIC for LCD_DISPCTRL */ 277 #define _LCD_DISPCTRL_MUX_DUPLEX 0x00000001UL /**< Mode DUPLEX for LCD_DISPCTRL */ 278 #define _LCD_DISPCTRL_MUX_TRIPLEX 0x00000002UL /**< Mode TRIPLEX for LCD_DISPCTRL */ 279 #define _LCD_DISPCTRL_MUX_QUADRUPLEX 0x00000003UL /**< Mode QUADRUPLEX for LCD_DISPCTRL */ 280 #define LCD_DISPCTRL_MUX_DEFAULT (_LCD_DISPCTRL_MUX_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_DISPCTRL */ 281 #define LCD_DISPCTRL_MUX_STATIC (_LCD_DISPCTRL_MUX_STATIC << 0) /**< Shifted mode STATIC for LCD_DISPCTRL */ 282 #define LCD_DISPCTRL_MUX_DUPLEX (_LCD_DISPCTRL_MUX_DUPLEX << 0) /**< Shifted mode DUPLEX for LCD_DISPCTRL */ 283 #define LCD_DISPCTRL_MUX_TRIPLEX (_LCD_DISPCTRL_MUX_TRIPLEX << 0) /**< Shifted mode TRIPLEX for LCD_DISPCTRL */ 284 #define LCD_DISPCTRL_MUX_QUADRUPLEX (_LCD_DISPCTRL_MUX_QUADRUPLEX << 0) /**< Shifted mode QUADRUPLEX for LCD_DISPCTRL */ 285 #define LCD_DISPCTRL_WAVE (0x1UL << 4) /**< Waveform Selection */ 286 #define _LCD_DISPCTRL_WAVE_SHIFT 4 /**< Shift value for LCD_WAVE */ 287 #define _LCD_DISPCTRL_WAVE_MASK 0x10UL /**< Bit mask for LCD_WAVE */ 288 #define _LCD_DISPCTRL_WAVE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_DISPCTRL */ 289 #define _LCD_DISPCTRL_WAVE_TYPEB 0x00000000UL /**< Mode TYPEB for LCD_DISPCTRL */ 290 #define _LCD_DISPCTRL_WAVE_TYPEA 0x00000001UL /**< Mode TYPEA for LCD_DISPCTRL */ 291 #define LCD_DISPCTRL_WAVE_DEFAULT (_LCD_DISPCTRL_WAVE_DEFAULT << 4) /**< Shifted mode DEFAULT for LCD_DISPCTRL */ 292 #define LCD_DISPCTRL_WAVE_TYPEB (_LCD_DISPCTRL_WAVE_TYPEB << 4) /**< Shifted mode TYPEB for LCD_DISPCTRL */ 293 #define LCD_DISPCTRL_WAVE_TYPEA (_LCD_DISPCTRL_WAVE_TYPEA << 4) /**< Shifted mode TYPEA for LCD_DISPCTRL */ 294 #define _LCD_DISPCTRL_CHGRDST_SHIFT 20 /**< Shift value for LCD_CHGRDST */ 295 #define _LCD_DISPCTRL_CHGRDST_MASK 0x700000UL /**< Bit mask for LCD_CHGRDST */ 296 #define _LCD_DISPCTRL_CHGRDST_DEFAULT 0x00000001UL /**< Mode DEFAULT for LCD_DISPCTRL */ 297 #define _LCD_DISPCTRL_CHGRDST_DISABLE 0x00000000UL /**< Mode DISABLE for LCD_DISPCTRL */ 298 #define _LCD_DISPCTRL_CHGRDST_ONE 0x00000001UL /**< Mode ONE for LCD_DISPCTRL */ 299 #define _LCD_DISPCTRL_CHGRDST_TWO 0x00000002UL /**< Mode TWO for LCD_DISPCTRL */ 300 #define _LCD_DISPCTRL_CHGRDST_THREE 0x00000003UL /**< Mode THREE for LCD_DISPCTRL */ 301 #define _LCD_DISPCTRL_CHGRDST_FOUR 0x00000004UL /**< Mode FOUR for LCD_DISPCTRL */ 302 #define LCD_DISPCTRL_CHGRDST_DEFAULT (_LCD_DISPCTRL_CHGRDST_DEFAULT << 20) /**< Shifted mode DEFAULT for LCD_DISPCTRL */ 303 #define LCD_DISPCTRL_CHGRDST_DISABLE (_LCD_DISPCTRL_CHGRDST_DISABLE << 20) /**< Shifted mode DISABLE for LCD_DISPCTRL */ 304 #define LCD_DISPCTRL_CHGRDST_ONE (_LCD_DISPCTRL_CHGRDST_ONE << 20) /**< Shifted mode ONE for LCD_DISPCTRL */ 305 #define LCD_DISPCTRL_CHGRDST_TWO (_LCD_DISPCTRL_CHGRDST_TWO << 20) /**< Shifted mode TWO for LCD_DISPCTRL */ 306 #define LCD_DISPCTRL_CHGRDST_THREE (_LCD_DISPCTRL_CHGRDST_THREE << 20) /**< Shifted mode THREE for LCD_DISPCTRL */ 307 #define LCD_DISPCTRL_CHGRDST_FOUR (_LCD_DISPCTRL_CHGRDST_FOUR << 20) /**< Shifted mode FOUR for LCD_DISPCTRL */ 308 #define _LCD_DISPCTRL_BIAS_SHIFT 24 /**< Shift value for LCD_BIAS */ 309 #define _LCD_DISPCTRL_BIAS_MASK 0x3000000UL /**< Bit mask for LCD_BIAS */ 310 #define _LCD_DISPCTRL_BIAS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_DISPCTRL */ 311 #define _LCD_DISPCTRL_BIAS_STATIC 0x00000000UL /**< Mode STATIC for LCD_DISPCTRL */ 312 #define _LCD_DISPCTRL_BIAS_ONEHALF 0x00000001UL /**< Mode ONEHALF for LCD_DISPCTRL */ 313 #define _LCD_DISPCTRL_BIAS_ONETHIRD 0x00000002UL /**< Mode ONETHIRD for LCD_DISPCTRL */ 314 #define _LCD_DISPCTRL_BIAS_ONEFOURTH 0x00000003UL /**< Mode ONEFOURTH for LCD_DISPCTRL */ 315 #define LCD_DISPCTRL_BIAS_DEFAULT (_LCD_DISPCTRL_BIAS_DEFAULT << 24) /**< Shifted mode DEFAULT for LCD_DISPCTRL */ 316 #define LCD_DISPCTRL_BIAS_STATIC (_LCD_DISPCTRL_BIAS_STATIC << 24) /**< Shifted mode STATIC for LCD_DISPCTRL */ 317 #define LCD_DISPCTRL_BIAS_ONEHALF (_LCD_DISPCTRL_BIAS_ONEHALF << 24) /**< Shifted mode ONEHALF for LCD_DISPCTRL */ 318 #define LCD_DISPCTRL_BIAS_ONETHIRD (_LCD_DISPCTRL_BIAS_ONETHIRD << 24) /**< Shifted mode ONETHIRD for LCD_DISPCTRL */ 319 #define LCD_DISPCTRL_BIAS_ONEFOURTH (_LCD_DISPCTRL_BIAS_ONEFOURTH << 24) /**< Shifted mode ONEFOURTH for LCD_DISPCTRL */ 320 321 /* Bit fields for LCD BACFG */ 322 #define _LCD_BACFG_RESETVALUE 0x00000007UL /**< Default value for LCD_BACFG */ 323 #define _LCD_BACFG_MASK 0x00FF0007UL /**< Mask for LCD_BACFG */ 324 #define _LCD_BACFG_ASTATETOP_SHIFT 0 /**< Shift value for LCD_ASTATETOP */ 325 #define _LCD_BACFG_ASTATETOP_MASK 0x7UL /**< Bit mask for LCD_ASTATETOP */ 326 #define _LCD_BACFG_ASTATETOP_DEFAULT 0x00000007UL /**< Mode DEFAULT for LCD_BACFG */ 327 #define LCD_BACFG_ASTATETOP_DEFAULT (_LCD_BACFG_ASTATETOP_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_BACFG */ 328 #define _LCD_BACFG_FCPRESC_SHIFT 16 /**< Shift value for LCD_FCPRESC */ 329 #define _LCD_BACFG_FCPRESC_MASK 0x30000UL /**< Bit mask for LCD_FCPRESC */ 330 #define _LCD_BACFG_FCPRESC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACFG */ 331 #define _LCD_BACFG_FCPRESC_DIV1 0x00000000UL /**< Mode DIV1 for LCD_BACFG */ 332 #define _LCD_BACFG_FCPRESC_DIV2 0x00000001UL /**< Mode DIV2 for LCD_BACFG */ 333 #define _LCD_BACFG_FCPRESC_DIV4 0x00000002UL /**< Mode DIV4 for LCD_BACFG */ 334 #define _LCD_BACFG_FCPRESC_DIV8 0x00000003UL /**< Mode DIV8 for LCD_BACFG */ 335 #define LCD_BACFG_FCPRESC_DEFAULT (_LCD_BACFG_FCPRESC_DEFAULT << 16) /**< Shifted mode DEFAULT for LCD_BACFG */ 336 #define LCD_BACFG_FCPRESC_DIV1 (_LCD_BACFG_FCPRESC_DIV1 << 16) /**< Shifted mode DIV1 for LCD_BACFG */ 337 #define LCD_BACFG_FCPRESC_DIV2 (_LCD_BACFG_FCPRESC_DIV2 << 16) /**< Shifted mode DIV2 for LCD_BACFG */ 338 #define LCD_BACFG_FCPRESC_DIV4 (_LCD_BACFG_FCPRESC_DIV4 << 16) /**< Shifted mode DIV4 for LCD_BACFG */ 339 #define LCD_BACFG_FCPRESC_DIV8 (_LCD_BACFG_FCPRESC_DIV8 << 16) /**< Shifted mode DIV8 for LCD_BACFG */ 340 #define _LCD_BACFG_FCTOP_SHIFT 18 /**< Shift value for LCD_FCTOP */ 341 #define _LCD_BACFG_FCTOP_MASK 0xFC0000UL /**< Bit mask for LCD_FCTOP */ 342 #define _LCD_BACFG_FCTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACFG */ 343 #define LCD_BACFG_FCTOP_DEFAULT (_LCD_BACFG_FCTOP_DEFAULT << 18) /**< Shifted mode DEFAULT for LCD_BACFG */ 344 345 /* Bit fields for LCD BACTRL */ 346 #define _LCD_BACTRL_RESETVALUE 0x00000000UL /**< Default value for LCD_BACTRL */ 347 #define _LCD_BACTRL_MASK 0x100003FFUL /**< Mask for LCD_BACTRL */ 348 #define LCD_BACTRL_BLINKEN (0x1UL << 0) /**< Blink Enable */ 349 #define _LCD_BACTRL_BLINKEN_SHIFT 0 /**< Shift value for LCD_BLINKEN */ 350 #define _LCD_BACTRL_BLINKEN_MASK 0x1UL /**< Bit mask for LCD_BLINKEN */ 351 #define _LCD_BACTRL_BLINKEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */ 352 #define LCD_BACTRL_BLINKEN_DEFAULT (_LCD_BACTRL_BLINKEN_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_BACTRL */ 353 #define LCD_BACTRL_BLANK (0x1UL << 1) /**< Blank Display */ 354 #define _LCD_BACTRL_BLANK_SHIFT 1 /**< Shift value for LCD_BLANK */ 355 #define _LCD_BACTRL_BLANK_MASK 0x2UL /**< Bit mask for LCD_BLANK */ 356 #define _LCD_BACTRL_BLANK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */ 357 #define _LCD_BACTRL_BLANK_DISABLE 0x00000000UL /**< Mode DISABLE for LCD_BACTRL */ 358 #define _LCD_BACTRL_BLANK_ENABLE 0x00000001UL /**< Mode ENABLE for LCD_BACTRL */ 359 #define LCD_BACTRL_BLANK_DEFAULT (_LCD_BACTRL_BLANK_DEFAULT << 1) /**< Shifted mode DEFAULT for LCD_BACTRL */ 360 #define LCD_BACTRL_BLANK_DISABLE (_LCD_BACTRL_BLANK_DISABLE << 1) /**< Shifted mode DISABLE for LCD_BACTRL */ 361 #define LCD_BACTRL_BLANK_ENABLE (_LCD_BACTRL_BLANK_ENABLE << 1) /**< Shifted mode ENABLE for LCD_BACTRL */ 362 #define LCD_BACTRL_AEN (0x1UL << 2) /**< Animation Enable */ 363 #define _LCD_BACTRL_AEN_SHIFT 2 /**< Shift value for LCD_AEN */ 364 #define _LCD_BACTRL_AEN_MASK 0x4UL /**< Bit mask for LCD_AEN */ 365 #define _LCD_BACTRL_AEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */ 366 #define LCD_BACTRL_AEN_DEFAULT (_LCD_BACTRL_AEN_DEFAULT << 2) /**< Shifted mode DEFAULT for LCD_BACTRL */ 367 #define _LCD_BACTRL_AREGASC_SHIFT 3 /**< Shift value for LCD_AREGASC */ 368 #define _LCD_BACTRL_AREGASC_MASK 0x18UL /**< Bit mask for LCD_AREGASC */ 369 #define _LCD_BACTRL_AREGASC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */ 370 #define _LCD_BACTRL_AREGASC_NOSHIFT 0x00000000UL /**< Mode NOSHIFT for LCD_BACTRL */ 371 #define _LCD_BACTRL_AREGASC_SHIFTLEFT 0x00000001UL /**< Mode SHIFTLEFT for LCD_BACTRL */ 372 #define _LCD_BACTRL_AREGASC_SHIFTRIGHT 0x00000002UL /**< Mode SHIFTRIGHT for LCD_BACTRL */ 373 #define LCD_BACTRL_AREGASC_DEFAULT (_LCD_BACTRL_AREGASC_DEFAULT << 3) /**< Shifted mode DEFAULT for LCD_BACTRL */ 374 #define LCD_BACTRL_AREGASC_NOSHIFT (_LCD_BACTRL_AREGASC_NOSHIFT << 3) /**< Shifted mode NOSHIFT for LCD_BACTRL */ 375 #define LCD_BACTRL_AREGASC_SHIFTLEFT (_LCD_BACTRL_AREGASC_SHIFTLEFT << 3) /**< Shifted mode SHIFTLEFT for LCD_BACTRL */ 376 #define LCD_BACTRL_AREGASC_SHIFTRIGHT (_LCD_BACTRL_AREGASC_SHIFTRIGHT << 3) /**< Shifted mode SHIFTRIGHT for LCD_BACTRL */ 377 #define _LCD_BACTRL_AREGBSC_SHIFT 5 /**< Shift value for LCD_AREGBSC */ 378 #define _LCD_BACTRL_AREGBSC_MASK 0x60UL /**< Bit mask for LCD_AREGBSC */ 379 #define _LCD_BACTRL_AREGBSC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */ 380 #define _LCD_BACTRL_AREGBSC_NOSHIFT 0x00000000UL /**< Mode NOSHIFT for LCD_BACTRL */ 381 #define _LCD_BACTRL_AREGBSC_SHIFTLEFT 0x00000001UL /**< Mode SHIFTLEFT for LCD_BACTRL */ 382 #define _LCD_BACTRL_AREGBSC_SHIFTRIGHT 0x00000002UL /**< Mode SHIFTRIGHT for LCD_BACTRL */ 383 #define LCD_BACTRL_AREGBSC_DEFAULT (_LCD_BACTRL_AREGBSC_DEFAULT << 5) /**< Shifted mode DEFAULT for LCD_BACTRL */ 384 #define LCD_BACTRL_AREGBSC_NOSHIFT (_LCD_BACTRL_AREGBSC_NOSHIFT << 5) /**< Shifted mode NOSHIFT for LCD_BACTRL */ 385 #define LCD_BACTRL_AREGBSC_SHIFTLEFT (_LCD_BACTRL_AREGBSC_SHIFTLEFT << 5) /**< Shifted mode SHIFTLEFT for LCD_BACTRL */ 386 #define LCD_BACTRL_AREGBSC_SHIFTRIGHT (_LCD_BACTRL_AREGBSC_SHIFTRIGHT << 5) /**< Shifted mode SHIFTRIGHT for LCD_BACTRL */ 387 #define LCD_BACTRL_ALOGSEL (0x1UL << 7) /**< Animate Logic Function Select */ 388 #define _LCD_BACTRL_ALOGSEL_SHIFT 7 /**< Shift value for LCD_ALOGSEL */ 389 #define _LCD_BACTRL_ALOGSEL_MASK 0x80UL /**< Bit mask for LCD_ALOGSEL */ 390 #define _LCD_BACTRL_ALOGSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */ 391 #define _LCD_BACTRL_ALOGSEL_AND 0x00000000UL /**< Mode AND for LCD_BACTRL */ 392 #define _LCD_BACTRL_ALOGSEL_OR 0x00000001UL /**< Mode OR for LCD_BACTRL */ 393 #define LCD_BACTRL_ALOGSEL_DEFAULT (_LCD_BACTRL_ALOGSEL_DEFAULT << 7) /**< Shifted mode DEFAULT for LCD_BACTRL */ 394 #define LCD_BACTRL_ALOGSEL_AND (_LCD_BACTRL_ALOGSEL_AND << 7) /**< Shifted mode AND for LCD_BACTRL */ 395 #define LCD_BACTRL_ALOGSEL_OR (_LCD_BACTRL_ALOGSEL_OR << 7) /**< Shifted mode OR for LCD_BACTRL */ 396 #define LCD_BACTRL_FCEN (0x1UL << 8) /**< Frame Counter Enable */ 397 #define _LCD_BACTRL_FCEN_SHIFT 8 /**< Shift value for LCD_FCEN */ 398 #define _LCD_BACTRL_FCEN_MASK 0x100UL /**< Bit mask for LCD_FCEN */ 399 #define _LCD_BACTRL_FCEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */ 400 #define LCD_BACTRL_FCEN_DEFAULT (_LCD_BACTRL_FCEN_DEFAULT << 8) /**< Shifted mode DEFAULT for LCD_BACTRL */ 401 #define LCD_BACTRL_DISPLAYCNTEN (0x1UL << 9) /**< Display Counter Enable */ 402 #define _LCD_BACTRL_DISPLAYCNTEN_SHIFT 9 /**< Shift value for LCD_DISPLAYCNTEN */ 403 #define _LCD_BACTRL_DISPLAYCNTEN_MASK 0x200UL /**< Bit mask for LCD_DISPLAYCNTEN */ 404 #define _LCD_BACTRL_DISPLAYCNTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */ 405 #define _LCD_BACTRL_DISPLAYCNTEN_DISABLE 0x00000000UL /**< Mode DISABLE for LCD_BACTRL */ 406 #define _LCD_BACTRL_DISPLAYCNTEN_ENABLE 0x00000001UL /**< Mode ENABLE for LCD_BACTRL */ 407 #define LCD_BACTRL_DISPLAYCNTEN_DEFAULT (_LCD_BACTRL_DISPLAYCNTEN_DEFAULT << 9) /**< Shifted mode DEFAULT for LCD_BACTRL */ 408 #define LCD_BACTRL_DISPLAYCNTEN_DISABLE (_LCD_BACTRL_DISPLAYCNTEN_DISABLE << 9) /**< Shifted mode DISABLE for LCD_BACTRL */ 409 #define LCD_BACTRL_DISPLAYCNTEN_ENABLE (_LCD_BACTRL_DISPLAYCNTEN_ENABLE << 9) /**< Shifted mode ENABLE for LCD_BACTRL */ 410 #define LCD_BACTRL_ALOC (0x1UL << 28) /**< Animation Location */ 411 #define _LCD_BACTRL_ALOC_SHIFT 28 /**< Shift value for LCD_ALOC */ 412 #define _LCD_BACTRL_ALOC_MASK 0x10000000UL /**< Bit mask for LCD_ALOC */ 413 #define _LCD_BACTRL_ALOC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */ 414 #define _LCD_BACTRL_ALOC_SEG0TO7 0x00000000UL /**< Mode SEG0TO7 for LCD_BACTRL */ 415 #define _LCD_BACTRL_ALOC_SEG8TO15 0x00000001UL /**< Mode SEG8TO15 for LCD_BACTRL */ 416 #define LCD_BACTRL_ALOC_DEFAULT (_LCD_BACTRL_ALOC_DEFAULT << 28) /**< Shifted mode DEFAULT for LCD_BACTRL */ 417 #define LCD_BACTRL_ALOC_SEG0TO7 (_LCD_BACTRL_ALOC_SEG0TO7 << 28) /**< Shifted mode SEG0TO7 for LCD_BACTRL */ 418 #define LCD_BACTRL_ALOC_SEG8TO15 (_LCD_BACTRL_ALOC_SEG8TO15 << 28) /**< Shifted mode SEG8TO15 for LCD_BACTRL */ 419 420 /* Bit fields for LCD STATUS */ 421 #define _LCD_STATUS_RESETVALUE 0x00000000UL /**< Default value for LCD_STATUS */ 422 #define _LCD_STATUS_MASK 0x0000090FUL /**< Mask for LCD_STATUS */ 423 #define _LCD_STATUS_ASTATE_SHIFT 0 /**< Shift value for LCD_ASTATE */ 424 #define _LCD_STATUS_ASTATE_MASK 0xFUL /**< Bit mask for LCD_ASTATE */ 425 #define _LCD_STATUS_ASTATE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_STATUS */ 426 #define LCD_STATUS_ASTATE_DEFAULT (_LCD_STATUS_ASTATE_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_STATUS */ 427 #define LCD_STATUS_BLINK (0x1UL << 8) /**< Blink State */ 428 #define _LCD_STATUS_BLINK_SHIFT 8 /**< Shift value for LCD_BLINK */ 429 #define _LCD_STATUS_BLINK_MASK 0x100UL /**< Bit mask for LCD_BLINK */ 430 #define _LCD_STATUS_BLINK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_STATUS */ 431 #define LCD_STATUS_BLINK_DEFAULT (_LCD_STATUS_BLINK_DEFAULT << 8) /**< Shifted mode DEFAULT for LCD_STATUS */ 432 #define LCD_STATUS_LOADBUSY (0x1UL << 11) /**< Load Synchronization is busy */ 433 #define _LCD_STATUS_LOADBUSY_SHIFT 11 /**< Shift value for LCD_LOADBUSY */ 434 #define _LCD_STATUS_LOADBUSY_MASK 0x800UL /**< Bit mask for LCD_LOADBUSY */ 435 #define _LCD_STATUS_LOADBUSY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_STATUS */ 436 #define LCD_STATUS_LOADBUSY_DEFAULT (_LCD_STATUS_LOADBUSY_DEFAULT << 11) /**< Shifted mode DEFAULT for LCD_STATUS */ 437 438 /* Bit fields for LCD AREGA */ 439 #define _LCD_AREGA_RESETVALUE 0x00000000UL /**< Default value for LCD_AREGA */ 440 #define _LCD_AREGA_MASK 0x000000FFUL /**< Mask for LCD_AREGA */ 441 #define _LCD_AREGA_AREGA_SHIFT 0 /**< Shift value for LCD_AREGA */ 442 #define _LCD_AREGA_AREGA_MASK 0xFFUL /**< Bit mask for LCD_AREGA */ 443 #define _LCD_AREGA_AREGA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_AREGA */ 444 #define LCD_AREGA_AREGA_DEFAULT (_LCD_AREGA_AREGA_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_AREGA */ 445 446 /* Bit fields for LCD AREGB */ 447 #define _LCD_AREGB_RESETVALUE 0x00000000UL /**< Default value for LCD_AREGB */ 448 #define _LCD_AREGB_MASK 0x000000FFUL /**< Mask for LCD_AREGB */ 449 #define _LCD_AREGB_AREGB_SHIFT 0 /**< Shift value for LCD_AREGB */ 450 #define _LCD_AREGB_AREGB_MASK 0xFFUL /**< Bit mask for LCD_AREGB */ 451 #define _LCD_AREGB_AREGB_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_AREGB */ 452 #define LCD_AREGB_AREGB_DEFAULT (_LCD_AREGB_AREGB_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_AREGB */ 453 454 /* Bit fields for LCD IF */ 455 #define _LCD_IF_RESETVALUE 0x00000000UL /**< Default value for LCD_IF */ 456 #define _LCD_IF_MASK 0x00000007UL /**< Mask for LCD_IF */ 457 #define LCD_IF_FC (0x1UL << 0) /**< Frame Counter */ 458 #define _LCD_IF_FC_SHIFT 0 /**< Shift value for LCD_FC */ 459 #define _LCD_IF_FC_MASK 0x1UL /**< Bit mask for LCD_FC */ 460 #define _LCD_IF_FC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_IF */ 461 #define LCD_IF_FC_DEFAULT (_LCD_IF_FC_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_IF */ 462 #define LCD_IF_DISPLAY (0x1UL << 1) /**< Display Update Event */ 463 #define _LCD_IF_DISPLAY_SHIFT 1 /**< Shift value for LCD_DISPLAY */ 464 #define _LCD_IF_DISPLAY_MASK 0x2UL /**< Bit mask for LCD_DISPLAY */ 465 #define _LCD_IF_DISPLAY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_IF */ 466 #define LCD_IF_DISPLAY_DEFAULT (_LCD_IF_DISPLAY_DEFAULT << 1) /**< Shifted mode DEFAULT for LCD_IF */ 467 #define LCD_IF_SYNCBUSYDONE (0x1UL << 2) /**< Synchronization is Done */ 468 #define _LCD_IF_SYNCBUSYDONE_SHIFT 2 /**< Shift value for LCD_SYNCBUSYDONE */ 469 #define _LCD_IF_SYNCBUSYDONE_MASK 0x4UL /**< Bit mask for LCD_SYNCBUSYDONE */ 470 #define _LCD_IF_SYNCBUSYDONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_IF */ 471 #define LCD_IF_SYNCBUSYDONE_DEFAULT (_LCD_IF_SYNCBUSYDONE_DEFAULT << 2) /**< Shifted mode DEFAULT for LCD_IF */ 472 473 /* Bit fields for LCD IEN */ 474 #define _LCD_IEN_RESETVALUE 0x00000000UL /**< Default value for LCD_IEN */ 475 #define _LCD_IEN_MASK 0x00000007UL /**< Mask for LCD_IEN */ 476 #define LCD_IEN_FC (0x1UL << 0) /**< Frame Counter */ 477 #define _LCD_IEN_FC_SHIFT 0 /**< Shift value for LCD_FC */ 478 #define _LCD_IEN_FC_MASK 0x1UL /**< Bit mask for LCD_FC */ 479 #define _LCD_IEN_FC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_IEN */ 480 #define LCD_IEN_FC_DEFAULT (_LCD_IEN_FC_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_IEN */ 481 #define LCD_IEN_DISPLAY (0x1UL << 1) /**< Display Update Event */ 482 #define _LCD_IEN_DISPLAY_SHIFT 1 /**< Shift value for LCD_DISPLAY */ 483 #define _LCD_IEN_DISPLAY_MASK 0x2UL /**< Bit mask for LCD_DISPLAY */ 484 #define _LCD_IEN_DISPLAY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_IEN */ 485 #define LCD_IEN_DISPLAY_DEFAULT (_LCD_IEN_DISPLAY_DEFAULT << 1) /**< Shifted mode DEFAULT for LCD_IEN */ 486 #define LCD_IEN_SYNCBUSYDONE (0x1UL << 2) /**< Sync Busy Done */ 487 #define _LCD_IEN_SYNCBUSYDONE_SHIFT 2 /**< Shift value for LCD_SYNCBUSYDONE */ 488 #define _LCD_IEN_SYNCBUSYDONE_MASK 0x4UL /**< Bit mask for LCD_SYNCBUSYDONE */ 489 #define _LCD_IEN_SYNCBUSYDONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_IEN */ 490 #define LCD_IEN_SYNCBUSYDONE_DEFAULT (_LCD_IEN_SYNCBUSYDONE_DEFAULT << 2) /**< Shifted mode DEFAULT for LCD_IEN */ 491 492 /* Bit fields for LCD BIASCTRL */ 493 #define _LCD_BIASCTRL_RESETVALUE 0x001F0000UL /**< Default value for LCD_BIASCTRL */ 494 #define _LCD_BIASCTRL_MASK 0xC45F137FUL /**< Mask for LCD_BIASCTRL */ 495 #define _LCD_BIASCTRL_RESISTOR_SHIFT 0 /**< Shift value for LCD_RESISTOR */ 496 #define _LCD_BIASCTRL_RESISTOR_MASK 0xFUL /**< Bit mask for LCD_RESISTOR */ 497 #define _LCD_BIASCTRL_RESISTOR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BIASCTRL */ 498 #define LCD_BIASCTRL_RESISTOR_DEFAULT (_LCD_BIASCTRL_RESISTOR_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_BIASCTRL */ 499 #define _LCD_BIASCTRL_BUFDRV_SHIFT 4 /**< Shift value for LCD_BUFDRV */ 500 #define _LCD_BIASCTRL_BUFDRV_MASK 0x70UL /**< Bit mask for LCD_BUFDRV */ 501 #define _LCD_BIASCTRL_BUFDRV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BIASCTRL */ 502 #define LCD_BIASCTRL_BUFDRV_DEFAULT (_LCD_BIASCTRL_BUFDRV_DEFAULT << 4) /**< Shifted mode DEFAULT for LCD_BIASCTRL */ 503 #define _LCD_BIASCTRL_BUFBIAS_SHIFT 8 /**< Shift value for LCD_BUFBIAS */ 504 #define _LCD_BIASCTRL_BUFBIAS_MASK 0x300UL /**< Bit mask for LCD_BUFBIAS */ 505 #define _LCD_BIASCTRL_BUFBIAS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BIASCTRL */ 506 #define LCD_BIASCTRL_BUFBIAS_DEFAULT (_LCD_BIASCTRL_BUFBIAS_DEFAULT << 8) /**< Shifted mode DEFAULT for LCD_BIASCTRL */ 507 #define LCD_BIASCTRL_MODE (0x1UL << 12) /**< Mode Setting */ 508 #define _LCD_BIASCTRL_MODE_SHIFT 12 /**< Shift value for LCD_MODE */ 509 #define _LCD_BIASCTRL_MODE_MASK 0x1000UL /**< Bit mask for LCD_MODE */ 510 #define _LCD_BIASCTRL_MODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BIASCTRL */ 511 #define _LCD_BIASCTRL_MODE_STEPDOWN 0x00000000UL /**< Mode STEPDOWN for LCD_BIASCTRL */ 512 #define _LCD_BIASCTRL_MODE_CHARGEPUMP 0x00000001UL /**< Mode CHARGEPUMP for LCD_BIASCTRL */ 513 #define LCD_BIASCTRL_MODE_DEFAULT (_LCD_BIASCTRL_MODE_DEFAULT << 12) /**< Shifted mode DEFAULT for LCD_BIASCTRL */ 514 #define LCD_BIASCTRL_MODE_STEPDOWN (_LCD_BIASCTRL_MODE_STEPDOWN << 12) /**< Shifted mode STEPDOWN for LCD_BIASCTRL */ 515 #define LCD_BIASCTRL_MODE_CHARGEPUMP (_LCD_BIASCTRL_MODE_CHARGEPUMP << 12) /**< Shifted mode CHARGEPUMP for LCD_BIASCTRL */ 516 #define _LCD_BIASCTRL_VLCD_SHIFT 16 /**< Shift value for LCD_VLCD */ 517 #define _LCD_BIASCTRL_VLCD_MASK 0x1F0000UL /**< Bit mask for LCD_VLCD */ 518 #define _LCD_BIASCTRL_VLCD_DEFAULT 0x0000001FUL /**< Mode DEFAULT for LCD_BIASCTRL */ 519 #define LCD_BIASCTRL_VLCD_DEFAULT (_LCD_BIASCTRL_VLCD_DEFAULT << 16) /**< Shifted mode DEFAULT for LCD_BIASCTRL */ 520 #define LCD_BIASCTRL_VDDXSEL (0x1UL << 22) /**< VDDX select */ 521 #define _LCD_BIASCTRL_VDDXSEL_SHIFT 22 /**< Shift value for LCD_VDDXSEL */ 522 #define _LCD_BIASCTRL_VDDXSEL_MASK 0x400000UL /**< Bit mask for LCD_VDDXSEL */ 523 #define _LCD_BIASCTRL_VDDXSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BIASCTRL */ 524 #define _LCD_BIASCTRL_VDDXSEL_DVDD 0x00000000UL /**< Mode DVDD for LCD_BIASCTRL */ 525 #define _LCD_BIASCTRL_VDDXSEL_AVDD 0x00000001UL /**< Mode AVDD for LCD_BIASCTRL */ 526 #define LCD_BIASCTRL_VDDXSEL_DEFAULT (_LCD_BIASCTRL_VDDXSEL_DEFAULT << 22) /**< Shifted mode DEFAULT for LCD_BIASCTRL */ 527 #define LCD_BIASCTRL_VDDXSEL_DVDD (_LCD_BIASCTRL_VDDXSEL_DVDD << 22) /**< Shifted mode DVDD for LCD_BIASCTRL */ 528 #define LCD_BIASCTRL_VDDXSEL_AVDD (_LCD_BIASCTRL_VDDXSEL_AVDD << 22) /**< Shifted mode AVDD for LCD_BIASCTRL */ 529 #define LCD_BIASCTRL_LCDGATE (0x1UL << 26) /**< LCD Gate */ 530 #define _LCD_BIASCTRL_LCDGATE_SHIFT 26 /**< Shift value for LCD_LCDGATE */ 531 #define _LCD_BIASCTRL_LCDGATE_MASK 0x4000000UL /**< Bit mask for LCD_LCDGATE */ 532 #define _LCD_BIASCTRL_LCDGATE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BIASCTRL */ 533 #define _LCD_BIASCTRL_LCDGATE_UNGATE 0x00000000UL /**< Mode UNGATE for LCD_BIASCTRL */ 534 #define _LCD_BIASCTRL_LCDGATE_GATE 0x00000001UL /**< Mode GATE for LCD_BIASCTRL */ 535 #define LCD_BIASCTRL_LCDGATE_DEFAULT (_LCD_BIASCTRL_LCDGATE_DEFAULT << 26) /**< Shifted mode DEFAULT for LCD_BIASCTRL */ 536 #define LCD_BIASCTRL_LCDGATE_UNGATE (_LCD_BIASCTRL_LCDGATE_UNGATE << 26) /**< Shifted mode UNGATE for LCD_BIASCTRL */ 537 #define LCD_BIASCTRL_LCDGATE_GATE (_LCD_BIASCTRL_LCDGATE_GATE << 26) /**< Shifted mode GATE for LCD_BIASCTRL */ 538 #define _LCD_BIASCTRL_DMAMODE_SHIFT 30 /**< Shift value for LCD_DMAMODE */ 539 #define _LCD_BIASCTRL_DMAMODE_MASK 0xC0000000UL /**< Bit mask for LCD_DMAMODE */ 540 #define _LCD_BIASCTRL_DMAMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BIASCTRL */ 541 #define _LCD_BIASCTRL_DMAMODE_DMADISABLE 0x00000000UL /**< Mode DMADISABLE for LCD_BIASCTRL */ 542 #define _LCD_BIASCTRL_DMAMODE_DMAFC 0x00000001UL /**< Mode DMAFC for LCD_BIASCTRL */ 543 #define _LCD_BIASCTRL_DMAMODE_DMADISPLAY 0x00000002UL /**< Mode DMADISPLAY for LCD_BIASCTRL */ 544 #define LCD_BIASCTRL_DMAMODE_DEFAULT (_LCD_BIASCTRL_DMAMODE_DEFAULT << 30) /**< Shifted mode DEFAULT for LCD_BIASCTRL */ 545 #define LCD_BIASCTRL_DMAMODE_DMADISABLE (_LCD_BIASCTRL_DMAMODE_DMADISABLE << 30) /**< Shifted mode DMADISABLE for LCD_BIASCTRL */ 546 #define LCD_BIASCTRL_DMAMODE_DMAFC (_LCD_BIASCTRL_DMAMODE_DMAFC << 30) /**< Shifted mode DMAFC for LCD_BIASCTRL */ 547 #define LCD_BIASCTRL_DMAMODE_DMADISPLAY (_LCD_BIASCTRL_DMAMODE_DMADISPLAY << 30) /**< Shifted mode DMADISPLAY for LCD_BIASCTRL */ 548 549 /* Bit fields for LCD DISPCTRLX */ 550 #define _LCD_DISPCTRLX_RESETVALUE 0x00000000UL /**< Default value for LCD_DISPCTRLX */ 551 #define _LCD_DISPCTRLX_MASK 0x000003FFUL /**< Mask for LCD_DISPCTRLX */ 552 #define _LCD_DISPCTRLX_DISPLAYDIV_SHIFT 0 /**< Shift value for LCD_DISPLAYDIV */ 553 #define _LCD_DISPCTRLX_DISPLAYDIV_MASK 0x3FFUL /**< Bit mask for LCD_DISPLAYDIV */ 554 #define _LCD_DISPCTRLX_DISPLAYDIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_DISPCTRLX */ 555 #define LCD_DISPCTRLX_DISPLAYDIV_DEFAULT (_LCD_DISPCTRLX_DISPLAYDIV_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_DISPCTRLX */ 556 557 /* Bit fields for LCD SEGD0 */ 558 #define _LCD_SEGD0_RESETVALUE 0x00000000UL /**< Default value for LCD_SEGD0 */ 559 #define _LCD_SEGD0_MASK 0x000FFFFFUL /**< Mask for LCD_SEGD0 */ 560 #define _LCD_SEGD0_SEGD0_SHIFT 0 /**< Shift value for LCD_SEGD0 */ 561 #define _LCD_SEGD0_SEGD0_MASK 0xFFFFFUL /**< Bit mask for LCD_SEGD0 */ 562 #define _LCD_SEGD0_SEGD0_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SEGD0 */ 563 #define LCD_SEGD0_SEGD0_DEFAULT (_LCD_SEGD0_SEGD0_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_SEGD0 */ 564 565 /* Bit fields for LCD SEGD1 */ 566 #define _LCD_SEGD1_RESETVALUE 0x00000000UL /**< Default value for LCD_SEGD1 */ 567 #define _LCD_SEGD1_MASK 0x000FFFFFUL /**< Mask for LCD_SEGD1 */ 568 #define _LCD_SEGD1_SEGD1_SHIFT 0 /**< Shift value for LCD_SEGD1 */ 569 #define _LCD_SEGD1_SEGD1_MASK 0xFFFFFUL /**< Bit mask for LCD_SEGD1 */ 570 #define _LCD_SEGD1_SEGD1_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SEGD1 */ 571 #define LCD_SEGD1_SEGD1_DEFAULT (_LCD_SEGD1_SEGD1_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_SEGD1 */ 572 573 /* Bit fields for LCD SEGD2 */ 574 #define _LCD_SEGD2_RESETVALUE 0x00000000UL /**< Default value for LCD_SEGD2 */ 575 #define _LCD_SEGD2_MASK 0x000FFFFFUL /**< Mask for LCD_SEGD2 */ 576 #define _LCD_SEGD2_SEGD2_SHIFT 0 /**< Shift value for LCD_SEGD2 */ 577 #define _LCD_SEGD2_SEGD2_MASK 0xFFFFFUL /**< Bit mask for LCD_SEGD2 */ 578 #define _LCD_SEGD2_SEGD2_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SEGD2 */ 579 #define LCD_SEGD2_SEGD2_DEFAULT (_LCD_SEGD2_SEGD2_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_SEGD2 */ 580 581 /* Bit fields for LCD SEGD3 */ 582 #define _LCD_SEGD3_RESETVALUE 0x00000000UL /**< Default value for LCD_SEGD3 */ 583 #define _LCD_SEGD3_MASK 0x000FFFFFUL /**< Mask for LCD_SEGD3 */ 584 #define _LCD_SEGD3_SEGD3_SHIFT 0 /**< Shift value for LCD_SEGD3 */ 585 #define _LCD_SEGD3_SEGD3_MASK 0xFFFFFUL /**< Bit mask for LCD_SEGD3 */ 586 #define _LCD_SEGD3_SEGD3_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SEGD3 */ 587 #define LCD_SEGD3_SEGD3_DEFAULT (_LCD_SEGD3_SEGD3_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_SEGD3 */ 588 589 /* Bit fields for LCD UPDATECTRL */ 590 #define _LCD_UPDATECTRL_RESETVALUE 0x00000000UL /**< Default value for LCD_UPDATECTRL */ 591 #define _LCD_UPDATECTRL_MASK 0x0001E100UL /**< Mask for LCD_UPDATECTRL */ 592 #define LCD_UPDATECTRL_AUTOLOAD (0x1UL << 8) /**< Auto Load */ 593 #define _LCD_UPDATECTRL_AUTOLOAD_SHIFT 8 /**< Shift value for LCD_AUTOLOAD */ 594 #define _LCD_UPDATECTRL_AUTOLOAD_MASK 0x100UL /**< Bit mask for LCD_AUTOLOAD */ 595 #define _LCD_UPDATECTRL_AUTOLOAD_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_UPDATECTRL */ 596 #define _LCD_UPDATECTRL_AUTOLOAD_MANUAL 0x00000000UL /**< Mode MANUAL for LCD_UPDATECTRL */ 597 #define _LCD_UPDATECTRL_AUTOLOAD_AUTO 0x00000001UL /**< Mode AUTO for LCD_UPDATECTRL */ 598 #define LCD_UPDATECTRL_AUTOLOAD_DEFAULT (_LCD_UPDATECTRL_AUTOLOAD_DEFAULT << 8) /**< Shifted mode DEFAULT for LCD_UPDATECTRL */ 599 #define LCD_UPDATECTRL_AUTOLOAD_MANUAL (_LCD_UPDATECTRL_AUTOLOAD_MANUAL << 8) /**< Shifted mode MANUAL for LCD_UPDATECTRL */ 600 #define LCD_UPDATECTRL_AUTOLOAD_AUTO (_LCD_UPDATECTRL_AUTOLOAD_AUTO << 8) /**< Shifted mode AUTO for LCD_UPDATECTRL */ 601 #define _LCD_UPDATECTRL_LOADADDR_SHIFT 13 /**< Shift value for LCD_LOADADDR */ 602 #define _LCD_UPDATECTRL_LOADADDR_MASK 0x1E000UL /**< Bit mask for LCD_LOADADDR */ 603 #define _LCD_UPDATECTRL_LOADADDR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_UPDATECTRL */ 604 #define _LCD_UPDATECTRL_LOADADDR_BACTRLWR 0x00000000UL /**< Mode BACTRLWR for LCD_UPDATECTRL */ 605 #define _LCD_UPDATECTRL_LOADADDR_AREGAWR 0x00000001UL /**< Mode AREGAWR for LCD_UPDATECTRL */ 606 #define _LCD_UPDATECTRL_LOADADDR_AREGBWR 0x00000002UL /**< Mode AREGBWR for LCD_UPDATECTRL */ 607 #define _LCD_UPDATECTRL_LOADADDR_SEGD0WR 0x00000003UL /**< Mode SEGD0WR for LCD_UPDATECTRL */ 608 #define _LCD_UPDATECTRL_LOADADDR_SEGD1WR 0x00000004UL /**< Mode SEGD1WR for LCD_UPDATECTRL */ 609 #define _LCD_UPDATECTRL_LOADADDR_SEGD2WR 0x00000005UL /**< Mode SEGD2WR for LCD_UPDATECTRL */ 610 #define _LCD_UPDATECTRL_LOADADDR_SEGD3WR 0x00000006UL /**< Mode SEGD3WR for LCD_UPDATECTRL */ 611 #define LCD_UPDATECTRL_LOADADDR_DEFAULT (_LCD_UPDATECTRL_LOADADDR_DEFAULT << 13) /**< Shifted mode DEFAULT for LCD_UPDATECTRL */ 612 #define LCD_UPDATECTRL_LOADADDR_BACTRLWR (_LCD_UPDATECTRL_LOADADDR_BACTRLWR << 13) /**< Shifted mode BACTRLWR for LCD_UPDATECTRL */ 613 #define LCD_UPDATECTRL_LOADADDR_AREGAWR (_LCD_UPDATECTRL_LOADADDR_AREGAWR << 13) /**< Shifted mode AREGAWR for LCD_UPDATECTRL */ 614 #define LCD_UPDATECTRL_LOADADDR_AREGBWR (_LCD_UPDATECTRL_LOADADDR_AREGBWR << 13) /**< Shifted mode AREGBWR for LCD_UPDATECTRL */ 615 #define LCD_UPDATECTRL_LOADADDR_SEGD0WR (_LCD_UPDATECTRL_LOADADDR_SEGD0WR << 13) /**< Shifted mode SEGD0WR for LCD_UPDATECTRL */ 616 #define LCD_UPDATECTRL_LOADADDR_SEGD1WR (_LCD_UPDATECTRL_LOADADDR_SEGD1WR << 13) /**< Shifted mode SEGD1WR for LCD_UPDATECTRL */ 617 #define LCD_UPDATECTRL_LOADADDR_SEGD2WR (_LCD_UPDATECTRL_LOADADDR_SEGD2WR << 13) /**< Shifted mode SEGD2WR for LCD_UPDATECTRL */ 618 #define LCD_UPDATECTRL_LOADADDR_SEGD3WR (_LCD_UPDATECTRL_LOADADDR_SEGD3WR << 13) /**< Shifted mode SEGD3WR for LCD_UPDATECTRL */ 619 620 /* Bit fields for LCD FRAMERATE */ 621 #define _LCD_FRAMERATE_RESETVALUE 0x00000000UL /**< Default value for LCD_FRAMERATE */ 622 #define _LCD_FRAMERATE_MASK 0x000001FFUL /**< Mask for LCD_FRAMERATE */ 623 #define _LCD_FRAMERATE_FRDIV_SHIFT 0 /**< Shift value for LCD_FRDIV */ 624 #define _LCD_FRAMERATE_FRDIV_MASK 0x1FFUL /**< Bit mask for LCD_FRDIV */ 625 #define _LCD_FRAMERATE_FRDIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_FRAMERATE */ 626 #define LCD_FRAMERATE_FRDIV_DEFAULT (_LCD_FRAMERATE_FRDIV_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_FRAMERATE */ 627 628 /** @} End of group EFR32FG23_LCD_BitFields */ 629 /** @} End of group EFR32FG23_LCD */ 630 /** @} End of group Parts */ 631 632 #endif // EFR32FG23_LCD_H 633
