1 //------------------------------------------------------------------------------ 2 // Copyright 2012 (c) Silicon Laboratories Inc. 3 // 4 // SPDX-License-Identifier: Zlib 5 // 6 // This siHAL software is provided 'as-is', without any express or implied 7 // warranty. In no event will the authors be held liable for any damages 8 // arising from the use of this software. 9 // 10 // Permission is granted to anyone to use this software for any purpose, 11 // including commercial applications, and to alter it and redistribute it 12 // freely, subject to the following restrictions: 13 // 14 // 1. The origin of this software must not be misrepresented; you must not 15 // claim that you wrote the original software. If you use this software 16 // in a product, an acknowledgment in the product documentation would be 17 // appreciated but is not required. 18 // 2. Altered source versions must be plainly marked as such, and must not be 19 // misrepresented as being the original software. 20 // 3. This notice may not be removed or altered from any source distribution. 21 //------------------------------------------------------------------------------ 22 // 23 // This file applies to the SIM3U1XX_PBCFG_A module 24 // 25 // Version: 1 26 27 #ifndef __SI32_PBCFG_A_SUPPORT_H__ 28 #define __SI32_PBCFG_A_SUPPORT_H__ 29 30 #include <stdint.h> 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 //----------------------------------------------------------------------------- 37 // Define crossbar0 high and low masks 38 39 #define SI32_PBCFG_A_XBAR0L_USART0EN 0x00000001 40 #define SI32_PBCFG_A_XBAR0L_USART0FCEN 0x00000002 41 #define SI32_PBCFG_A_XBAR0L_USART0CEN 0x00000004 42 #define SI32_PBCFG_A_XBAR0L_SPI0EN 0x00000008 43 #define SI32_PBCFG_A_XBAR0L_SPI0NSSEN 0x00000010 44 #define SI32_PBCFG_A_XBAR0L_USART1EN 0x00000020 45 #define SI32_PBCFG_A_XBAR0L_USART1FCEN 0x00000040 46 #define SI32_PBCFG_A_XBAR0L_USART1CEN 0x00000080 47 #define SI32_PBCFG_A_XBAR0L_EECI0EN 0x00040000 48 #define SI32_PBCFG_A_XBAR0L_ECI0EN 0x00080000 49 #define SI32_PBCFG_A_XBAR0L_ECI1EN 0x00100000 50 #define SI32_PBCFG_A_XBAR0L_I2S0TXEN 0x00200000 51 #define SI32_PBCFG_A_XBAR0L_I2C0EN 0x00400000 52 #define SI32_PBCFG_A_XBAR0L_CMP0SEN 0x00800000 53 #define SI32_PBCFG_A_XBAR0L_CMP0AEN 0x01000000 54 #define SI32_PBCFG_A_XBAR0L_CMP1SEN 0x02000000 55 #define SI32_PBCFG_A_XBAR0L_CMP1AEN 0x04000000 56 #define SI32_PBCFG_A_XBAR0L_TMR0CTEN 0x08000000 57 #define SI32_PBCFG_A_XBAR0L_TMR0EXEN 0x10000000 58 #define SI32_PBCFG_A_XBAR0L_TMR1CTEN 0x20000000 59 #define SI32_PBCFG_A_XBAR0L_TMR1EXEN 0x40000000 60 61 #define SI32_PBCFG_A_XBAR0H_UART0EN 0x00000001 62 #define SI32_PBCFG_A_XBAR0H_UART0FCEN 0x00000002 63 #define SI32_PBCFG_A_XBAR0H_UART1EN 0x00000004 64 #define SI32_PBCFG_A_XBAR0H_SPI1EN 0x00000008 65 #define SI32_PBCFG_A_XBAR0H_SPI1NSSEN 0x00000010 66 #define SI32_PBCFG_A_XBAR0H_SPI2EN 0x00000020 67 #define SI32_PBCFG_A_XBAR0H_SPI2NSSEN 0x00000040 68 #define SI32_PBCFG_A_XBAR0H_AHBEN 0x00000080 69 70 //----------------------------------------------------------------------------- 71 // Define crossbar1 masks 72 73 #define SI32_PBCFG_A_XBAR1_CMP0SEN 0x00000004 74 #define SI32_PBCFG_A_XBAR1_CMP1SEN 0x00000008 75 #define SI32_PBCFG_A_XBAR1_SPI1EN 0x00000010 76 #define SI32_PBCFG_A_XBAR1_SPI1NSSEN 0x00000020 77 #define SI32_PBCFG_A_XBAR1_RTC0EN 0x00000040 78 #define SI32_PBCFG_A_XBAR1_SPI2EN 0x00000080 79 #define SI32_PBCFG_A_XBAR1_SPI2NSSEN 0x00000100 80 #define SI32_PBCFG_A_XBAR1_USART1EN 0x00000200 81 #define SI32_PBCFG_A_XBAR1_USART1FCEN 0x00000400 82 #define SI32_PBCFG_A_XBAR1_USART1CEN 0x00000800 83 #define SI32_PBCFG_A_XBAR1_UART0EN 0x00001000 84 #define SI32_PBCFG_A_XBAR1_UART0FCEN 0x00002000 85 #define SI32_PBCFG_A_XBAR1_I2S0TXEN 0x00004000 86 #define SI32_PBCFG_A_XBAR1_I2C0EN 0x00008000 87 #define SI32_PBCFG_A_XBAR1_UART1EN 0x00010000 88 #define SI32_PBCFG_A_XBAR1_I2S0RXEN 0x00020000 89 #define SI32_PBCFG_A_XBAR1_LPT0OEN 0x00080000 90 #define SI32_PBCFG_A_XBAR1_I2C1EN 0x00100000 91 #define SI32_PBCFG_A_XBAR1_KILLHDEN 0x00200000 92 93 //----------------------------------------------------------------------------- 94 // Define crossbar0 signal parameter values 95 96 typedef enum SI32_PBCFG_A_XBAR0_Enum 97 { 98 SI32_XBAR0_USART0 = 0x00, 99 SI32_XBAR0_USART0FC = 0x01, 100 SI32_XBAR0_USART0C = 0x02, 101 SI32_XBAR0_SPI0 = 0x03, 102 SI32_XBAR0_SPI0NSS = 0x04, 103 SI32_XBAR0_USART1 = 0x05, 104 SI32_XBAR0_USART1FC = 0x06, 105 SI32_XBAR0_USART1C = 0x07, 106 SI32_XBAR0_EECI0 = 0x12, 107 SI32_XBAR0_ECI0 = 0x13, 108 SI32_XBAR0_ECI1 = 0x14, 109 SI32_XBAR0_I2S0TX = 0x15, 110 SI32_XBAR0_I2C0 = 0x16, 111 SI32_XBAR0_CMP0S = 0x17, 112 SI32_XBAR0_CMP0A = 0x18, 113 SI32_XBAR0_CMP1S = 0x19, 114 SI32_XBAR0_CMP1A = 0x1A, 115 SI32_XBAR0_TMR0CT = 0x1B, 116 SI32_XBAR0_TMR0EX = 0x1C, 117 SI32_XBAR0_TMR1CT = 0x1D, 118 SI32_XBAR0_TMR1EX = 0x1E, 119 120 SI32_XBAR0_UART0 = 0x20, 121 SI32_XBAR0_UART0FC = 0x21, 122 SI32_XBAR0_UART1 = 0x22, 123 SI32_XBAR0_SPI1 = 0x23, 124 SI32_XBAR0_SPI1NSS = 0x24, 125 SI32_XBAR0_SPI2 = 0x25, 126 SI32_XBAR0_SPI2NSS = 0x26, 127 SI32_XBAR0_AHB = 0x27, 128 129 SI32_XBAR0_EPCA0_CEX0 = 0x81, 130 SI32_XBAR0_EPCA0_CEX0_1 = 0x82, 131 SI32_XBAR0_EPCA0_CEX0_2 = 0x83, 132 SI32_XBAR0_EPCA0_CEX0_3 = 0x84, 133 SI32_XBAR0_EPCA0_CEX0_4 = 0x85, 134 SI32_XBAR0_EPCA0_CEX0_5 = 0x86, 135 136 SI32_XBAR0_PCA0_CEX0 = 0xA1, 137 SI32_XBAR0_PCA0_CEX0_1 = 0xA3, 138 139 SI32_XBAR0_PCA1_CEX0 = 0xC1, 140 SI32_XBAR0_PCA1_CEX0_1 = 0xC3 141 } 142 SI32_PBCFG_A_XBAR0_Enum_Type; 143 144 //----------------------------------------------------------------------------- 145 // Define crossbar1 signal parameter values 146 147 typedef enum SI32_PBCFG_A_XBAR1_Enum 148 { 149 SI32_XBAR1_CMP0S = 0x02, 150 SI32_XBAR1_CMP1S = 0x03, 151 SI32_XBAR1_SPI1 = 0x04, 152 SI32_XBAR1_SPI1NSS = 0x05, 153 SI32_XBAR1_RTC0 = 0x06, 154 SI32_XBAR1_SPI2 = 0x07, 155 SI32_XBAR1_SPI2NSS = 0x08, 156 SI32_XBAR1_USART1 = 0x09, 157 SI32_XBAR1_USART1FC = 0x0A, 158 SI32_XBAR1_USART1C = 0x0B, 159 SI32_XBAR1_UART0 = 0x0C, 160 SI32_XBAR1_UART0FC = 0x0D, 161 SI32_XBAR1_I2S0TX = 0x0E, 162 SI32_XBAR1_I2C0 = 0x0F, 163 SI32_XBAR1_UART1 = 0x10, 164 SI32_XBAR1_I2S0RX = 0x11, 165 SI32_XBAR1_LPT0O = 0x13, 166 SI32_XBAR1_I2C1 = 0x14, 167 SI32_XBAR1_KILLHD = 0x15, 168 169 SI32_XBAR1_SSG0_EX0 = 0x81, 170 SI32_XBAR1_SSG0_EX0_1 = 0x82, 171 SI32_XBAR1_SSG0_EX0_3 = 0x83 172 } 173 SI32_PBCFG_A_XBAR1_Enum_Type; 174 175 #ifdef __cplusplus 176 } 177 #endif 178 179 #endif // __SI32_PBCFG_A_SUPPORT_H__ 180 181 //-eof-------------------------------------------------------------------------- 182
