1 //------------------------------------------------------------------------------ 2 // Copyright 2012 (c) Silicon Laboratories Inc. 3 // 4 // SPDX-License-Identifier: Zlib 5 // 6 // This siHAL software is provided 'as-is', without any express or implied 7 // warranty. In no event will the authors be held liable for any damages 8 // arising from the use of this software. 9 // 10 // Permission is granted to anyone to use this software for any purpose, 11 // including commercial applications, and to alter it and redistribute it 12 // freely, subject to the following restrictions: 13 // 14 // 1. The origin of this software must not be misrepresented; you must not 15 // claim that you wrote the original software. If you use this software 16 // in a product, an acknowledgment in the product documentation would be 17 // appreciated but is not required. 18 // 2. Altered source versions must be plainly marked as such, and must not be 19 // misrepresented as being the original software. 20 // 3. This notice may not be removed or altered from any source distribution. 21 //------------------------------------------------------------------------------ 22 // 23 // Script: 0.57 24 // Version: 1 25 26 #ifndef __SI32_VREG_A_REGISTERS_H__ 27 #define __SI32_VREG_A_REGISTERS_H__ 28 29 #include <stdint.h> 30 31 #ifdef __cplusplus 32 extern "C" { 33 #endif 34 35 struct SI32_VREG_A_CONTROL_Struct 36 { 37 union 38 { 39 struct 40 { 41 // VBUS Valid Flag 42 volatile uint32_t VBUSVLDF: 1; 43 // Voltage Regulator Suspend Enable 44 volatile uint32_t SUSEN: 1; 45 uint32_t reserved0: 3; 46 // Band Gap Disable 47 volatile uint32_t BGDIS: 1; 48 // VREGIN Sense Enable 49 volatile uint32_t SENSEEN: 1; 50 // VBUS Invalid Interrupt Flag 51 volatile uint32_t VBUSIVLDI: 1; 52 // VBUS Invalid Interrupt Enable 53 volatile uint32_t VBUSIVLDIEN: 1; 54 uint32_t reserved1: 22; 55 // Voltage Regulator Disable 56 volatile uint32_t VREGDIS: 1; 57 }; 58 volatile uint32_t U32; 59 }; 60 }; 61 62 #define SI32_VREG_A_CONTROL_VBUSVLDF_MASK 0x00000001 63 #define SI32_VREG_A_CONTROL_VBUSVLDF_SHIFT 0 64 // The current voltage on the VBUS pin is below the valid threshold. 65 #define SI32_VREG_A_CONTROL_VBUSVLDF_NOT_SET_VALUE 0 66 #define SI32_VREG_A_CONTROL_VBUSVLDF_NOT_SET_U32 \ 67 (SI32_VREG_A_CONTROL_VBUSVLDF_NOT_SET_VALUE << SI32_VREG_A_CONTROL_VBUSVLDF_SHIFT) 68 // The current voltage on the VBUS pin is above the valid threshold. 69 #define SI32_VREG_A_CONTROL_VBUSVLDF_SET_VALUE 1 70 #define SI32_VREG_A_CONTROL_VBUSVLDF_SET_U32 \ 71 (SI32_VREG_A_CONTROL_VBUSVLDF_SET_VALUE << SI32_VREG_A_CONTROL_VBUSVLDF_SHIFT) 72 73 #define SI32_VREG_A_CONTROL_SUSEN_MASK 0x00000002 74 #define SI32_VREG_A_CONTROL_SUSEN_SHIFT 1 75 // Disable regulator suspend mode. 76 #define SI32_VREG_A_CONTROL_SUSEN_DISABLED_VALUE 0 77 #define SI32_VREG_A_CONTROL_SUSEN_DISABLED_U32 \ 78 (SI32_VREG_A_CONTROL_SUSEN_DISABLED_VALUE << SI32_VREG_A_CONTROL_SUSEN_SHIFT) 79 // Enable regulator suspend mode. 80 #define SI32_VREG_A_CONTROL_SUSEN_ENABLED_VALUE 1 81 #define SI32_VREG_A_CONTROL_SUSEN_ENABLED_U32 \ 82 (SI32_VREG_A_CONTROL_SUSEN_ENABLED_VALUE << SI32_VREG_A_CONTROL_SUSEN_SHIFT) 83 84 #define SI32_VREG_A_CONTROL_BGDIS_MASK 0x00000020 85 #define SI32_VREG_A_CONTROL_BGDIS_SHIFT 5 86 // Enable the voltage regulator band gap. 87 #define SI32_VREG_A_CONTROL_BGDIS_INACTIVE_VALUE 0 88 #define SI32_VREG_A_CONTROL_BGDIS_INACTIVE_U32 \ 89 (SI32_VREG_A_CONTROL_BGDIS_INACTIVE_VALUE << SI32_VREG_A_CONTROL_BGDIS_SHIFT) 90 // Disable the voltage regulator band gap. 91 #define SI32_VREG_A_CONTROL_BGDIS_ACTIVE_VALUE 1 92 #define SI32_VREG_A_CONTROL_BGDIS_ACTIVE_U32 \ 93 (SI32_VREG_A_CONTROL_BGDIS_ACTIVE_VALUE << SI32_VREG_A_CONTROL_BGDIS_SHIFT) 94 95 #define SI32_VREG_A_CONTROL_SENSEEN_MASK 0x00000040 96 #define SI32_VREG_A_CONTROL_SENSEEN_SHIFT 6 97 // Disable VREGIN voltage sensing. 98 #define SI32_VREG_A_CONTROL_SENSEEN_DISABLED_VALUE 0 99 #define SI32_VREG_A_CONTROL_SENSEEN_DISABLED_U32 \ 100 (SI32_VREG_A_CONTROL_SENSEEN_DISABLED_VALUE << SI32_VREG_A_CONTROL_SENSEEN_SHIFT) 101 // Enable VREGIN voltage sensing. 102 #define SI32_VREG_A_CONTROL_SENSEEN_ENABLED_VALUE 1 103 #define SI32_VREG_A_CONTROL_SENSEEN_ENABLED_U32 \ 104 (SI32_VREG_A_CONTROL_SENSEEN_ENABLED_VALUE << SI32_VREG_A_CONTROL_SENSEEN_SHIFT) 105 106 #define SI32_VREG_A_CONTROL_VBUSIVLDI_MASK 0x00000080 107 #define SI32_VREG_A_CONTROL_VBUSIVLDI_SHIFT 7 108 // The voltage on the VBUS pin has not dropped below the valid threshold. 109 #define SI32_VREG_A_CONTROL_VBUSIVLDI_NOT_SET_VALUE 0 110 #define SI32_VREG_A_CONTROL_VBUSIVLDI_NOT_SET_U32 \ 111 (SI32_VREG_A_CONTROL_VBUSIVLDI_NOT_SET_VALUE << SI32_VREG_A_CONTROL_VBUSIVLDI_SHIFT) 112 // The voltage on the VBUS pin dropped below the valid threshold since the last 113 // time this bit was cleared. 114 #define SI32_VREG_A_CONTROL_VBUSIVLDI_SET_VALUE 1 115 #define SI32_VREG_A_CONTROL_VBUSIVLDI_SET_U32 \ 116 (SI32_VREG_A_CONTROL_VBUSIVLDI_SET_VALUE << SI32_VREG_A_CONTROL_VBUSIVLDI_SHIFT) 117 118 #define SI32_VREG_A_CONTROL_VBUSIVLDIEN_MASK 0x00000100 119 #define SI32_VREG_A_CONTROL_VBUSIVLDIEN_SHIFT 8 120 // Disable the VBUS invalid interrupt. 121 #define SI32_VREG_A_CONTROL_VBUSIVLDIEN_DISABLED_VALUE 0 122 #define SI32_VREG_A_CONTROL_VBUSIVLDIEN_DISABLED_U32 \ 123 (SI32_VREG_A_CONTROL_VBUSIVLDIEN_DISABLED_VALUE << SI32_VREG_A_CONTROL_VBUSIVLDIEN_SHIFT) 124 // Enable the VBUS invalid interrupt. 125 #define SI32_VREG_A_CONTROL_VBUSIVLDIEN_ENABLED_VALUE 1 126 #define SI32_VREG_A_CONTROL_VBUSIVLDIEN_ENABLED_U32 \ 127 (SI32_VREG_A_CONTROL_VBUSIVLDIEN_ENABLED_VALUE << SI32_VREG_A_CONTROL_VBUSIVLDIEN_SHIFT) 128 129 #define SI32_VREG_A_CONTROL_VREGDIS_MASK 0x80000000 130 #define SI32_VREG_A_CONTROL_VREGDIS_SHIFT 31 131 // Enable the voltage regulator. 132 #define SI32_VREG_A_CONTROL_VREGDIS_INACTIVE_VALUE 0U 133 #define SI32_VREG_A_CONTROL_VREGDIS_INACTIVE_U32 \ 134 (SI32_VREG_A_CONTROL_VREGDIS_INACTIVE_VALUE << SI32_VREG_A_CONTROL_VREGDIS_SHIFT) 135 // Disable the voltage regulator. 136 #define SI32_VREG_A_CONTROL_VREGDIS_ACTIVE_VALUE 1U 137 #define SI32_VREG_A_CONTROL_VREGDIS_ACTIVE_U32 \ 138 (SI32_VREG_A_CONTROL_VREGDIS_ACTIVE_VALUE << SI32_VREG_A_CONTROL_VREGDIS_SHIFT) 139 140 141 142 typedef struct SI32_VREG_A_Struct 143 { 144 struct SI32_VREG_A_CONTROL_Struct CONTROL ; // Base Address + 0x0 145 volatile uint32_t CONTROL_SET; 146 volatile uint32_t CONTROL_CLR; 147 uint32_t reserved0; 148 uint32_t reserved1[4]; 149 } SI32_VREG_A_Type; 150 151 #ifdef __cplusplus 152 } 153 #endif 154 155 #endif // __SI32_VREG_A_REGISTERS_H__ 156 157 //-eof-------------------------------------------------------------------------- 158 159
