1 //----------------------------------------------------------------------------- 2 // Copyright 2012 (c) Silicon Laboratories Inc. 3 // 4 // SPDX-License-Identifier: Zlib 5 // 6 // This siHAL software is provided 'as-is', without any express or implied 7 // warranty. In no event will the authors be held liable for any damages 8 // arising from the use of this software. 9 // 10 // Permission is granted to anyone to use this software for any purpose, 11 // including commercial applications, and to alter it and redistribute it 12 // freely, subject to the following restrictions: 13 // 14 // 1. The origin of this software must not be misrepresented; you must not 15 // claim that you wrote the original software. If you use this software 16 // in a product, an acknowledgment in the product documentation would be 17 // appreciated but is not required. 18 // 2. Altered source versions must be plainly marked as such, and must not be 19 // misrepresented as being the original software. 20 // 3. This notice may not be removed or altered from any source distribution. 21 //----------------------------------------------------------------------------- 22 // 23 // Script: 0.61 24 // Version: 1 25 26 #ifndef __SI32_VMON_B_REGISTERS_H__ 27 #define __SI32_VMON_B_REGISTERS_H__ 28 29 #include <stdint.h> 30 31 #ifdef __cplusplus 32 extern "C" { 33 #endif 34 35 struct SI32_VMON_B_CONTROL_Struct 36 { 37 union 38 { 39 struct 40 { 41 uint32_t reserved0: 2; 42 // VBAT Reset Threshold Status Flag 43 volatile uint32_t VBATRSTF: 1; 44 // VBAT Low Interrupt Flag 45 volatile uint32_t VBATLI: 1; 46 // VBAT High Threshold Enable 47 volatile uint32_t VBATHITHEN: 1; 48 uint32_t reserved1: 1; 49 // VBAT Low Interrupt Enable 50 volatile uint32_t VBATLIEN: 1; 51 uint32_t reserved2: 24; 52 // VBAT Supply Monitor Enable 53 volatile uint32_t VMONEN: 1; 54 }; 55 volatile uint32_t U32; 56 }; 57 }; 58 59 #define SI32_VMON_B_CONTROL_VBATRSTF_MASK 0x00000004 60 #define SI32_VMON_B_CONTROL_VBATRSTF_SHIFT 2 61 // The VBAT voltage is below the VBAT reset threshold. 62 #define SI32_VMON_B_CONTROL_VBATRSTF_VBAT_IS_BELOW_RESET_VALUE 0 63 #define SI32_VMON_B_CONTROL_VBATRSTF_VBAT_IS_BELOW_RESET_U32 \ 64 (SI32_VMON_B_CONTROL_VBATRSTF_VBAT_IS_BELOW_RESET_VALUE << SI32_VMON_B_CONTROL_VBATRSTF_SHIFT) 65 // The VBAT voltage is above the VBAT reset threshold. 66 #define SI32_VMON_B_CONTROL_VBATRSTF_VBAT_IS_ABOVE_RESET_VALUE 1 67 #define SI32_VMON_B_CONTROL_VBATRSTF_VBAT_IS_ABOVE_RESET_U32 \ 68 (SI32_VMON_B_CONTROL_VBATRSTF_VBAT_IS_ABOVE_RESET_VALUE << SI32_VMON_B_CONTROL_VBATRSTF_SHIFT) 69 70 #define SI32_VMON_B_CONTROL_VBATLI_MASK 0x00000008 71 #define SI32_VMON_B_CONTROL_VBATLI_SHIFT 3 72 // The VBAT voltage is below the early warning threshold. 73 #define SI32_VMON_B_CONTROL_VBATLI_VBAT_IS_LOW_VALUE 0 74 #define SI32_VMON_B_CONTROL_VBATLI_VBAT_IS_LOW_U32 \ 75 (SI32_VMON_B_CONTROL_VBATLI_VBAT_IS_LOW_VALUE << SI32_VMON_B_CONTROL_VBATLI_SHIFT) 76 // The VBAT voltage is above the early warning threshold. 77 #define SI32_VMON_B_CONTROL_VBATLI_VBAT_IS_OK_VALUE 1 78 #define SI32_VMON_B_CONTROL_VBATLI_VBAT_IS_OK_U32 \ 79 (SI32_VMON_B_CONTROL_VBATLI_VBAT_IS_OK_VALUE << SI32_VMON_B_CONTROL_VBATLI_SHIFT) 80 81 #define SI32_VMON_B_CONTROL_VBATHITHEN_MASK 0x00000010 82 #define SI32_VMON_B_CONTROL_VBATHITHEN_SHIFT 4 83 // Use the standard VBAT thresholds. 84 #define SI32_VMON_B_CONTROL_VBATHITHEN_DISABLED_VALUE 0 85 #define SI32_VMON_B_CONTROL_VBATHITHEN_DISABLED_U32 \ 86 (SI32_VMON_B_CONTROL_VBATHITHEN_DISABLED_VALUE << SI32_VMON_B_CONTROL_VBATHITHEN_SHIFT) 87 // Use the high VBAT thresholds. 88 #define SI32_VMON_B_CONTROL_VBATHITHEN_ENABLED_VALUE 1 89 #define SI32_VMON_B_CONTROL_VBATHITHEN_ENABLED_U32 \ 90 (SI32_VMON_B_CONTROL_VBATHITHEN_ENABLED_VALUE << SI32_VMON_B_CONTROL_VBATHITHEN_SHIFT) 91 92 #define SI32_VMON_B_CONTROL_VBATLIEN_MASK 0x00000040 93 #define SI32_VMON_B_CONTROL_VBATLIEN_SHIFT 6 94 // Disable the VBAT low interrupt. 95 #define SI32_VMON_B_CONTROL_VBATLIEN_DISABLED_VALUE 0 96 #define SI32_VMON_B_CONTROL_VBATLIEN_DISABLED_U32 \ 97 (SI32_VMON_B_CONTROL_VBATLIEN_DISABLED_VALUE << SI32_VMON_B_CONTROL_VBATLIEN_SHIFT) 98 // Enable the VBAT low interrupt. 99 #define SI32_VMON_B_CONTROL_VBATLIEN_ENABLED_VALUE 1 100 #define SI32_VMON_B_CONTROL_VBATLIEN_ENABLED_U32 \ 101 (SI32_VMON_B_CONTROL_VBATLIEN_ENABLED_VALUE << SI32_VMON_B_CONTROL_VBATLIEN_SHIFT) 102 103 #define SI32_VMON_B_CONTROL_VMONEN_MASK 0x80000000 104 #define SI32_VMON_B_CONTROL_VMONEN_SHIFT 31 105 // Disable the VBAT supply monitor. 106 #define SI32_VMON_B_CONTROL_VMONEN_DISABLED_VALUE 0U 107 #define SI32_VMON_B_CONTROL_VMONEN_DISABLED_U32 \ 108 (SI32_VMON_B_CONTROL_VMONEN_DISABLED_VALUE << SI32_VMON_B_CONTROL_VMONEN_SHIFT) 109 // Enable the VBAT supply monitor. 110 #define SI32_VMON_B_CONTROL_VMONEN_ENABLED_VALUE 1U 111 #define SI32_VMON_B_CONTROL_VMONEN_ENABLED_U32 \ 112 (SI32_VMON_B_CONTROL_VMONEN_ENABLED_VALUE << SI32_VMON_B_CONTROL_VMONEN_SHIFT) 113 114 115 116 typedef struct SI32_VMON_B_Struct 117 { 118 struct SI32_VMON_B_CONTROL_Struct CONTROL ; // Base Address + 0x0 119 volatile uint32_t CONTROL_SET; 120 volatile uint32_t CONTROL_CLR; 121 uint32_t reserved0; 122 uint32_t reserved1[4]; 123 } SI32_VMON_B_Type; 124 125 #ifdef __cplusplus 126 } 127 #endif 128 129 #endif // __SI32_VMON_B_REGISTERS_H__ 130 131 //-eof-------------------------------------------------------------------------- 132 133
