1 /***************************************************************************//** 2 * @file 3 * @brief Device initialization for DPLL. 4 ******************************************************************************* 5 * # License 6 * <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b> 7 ******************************************************************************* 8 * 9 * SPDX-License-Identifier: Zlib 10 * 11 * The licensor of this software is Silicon Laboratories Inc. 12 * 13 * This software is provided 'as-is', without any express or implied 14 * warranty. In no event will the authors be held liable for any damages 15 * arising from the use of this software. 16 * 17 * Permission is granted to anyone to use this software for any purpose, 18 * including commercial applications, and to alter it and redistribute it 19 * freely, subject to the following restrictions: 20 * 21 * 1. The origin of this software must not be misrepresented; you must not 22 * claim that you wrote the original software. If you use this software 23 * in a product, an acknowledgment in the product documentation would be 24 * appreciated but is not required. 25 * 2. Altered source versions must be plainly marked as such, and must not be 26 * misrepresented as being the original software. 27 * 3. This notice may not be removed or altered from any source distribution. 28 * 29 ******************************************************************************/ 30 #ifndef SL_DEVICE_INIT_DPLL_H 31 #define SL_DEVICE_INIT_DPLL_H 32 33 #include "sl_status.h" 34 35 #ifdef __cplusplus 36 extern "C" { 37 #endif 38 39 /** 40 * @addtogroup device_init 41 * @{ 42 * @addtogroup device_init_dpll DPLL Initialization 43 * @brief Initialize the Digital PLL 44 * @details 45 * Configures and locks the Digital PLL using the configuration in the 46 * configuration header `sl_device_init_dpll_config.h`, where settings including 47 * reference frequency, target frequency and lock mode are available. 48 * 49 * If using Simplicity Studio, this configuration header is also configurable 50 * through the Project Configurator, by selecting the "Device Init: DPLL" configuration component. 51 * 52 * @{ 53 */ 54 55 /** 56 * Initialize DPLL 57 * 58 * @details 59 * Configures and locks the Digital PLL using the configuration in the 60 * configuration header `sl_device_init_dpll_config.h`, where settings including 61 * reference frequency, target frequency and lock mode are available. 62 * 63 * @return Status code 64 * @retval SL_STATUS_OK DPLL successfully initialized and locked 65 * @retval SL_STATUS_FAIL DPLL lock was unsuccessful 66 */ 67 sl_status_t sl_device_init_dpll(void); 68 69 /** 70 * @} device_init_dpll 71 * @} device_init 72 */ 73 74 #ifdef __cplusplus 75 } 76 #endif 77 78 #endif // SL_DEVICE_INIT_DPLL_H 79