1/***************************************************************************//** 2 * @file 3 * @brief startup file for Silicon Labs EFR32FG1P devices. 4 * For use with GCC for ARM Embedded Processors 5 ******************************************************************************* 6 * # License 7 * 8 * The licensor of this software is Silicon Laboratories Inc. Your use of this 9 * software is governed by the terms of Silicon Labs Master Software License 10 * Agreement (MSLA) available at 11 * www.silabs.com/about-us/legal/master-software-license-agreement. This 12 * software is Third Party Software licensed by Silicon Labs from a third party 13 * and is governed by the sections of the MSLA applicable to Third Party 14 * Software and the additional terms set forth below. 15 * 16 ******************************************************************************/ 17/* 18 * Copyright (c) 2009-2016 ARM Limited. All rights reserved. 19 * 20 * SPDX-License-Identifier: Apache-2.0 21 * 22 * Licensed under the Apache License, Version 2.0 (the License); you may 23 * not use this file except in compliance with the License. 24 * You may obtain a copy of the License at 25 * 26 * www.apache.org/licenses/LICENSE-2.0 27 * 28 * Unless required by applicable law or agreed to in writing, software 29 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 30 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 31 * See the License for the specific language governing permissions and 32 * limitations under the License. 33 */ 34 35 .syntax unified 36 .arch armv7-m 37 .section .stack 38 .align 3 39#ifdef __STACK_SIZE 40 .equ Stack_Size, __STACK_SIZE 41#else 42 .equ Stack_Size, 0x00000400 43#endif 44 .globl __StackTop 45 .globl __StackLimit 46__StackLimit: 47 .space Stack_Size 48 .size __StackLimit, . - __StackLimit 49__StackTop: 50 .size __StackTop, . - __StackTop 51 52 .section .heap 53 .align 3 54#ifdef __HEAP_SIZE 55 .equ Heap_Size, __HEAP_SIZE 56#else 57 .equ Heap_Size, 0x00000C00 58#endif 59 .globl __HeapBase 60 .globl __HeapLimit 61__HeapBase: 62 .if Heap_Size 63 .space Heap_Size 64 .endif 65 .size __HeapBase, . - __HeapBase 66__HeapLimit: 67 .size __HeapLimit, . - __HeapLimit 68 69 .section .vectors 70 .align 2 71 .globl __Vectors 72__Vectors: 73 .long __StackTop /* Top of Stack */ 74 .long Reset_Handler /* Reset Handler */ 75 .long NMI_Handler /* NMI Handler */ 76 .long HardFault_Handler /* Hard Fault Handler */ 77 .long MemManage_Handler /* MPU Fault Handler */ 78 .long BusFault_Handler /* Bus Fault Handler */ 79 .long UsageFault_Handler /* Usage Fault Handler */ 80 .long Default_Handler /* Reserved */ 81 .long Default_Handler /* Reserved */ 82 .long Default_Handler /* Reserved */ 83 .long Default_Handler /* Reserved */ 84 .long SVC_Handler /* SVCall Handler */ 85 .long DebugMon_Handler /* Debug Monitor Handler */ 86 .long sl_app_properties /* Application properties */ 87 .long PendSV_Handler /* PendSV Handler */ 88 .long SysTick_Handler /* SysTick Handler */ 89 90 /* External interrupts */ 91 .long EMU_IRQHandler /* 0 - EMU */ 92 .long FRC_PRI_IRQHandler /* 1 - FRC_PRI */ 93 .long WDOG0_IRQHandler /* 2 - WDOG0 */ 94 .long FRC_IRQHandler /* 3 - FRC */ 95 .long MODEM_IRQHandler /* 4 - MODEM */ 96 .long RAC_SEQ_IRQHandler /* 5 - RAC_SEQ */ 97 .long RAC_RSM_IRQHandler /* 6 - RAC_RSM */ 98 .long BUFC_IRQHandler /* 7 - BUFC */ 99 .long LDMA_IRQHandler /* 8 - LDMA */ 100 .long GPIO_EVEN_IRQHandler /* 9 - GPIO_EVEN */ 101 .long TIMER0_IRQHandler /* 10 - TIMER0 */ 102 .long USART0_RX_IRQHandler /* 11 - USART0_RX */ 103 .long USART0_TX_IRQHandler /* 12 - USART0_TX */ 104 .long ACMP0_IRQHandler /* 13 - ACMP0 */ 105 .long ADC0_IRQHandler /* 14 - ADC0 */ 106 .long IDAC0_IRQHandler /* 15 - IDAC0 */ 107 .long I2C0_IRQHandler /* 16 - I2C0 */ 108 .long GPIO_ODD_IRQHandler /* 17 - GPIO_ODD */ 109 .long TIMER1_IRQHandler /* 18 - TIMER1 */ 110 .long USART1_RX_IRQHandler /* 19 - USART1_RX */ 111 .long USART1_TX_IRQHandler /* 20 - USART1_TX */ 112 .long LEUART0_IRQHandler /* 21 - LEUART0 */ 113 .long PCNT0_IRQHandler /* 22 - PCNT0 */ 114 .long CMU_IRQHandler /* 23 - CMU */ 115 .long MSC_IRQHandler /* 24 - MSC */ 116 .long CRYPTO_IRQHandler /* 25 - CRYPTO */ 117 .long LETIMER0_IRQHandler /* 26 - LETIMER0 */ 118 .long AGC_IRQHandler /* 27 - AGC */ 119 .long PROTIMER_IRQHandler /* 28 - PROTIMER */ 120 .long RTCC_IRQHandler /* 29 - RTCC */ 121 .long SYNTH_IRQHandler /* 30 - SYNTH */ 122 .long CRYOTIMER_IRQHandler /* 31 - CRYOTIMER */ 123 .long RFSENSE_IRQHandler /* 32 - RFSENSE */ 124 .long FPUEH_IRQHandler /* 33 - FPUEH */ 125 126 127 .size __Vectors, . - __Vectors 128 129 .text 130 .thumb 131 .thumb_func 132 .align 2 133 .globl Reset_Handler 134 .type Reset_Handler, %function 135Reset_Handler: 136#ifndef __NO_SYSTEM_INIT 137 ldr r0, =SystemInit 138 blx r0 139#endif 140 141/* Firstly it copies data from read only memory to RAM. There are two schemes 142 * to copy. One can copy more than one sections. Another can only copy 143 * one section. The former scheme needs more instructions and read-only 144 * data to implement than the latter. 145 * Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. 146 */ 147 148#ifdef __STARTUP_COPY_MULTIPLE 149/* Multiple sections scheme. 150 * 151 * Between symbol address __copy_table_start__ and __copy_table_end__, 152 * there are array of triplets, each of which specify: 153 * offset 0: LMA of start of a section to copy from 154 * offset 4: VMA of start of a section to copy to 155 * offset 8: size of the section to copy. Must be multiply of 4 156 * 157 * All addresses must be aligned to 4 bytes boundary. 158 */ 159 ldr r4, =__copy_table_start__ 160 ldr r5, =__copy_table_end__ 161 162.L_loop0: 163 cmp r4, r5 164 bge .L_loop0_done 165 ldr r1, [r4] 166 ldr r2, [r4, #4] 167 ldr r3, [r4, #8] 168 169.L_loop0_0: 170 subs r3, #4 171 ittt ge 172 ldrge r0, [r1, r3] 173 strge r0, [r2, r3] 174 bge .L_loop0_0 175 176 adds r4, #12 177 b .L_loop0 178 179.L_loop0_done: 180#else 181/* Single section scheme. 182 * 183 * The ranges of copy from/to are specified by following symbols 184 * __etext: LMA of start of the section to copy from. Usually end of text 185 * __data_start__: VMA of start of the section to copy to 186 * __data_end__: VMA of end of the section to copy to 187 * 188 * All addresses must be aligned to 4 bytes boundary. 189 */ 190 ldr r1, =__etext 191 ldr r2, =__data_start__ 192 ldr r3, =__data_end__ 193 194.L_loop1: 195 cmp r2, r3 196 ittt lt 197 ldrlt r0, [r1], #4 198 strlt r0, [r2], #4 199 blt .L_loop1 200#endif /* __STARTUP_COPY_MULTIPLE */ 201 202/* This part of work usually is done in C library startup code. Otherwise, 203 * define this macro to enable it in this startup. 204 * 205 * There are two schemes too. One can clear multiple BSS sections. Another 206 * can only clear one section. The former is more size expensive than the 207 * latter. 208 * 209 * Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former. 210 * Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later. 211 */ 212#ifdef __STARTUP_CLEAR_BSS_MULTIPLE 213/* Multiple sections scheme. 214 * 215 * Between symbol address __zero_table_start__ and __zero_table_end__, 216 * there are array of tuples specifying: 217 * offset 0: Start of a BSS section 218 * offset 4: Size of this BSS section. Must be multiply of 4 219 */ 220 ldr r3, =__zero_table_start__ 221 ldr r4, =__zero_table_end__ 222 223.L_loop2: 224 cmp r3, r4 225 bge .L_loop2_done 226 ldr r1, [r3] 227 ldr r2, [r3, #4] 228 movs r0, 0 229 230.L_loop2_0: 231 subs r2, #4 232 itt ge 233 strge r0, [r1, r2] 234 bge .L_loop2_0 235 adds r3, #8 236 b .L_loop2 237.L_loop2_done: 238#elif defined (__STARTUP_CLEAR_BSS) 239/* Single BSS section scheme. 240 * 241 * The BSS section is specified by following symbols 242 * __bss_start__: start of the BSS section. 243 * __bss_end__: end of the BSS section. 244 * 245 * Both addresses must be aligned to 4 bytes boundary. 246 */ 247 ldr r1, =__bss_start__ 248 ldr r2, =__bss_end__ 249 250 movs r0, 0 251.L_loop3: 252 cmp r1, r2 253 itt lt 254 strlt r0, [r1], #4 255 blt .L_loop3 256#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */ 257 258#ifndef __START 259#define __START _start 260#endif 261 bl __START 262 263 .pool 264 .size Reset_Handler, . - Reset_Handler 265 266 .align 1 267 .thumb_func 268 .weak Default_Handler 269 .type Default_Handler, %function 270 .weak sl_app_properties 271 .type sl_app_properties, %common 272Default_Handler: 273sl_app_properties: /* Provide a dummy value for the sl_app_properties symbol. */ 274 b . 275 .size Default_Handler, . - Default_Handler 276 277/* Macro to define default handlers. Default handler 278 * will be weak symbol and just dead loops. They can be 279 * overwritten by other handlers. 280 */ 281 .macro def_irq_handler handler_name 282 .weak \handler_name 283 .set \handler_name, Default_Handler 284 .endm 285 286 def_irq_handler NMI_Handler 287 def_irq_handler HardFault_Handler 288 def_irq_handler MemManage_Handler 289 def_irq_handler BusFault_Handler 290 def_irq_handler UsageFault_Handler 291 def_irq_handler SVC_Handler 292 def_irq_handler DebugMon_Handler 293 def_irq_handler PendSV_Handler 294 def_irq_handler SysTick_Handler 295 296 297 def_irq_handler EMU_IRQHandler 298 def_irq_handler FRC_PRI_IRQHandler 299 def_irq_handler WDOG0_IRQHandler 300 def_irq_handler FRC_IRQHandler 301 def_irq_handler MODEM_IRQHandler 302 def_irq_handler RAC_SEQ_IRQHandler 303 def_irq_handler RAC_RSM_IRQHandler 304 def_irq_handler BUFC_IRQHandler 305 def_irq_handler LDMA_IRQHandler 306 def_irq_handler GPIO_EVEN_IRQHandler 307 def_irq_handler TIMER0_IRQHandler 308 def_irq_handler USART0_RX_IRQHandler 309 def_irq_handler USART0_TX_IRQHandler 310 def_irq_handler ACMP0_IRQHandler 311 def_irq_handler ADC0_IRQHandler 312 def_irq_handler IDAC0_IRQHandler 313 def_irq_handler I2C0_IRQHandler 314 def_irq_handler GPIO_ODD_IRQHandler 315 def_irq_handler TIMER1_IRQHandler 316 def_irq_handler USART1_RX_IRQHandler 317 def_irq_handler USART1_TX_IRQHandler 318 def_irq_handler LEUART0_IRQHandler 319 def_irq_handler PCNT0_IRQHandler 320 def_irq_handler CMU_IRQHandler 321 def_irq_handler MSC_IRQHandler 322 def_irq_handler CRYPTO_IRQHandler 323 def_irq_handler LETIMER0_IRQHandler 324 def_irq_handler AGC_IRQHandler 325 def_irq_handler PROTIMER_IRQHandler 326 def_irq_handler RTCC_IRQHandler 327 def_irq_handler SYNTH_IRQHandler 328 def_irq_handler CRYOTIMER_IRQHandler 329 def_irq_handler RFSENSE_IRQHandler 330 def_irq_handler FPUEH_IRQHandler 331 332 .end 333