1;/**************************************************************************//** 2; * @file 3; * @brief CMSIS Core Device Startup File for 4; * Silicon Labs EFR32FG13P Device Series 5; ****************************************************************************** 6; * # License 7; * 8; * The licensor of this software is Silicon Laboratories Inc. Your use of this 9; * software is governed by the terms of Silicon Labs Master Software License 10; * Agreement (MSLA) available at 11; * www.silabs.com/about-us/legal/master-software-license-agreement. This 12; * software is Third Party Software licensed by Silicon Labs from a third party 13; * and is governed by the sections of the MSLA applicable to Third Party 14; * Software and the additional terms set forth below. 15; * 16; *****************************************************************************/ 17;/* 18; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. 19; * 20; * SPDX-License-Identifier: Apache-2.0 21; * 22; * Licensed under the Apache License, Version 2.0 (the License); you may 23; * not use this file except in compliance with the License. 24; * You may obtain a copy of the License at 25; * 26; * www.apache.org/licenses/LICENSE-2.0 27; * 28; * Unless required by applicable law or agreed to in writing, software 29; * distributed under the License is distributed on an AS IS BASIS, WITHOUT 30; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 31; * See the License for the specific language governing permissions and 32; * limitations under the License. 33; */ 34 35;/* 36;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ 37;*/ 38 39; <h> Stack Configuration 40; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 41; </h> 42 IF :DEF: __STACK_SIZE 43Stack_Size EQU __STACK_SIZE 44 ELSE 45Stack_Size EQU 0x00000400 46 ENDIF 47 48 AREA STACK, NOINIT, READWRITE, ALIGN=3 49Stack_Mem SPACE Stack_Size 50__initial_sp 51 52 53; <h> Heap Configuration 54; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 55; </h> 56 IF :DEF: __HEAP_SIZE 57Heap_Size EQU __HEAP_SIZE 58 ELSE 59Heap_Size EQU 0x00000C00 60 ENDIF 61 62 AREA HEAP, NOINIT, READWRITE, ALIGN=3 63__heap_base 64Heap_Mem SPACE Heap_Size 65__heap_limit 66 67 68 PRESERVE8 69 THUMB 70 71 72; Vector Table Mapped to Address 0 at Reset 73 74 AREA RESET, DATA, READONLY, ALIGN=8 75 EXPORT __Vectors 76 EXPORT __Vectors_End 77 EXPORT __Vectors_Size 78 79__Vectors DCD __initial_sp ; Top of Stack 80 DCD Reset_Handler ; Reset Handler 81 DCD NMI_Handler ; NMI Handler 82 DCD HardFault_Handler ; Hard Fault Handler 83 DCD MemManage_Handler ; MPU Fault Handler 84 DCD BusFault_Handler ; Bus Fault Handler 85 DCD UsageFault_Handler ; Usage Fault Handler 86 DCD 0 ; Reserved 87 DCD 0 ; Reserved 88 DCD 0 ; Reserved 89 DCD 0 ; Reserved 90 DCD SVC_Handler ; SVCall Handler 91 DCD DebugMon_Handler ; Debug Monitor Handler 92 DCD sl_app_properties ; Application properties 93 DCD PendSV_Handler ; PendSV Handler 94 DCD SysTick_Handler ; SysTick Handler 95 96 ; External Interrupts 97 98 DCD EMU_IRQHandler ; 0: EMU Interrupt 99 DCD FRC_PRI_IRQHandler ; 1: FRC_PRI Interrupt 100 DCD WDOG0_IRQHandler ; 2: WDOG0 Interrupt 101 DCD WDOG1_IRQHandler ; 3: WDOG1 Interrupt 102 DCD FRC_IRQHandler ; 4: FRC Interrupt 103 DCD MODEM_IRQHandler ; 5: MODEM Interrupt 104 DCD RAC_SEQ_IRQHandler ; 6: RAC_SEQ Interrupt 105 DCD RAC_RSM_IRQHandler ; 7: RAC_RSM Interrupt 106 DCD BUFC_IRQHandler ; 8: BUFC Interrupt 107 DCD LDMA_IRQHandler ; 9: LDMA Interrupt 108 DCD GPIO_EVEN_IRQHandler ; 10: GPIO_EVEN Interrupt 109 DCD TIMER0_IRQHandler ; 11: TIMER0 Interrupt 110 DCD USART0_RX_IRQHandler ; 12: USART0_RX Interrupt 111 DCD USART0_TX_IRQHandler ; 13: USART0_TX Interrupt 112 DCD ACMP0_IRQHandler ; 14: ACMP0 Interrupt 113 DCD ADC0_IRQHandler ; 15: ADC0 Interrupt 114 DCD IDAC0_IRQHandler ; 16: IDAC0 Interrupt 115 DCD I2C0_IRQHandler ; 17: I2C0 Interrupt 116 DCD GPIO_ODD_IRQHandler ; 18: GPIO_ODD Interrupt 117 DCD TIMER1_IRQHandler ; 19: TIMER1 Interrupt 118 DCD USART1_RX_IRQHandler ; 20: USART1_RX Interrupt 119 DCD USART1_TX_IRQHandler ; 21: USART1_TX Interrupt 120 DCD LEUART0_IRQHandler ; 22: LEUART0 Interrupt 121 DCD PCNT0_IRQHandler ; 23: PCNT0 Interrupt 122 DCD CMU_IRQHandler ; 24: CMU Interrupt 123 DCD MSC_IRQHandler ; 25: MSC Interrupt 124 DCD CRYPTO0_IRQHandler ; 26: CRYPTO0 Interrupt 125 DCD LETIMER0_IRQHandler ; 27: LETIMER0 Interrupt 126 DCD AGC_IRQHandler ; 28: AGC Interrupt 127 DCD PROTIMER_IRQHandler ; 29: PROTIMER Interrupt 128 DCD PRORTC_IRQHandler ; 30: PRORTC Interrupt 129 DCD RTCC_IRQHandler ; 31: RTCC Interrupt 130 DCD SYNTH_IRQHandler ; 32: SYNTH Interrupt 131 DCD CRYOTIMER_IRQHandler ; 33: CRYOTIMER Interrupt 132 DCD RFSENSE_IRQHandler ; 34: RFSENSE Interrupt 133 DCD FPUEH_IRQHandler ; 35: FPUEH Interrupt 134 DCD SMU_IRQHandler ; 36: SMU Interrupt 135 DCD WTIMER0_IRQHandler ; 37: WTIMER0 Interrupt 136 DCD USART2_RX_IRQHandler ; 38: USART2_RX Interrupt 137 DCD USART2_TX_IRQHandler ; 39: USART2_TX Interrupt 138 DCD I2C1_IRQHandler ; 40: I2C1 Interrupt 139 DCD VDAC0_IRQHandler ; 41: VDAC0 Interrupt 140 DCD CSEN_IRQHandler ; 42: CSEN Interrupt 141 DCD LESENSE_IRQHandler ; 43: LESENSE Interrupt 142 DCD CRYPTO1_IRQHandler ; 44: CRYPTO1 Interrupt 143 DCD TRNG0_IRQHandler ; 45: TRNG0 Interrupt 144 DCD 0 ; 46: Reserved 145 146__Vectors_End 147__Vectors_Size EQU __Vectors_End - __Vectors 148 149 AREA |.text|, CODE, READONLY 150 151 152; Reset Handler 153 154Reset_Handler PROC 155 EXPORT Reset_Handler [WEAK] 156 IMPORT SystemInit 157 IMPORT __main 158 LDR R0, =SystemInit 159 BLX R0 160 LDR R0, =__main 161 BX R0 162 ENDP 163 164 165; Dummy Exception Handlers (infinite loops which can be modified) 166 167NMI_Handler PROC 168 EXPORT NMI_Handler [WEAK] 169 EXPORT sl_app_properties [WEAK] 170sl_app_properties ; Provide a dummy value for the sl_app_properties symbol. 171 B . 172 ENDP 173HardFault_Handler\ 174 PROC 175 EXPORT HardFault_Handler [WEAK] 176 B . 177 ENDP 178MemManage_Handler\ 179 PROC 180 EXPORT MemManage_Handler [WEAK] 181 B . 182 ENDP 183BusFault_Handler\ 184 PROC 185 EXPORT BusFault_Handler [WEAK] 186 B . 187 ENDP 188UsageFault_Handler\ 189 PROC 190 EXPORT UsageFault_Handler [WEAK] 191 B . 192 ENDP 193SVC_Handler PROC 194 EXPORT SVC_Handler [WEAK] 195 B . 196 ENDP 197DebugMon_Handler\ 198 PROC 199 EXPORT DebugMon_Handler [WEAK] 200 B . 201 ENDP 202PendSV_Handler PROC 203 EXPORT PendSV_Handler [WEAK] 204 B . 205 ENDP 206SysTick_Handler PROC 207 EXPORT SysTick_Handler [WEAK] 208 B . 209 ENDP 210 211Default_Handler PROC 212 213 EXPORT EMU_IRQHandler [WEAK] 214 EXPORT FRC_PRI_IRQHandler [WEAK] 215 EXPORT WDOG0_IRQHandler [WEAK] 216 EXPORT WDOG1_IRQHandler [WEAK] 217 EXPORT FRC_IRQHandler [WEAK] 218 EXPORT MODEM_IRQHandler [WEAK] 219 EXPORT RAC_SEQ_IRQHandler [WEAK] 220 EXPORT RAC_RSM_IRQHandler [WEAK] 221 EXPORT BUFC_IRQHandler [WEAK] 222 EXPORT LDMA_IRQHandler [WEAK] 223 EXPORT GPIO_EVEN_IRQHandler [WEAK] 224 EXPORT TIMER0_IRQHandler [WEAK] 225 EXPORT USART0_RX_IRQHandler [WEAK] 226 EXPORT USART0_TX_IRQHandler [WEAK] 227 EXPORT ACMP0_IRQHandler [WEAK] 228 EXPORT ADC0_IRQHandler [WEAK] 229 EXPORT IDAC0_IRQHandler [WEAK] 230 EXPORT I2C0_IRQHandler [WEAK] 231 EXPORT GPIO_ODD_IRQHandler [WEAK] 232 EXPORT TIMER1_IRQHandler [WEAK] 233 EXPORT USART1_RX_IRQHandler [WEAK] 234 EXPORT USART1_TX_IRQHandler [WEAK] 235 EXPORT LEUART0_IRQHandler [WEAK] 236 EXPORT PCNT0_IRQHandler [WEAK] 237 EXPORT CMU_IRQHandler [WEAK] 238 EXPORT MSC_IRQHandler [WEAK] 239 EXPORT CRYPTO0_IRQHandler [WEAK] 240 EXPORT LETIMER0_IRQHandler [WEAK] 241 EXPORT AGC_IRQHandler [WEAK] 242 EXPORT PROTIMER_IRQHandler [WEAK] 243 EXPORT PRORTC_IRQHandler [WEAK] 244 EXPORT RTCC_IRQHandler [WEAK] 245 EXPORT SYNTH_IRQHandler [WEAK] 246 EXPORT CRYOTIMER_IRQHandler [WEAK] 247 EXPORT RFSENSE_IRQHandler [WEAK] 248 EXPORT FPUEH_IRQHandler [WEAK] 249 EXPORT SMU_IRQHandler [WEAK] 250 EXPORT WTIMER0_IRQHandler [WEAK] 251 EXPORT USART2_RX_IRQHandler [WEAK] 252 EXPORT USART2_TX_IRQHandler [WEAK] 253 EXPORT I2C1_IRQHandler [WEAK] 254 EXPORT VDAC0_IRQHandler [WEAK] 255 EXPORT CSEN_IRQHandler [WEAK] 256 EXPORT LESENSE_IRQHandler [WEAK] 257 EXPORT CRYPTO1_IRQHandler [WEAK] 258 EXPORT TRNG0_IRQHandler [WEAK] 259 260 261EMU_IRQHandler 262FRC_PRI_IRQHandler 263WDOG0_IRQHandler 264WDOG1_IRQHandler 265FRC_IRQHandler 266MODEM_IRQHandler 267RAC_SEQ_IRQHandler 268RAC_RSM_IRQHandler 269BUFC_IRQHandler 270LDMA_IRQHandler 271GPIO_EVEN_IRQHandler 272TIMER0_IRQHandler 273USART0_RX_IRQHandler 274USART0_TX_IRQHandler 275ACMP0_IRQHandler 276ADC0_IRQHandler 277IDAC0_IRQHandler 278I2C0_IRQHandler 279GPIO_ODD_IRQHandler 280TIMER1_IRQHandler 281USART1_RX_IRQHandler 282USART1_TX_IRQHandler 283LEUART0_IRQHandler 284PCNT0_IRQHandler 285CMU_IRQHandler 286MSC_IRQHandler 287CRYPTO0_IRQHandler 288LETIMER0_IRQHandler 289AGC_IRQHandler 290PROTIMER_IRQHandler 291PRORTC_IRQHandler 292RTCC_IRQHandler 293SYNTH_IRQHandler 294CRYOTIMER_IRQHandler 295RFSENSE_IRQHandler 296FPUEH_IRQHandler 297SMU_IRQHandler 298WTIMER0_IRQHandler 299USART2_RX_IRQHandler 300USART2_TX_IRQHandler 301I2C1_IRQHandler 302VDAC0_IRQHandler 303CSEN_IRQHandler 304LESENSE_IRQHandler 305CRYPTO1_IRQHandler 306TRNG0_IRQHandler 307 B . 308 ENDP 309 310 ALIGN 311 312; User Initial Stack & Heap 313 314 IF :DEF:__MICROLIB 315 316 EXPORT __initial_sp 317 EXPORT __heap_base 318 EXPORT __heap_limit 319 320 ELSE 321 322 IMPORT __use_two_region_memory 323 EXPORT __user_initial_stackheap 324 325__user_initial_stackheap PROC 326 LDR R0, = Heap_Mem 327 LDR R1, =(Stack_Mem + Stack_Size) 328 LDR R2, = (Heap_Mem + Heap_Size) 329 LDR R3, = Stack_Mem 330 BX LR 331 ENDP 332 333 ALIGN 334 335 ENDIF 336 337 END 338
