1 /**************************************************************************//** 2 * @file 3 * @brief EFR32BG22 FSRCO register and bit field definitions 4 ****************************************************************************** 5 * # License 6 * <b>Copyright 2022 Silicon Laboratories, Inc. www.silabs.com</b> 7 ****************************************************************************** 8 * 9 * SPDX-License-Identifier: Zlib 10 * 11 * The licensor of this software is Silicon Laboratories Inc. 12 * 13 * This software is provided 'as-is', without any express or implied 14 * warranty. In no event will the authors be held liable for any damages 15 * arising from the use of this software. 16 * 17 * Permission is granted to anyone to use this software for any purpose, 18 * including commercial applications, and to alter it and redistribute it 19 * freely, subject to the following restrictions: 20 * 21 * 1. The origin of this software must not be misrepresented; you must not 22 * claim that you wrote the original software. If you use this software 23 * in a product, an acknowledgment in the product documentation would be 24 * appreciated but is not required. 25 * 2. Altered source versions must be plainly marked as such, and must not be 26 * misrepresented as being the original software. 27 * 3. This notice may not be removed or altered from any source distribution. 28 * 29 *****************************************************************************/ 30 #ifndef EFR32BG22_FSRCO_H 31 #define EFR32BG22_FSRCO_H 32 #define FSRCO_HAS_SET_CLEAR 33 34 /**************************************************************************//** 35 * @addtogroup Parts 36 * @{ 37 ******************************************************************************/ 38 /**************************************************************************//** 39 * @defgroup EFR32BG22_FSRCO FSRCO 40 * @{ 41 * @brief EFR32BG22 FSRCO Register Declaration. 42 *****************************************************************************/ 43 44 /** FSRCO Register Declaration. */ 45 typedef struct { 46 __IM uint32_t IPVERSION; /**< IP Version */ 47 uint32_t RESERVED0[1023U]; /**< Reserved for future use */ 48 __IM uint32_t IPVERSION_SET; /**< IP Version */ 49 uint32_t RESERVED1[1023U]; /**< Reserved for future use */ 50 __IM uint32_t IPVERSION_CLR; /**< IP Version */ 51 uint32_t RESERVED2[1023U]; /**< Reserved for future use */ 52 __IM uint32_t IPVERSION_TGL; /**< IP Version */ 53 } FSRCO_TypeDef; 54 /** @} End of group EFR32BG22_FSRCO */ 55 56 /**************************************************************************//** 57 * @addtogroup EFR32BG22_FSRCO 58 * @{ 59 * @defgroup EFR32BG22_FSRCO_BitFields FSRCO Bit Fields 60 * @{ 61 *****************************************************************************/ 62 63 /* Bit fields for FSRCO IPVERSION */ 64 #define _FSRCO_IPVERSION_RESETVALUE 0x00000000UL /**< Default value for FSRCO_IPVERSION */ 65 #define _FSRCO_IPVERSION_MASK 0xFFFFFFFFUL /**< Mask for FSRCO_IPVERSION */ 66 #define _FSRCO_IPVERSION_IPVERSION_SHIFT 0 /**< Shift value for FSRCO_IPVERSION */ 67 #define _FSRCO_IPVERSION_IPVERSION_MASK 0xFFFFFFFFUL /**< Bit mask for FSRCO_IPVERSION */ 68 #define _FSRCO_IPVERSION_IPVERSION_DEFAULT 0x00000000UL /**< Mode DEFAULT for FSRCO_IPVERSION */ 69 #define FSRCO_IPVERSION_IPVERSION_DEFAULT (_FSRCO_IPVERSION_IPVERSION_DEFAULT << 0) /**< Shifted mode DEFAULT for FSRCO_IPVERSION */ 70 71 /** @} End of group EFR32BG22_FSRCO_BitFields */ 72 /** @} End of group EFR32BG22_FSRCO */ 73 /** @} End of group Parts */ 74 75 #endif /* EFR32BG22_FSRCO_H */ 76
