1 /*
2 * SPDX-FileCopyrightText: 2019-2025 SiFli Technologies(Nanjing) Co., Ltd
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <string.h>
8 #include "flash_table.h"
9
10 typedef enum
11 {
12 NOR_TYPE0 = 0, // normal type 0, DTR, NO CMD_WRSR2, Max 128Mb, as default command table
13 NOR_TYPE1, // type 1, WRSR2 to write status register 2(QE), Max 128Mb
14 NOR_TYPE2, // type 2, 256Mb, DTR, 4 bytes address command diff with 3 bytes, OTP support 4-B mode
15 NOR_TYPE3, // type 3, 256Mb , NO DTR , 4 bytes command same to 3 bytes, only timing changed, OTP 3-B only
16 NOR_TYPE4, // type 4, 256Mb, NO DTR, 4B ADDR command diff with 3B addr , OTP support 4-B mode
17 NOR_TYPE5, // type 5, 256Mb, NO DTR, MXIC flash have too many diff with others
18 NOR_CMD_TABLE_CNT
19 } FLASH_CMD_TABLE_ID_T;
20
21 #define FLASH_DEFAULT_CMD_TABLE (NOR_TYPE0)
22
23 /* For bootloader, need compress to reduce code size */
24 __weak FT_CONST SPI_FLASH_FACT_CFG_T flash_cmd_table_list[] =
25 {
26 {
27 // type 0
28 0, /* NOR flash */
29 0X85, /* puya manuf id */
30 0x60,
31 0x15, /* memory density */
32 0x0,
33 0x0,
34 0x3,
35 0x0,
36 0x0,
37 0x0,
38 0x0,
39 0x1,
40 4096,
41 {
42 {0x06, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WREN*/
43 {0x04, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRDI*/
44 {0x05, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDSR*/
45 {0x01, 1, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRSR*/
46 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PREAD*/
47 {0x03, 0, 1, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_READ*/
48 {0x0b, 0, 1, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_FREAD*/
49 {0x3b, 0, 2, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_DREAD*/
50 {0x6b, 0, 3, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_QREAD*/
51 {0xbb, 0, 2, 0, 0, 2, 2, 2, 1}, /* SPI_FLASH_CMD_2READ*/
52 {0xeb, 0, 3, 4, 0, 3, 2, 3, 1}, /* SPI_FLASH_CMD_4READ*/
53 {0x9f, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDID*/
54 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PLD*/
55 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_QPLD*/
56 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PLDR*/
57 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_QPLDR*/
58 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PEXE*/
59 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_BE*/
60 {0x99, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RST*/
61 {0x66, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RST_EN*/
62 {0x35, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDSR2*/
63 {0x50, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WVSR*/
64 {0x02, 1, 1, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_PP*/
65 {0x32, 1, 3, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_QPP*/
66 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_RDEAR*/
67 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_WREAR*/
68 {0x81, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_PE*/
69 {0x20, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_SE*/
70 {0x52, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_BE32*/
71 {0xd8, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_BE64*/
72 {0x60, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_CE*/
73 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_RDSR3*/
74 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_WRSR3*/
75 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_EN4BM*/
76 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_ET4BM*/
77 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_RD4BA*/
78 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_FR4BA*/
79 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_FQR4BA*/
80 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_4RD4BA*/
81 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PP4BA*/
82 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_QPP4BA*/
83 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_SE4BA*/
84 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_BE4BA*/
85 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_WRSR2*/
86 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_LEFPA*/
87 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_BBM*/
88 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_RBLUT*/
89 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_CFREAD*/
90 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_C4READ*/
91 {0x4b, 0, 1, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_RUID*/
92 {0x48, 0, 1, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_RDSCUR*/
93 {0x42, 1, 1, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_PRSCUR*/
94 {0x44, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_ERSCUR*/
95 {0xb9, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_DPD*/
96 {0xab, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDP*/
97 {0xed, 0, 7, 7, 0, 7, 2, 7, 1}, /* SPI_FLASH_CMD_DTR4R*/
98 {0x5a, 0, 1, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_RDSFDP*/
99 }
100 },
101 {
102 // type 1
103 0, /* NOR flash */
104 0X85, /* puya manuf id */
105 0x60,
106 0x16, /* memory density */
107 0x0,
108 0x0,
109 0x3,
110 0x0,
111 0x0,
112 0x0,
113 0x0,
114 0x1,
115 4096,
116 {
117 {0x06, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WREN*/
118 {0x04, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRDI*/
119 {0x05, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDSR*/
120 {0x01, 1, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRSR*/
121 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PREAD*/
122 {0x03, 0, 1, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_READ*/
123 {0x0b, 0, 1, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_FREAD*/
124 {0x3b, 0, 2, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_DREAD*/
125 {0x6b, 0, 3, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_QREAD*/
126 {0xbb, 0, 2, 0, 0, 2, 2, 2, 1}, /* SPI_FLASH_CMD_2READ*/
127 {0xeb, 0, 3, 4, 0, 3, 2, 3, 1}, /* SPI_FLASH_CMD_4READ*/
128 {0x9f, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDID*/
129 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PLD*/
130 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_QPLD*/
131 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PLDR*/
132 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_QPLDR*/
133 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PEXE*/
134 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_BE*/
135 {0x99, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RST*/
136 {0x66, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RST_EN*/
137 {0x35, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDSR2*/
138 {0x50, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WVSR*/
139 {0x02, 1, 1, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_PP*/
140 {0x32, 1, 3, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_QPP*/
141 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_RDEAR*/
142 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_WREAR*/
143 {0x81, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_PE*/
144 {0x20, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_SE*/
145 {0x52, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_BE32*/
146 {0xd8, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_BE64*/
147 {0x60, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_CE*/
148 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_RDSR3*/
149 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_WRSR3*/
150 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_EN4BM*/
151 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_ET4BM*/
152 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_RD4BA*/
153 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_FR4BA*/
154 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_FQR4BA*/
155 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_4RD4BA*/
156 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PP4BA*/
157 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_QPP4BA*/
158 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_SE4BA*/
159 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_BE4BA*/
160 {0x31, 1, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRSR2*/
161 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_LEFPA*/
162 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_BBM*/
163 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_RBLUT*/
164 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_CFREAD*/
165 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_C4READ*/
166 {0x4b, 0, 1, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_RUID*/
167 {0x48, 0, 1, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_RDSCUR*/
168 {0x42, 1, 1, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_PRSCUR*/
169 {0x44, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_ERSCUR*/
170 {0xb9, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_DPD*/
171 {0xab, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDP*/
172 {0xed, 0, 7, 7, 0, 7, 2, 7, 1}, /* SPI_FLASH_CMD_DTR4R*/
173 //{0xed, 0, 7, 8, 0, 7, 2, 7, 1}, /* SPI_FLASH_CMD_DTR4R*/
174 {0x5a, 0, 1, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_RDSFDP*/
175 }
176 },
177 #ifndef SIMP_FLASHTAB
178 {
179 // type 2
180 0, /* NOR flash */
181 0Xef, /* winbond manuf id */
182 0x60,
183 0x19, /* device id, for winbond, they have 16 bit device, just use 8 now */
184 0x0,
185 0x0,
186 0x3,
187 0x0,
188 0x0,
189 0x0,
190 0x0,
191 0x1,
192 4096,
193 {
194 {0x06, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WREN*/
195 {0x04, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRDI*/
196 {0x05, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDSR*/
197 {0x01, 1, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRSR*/
198 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PREAD*/
199 {0x03, 0, 1, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_READ*/
200 {0x0b, 0, 1, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_FREAD*/
201 {0x3b, 0, 2, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_DREAD*/
202 {0x6b, 0, 3, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_QREAD*/
203 {0xbb, 0, 2, 0, 0, 2, 2, 2, 1}, /* SPI_FLASH_CMD_2READ*/
204 {0xeb, 0, 3, 4, 0, 3, 2, 3, 1}, /* SPI_FLASH_CMD_4READ*/
205 {0x9f, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDID*/
206 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PLD*/
207 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_QPLD*/
208 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PLDR*/
209 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_QPLDR*/
210 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PEXE*/
211 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_BE*/
212 {0x99, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RST*/
213 {0x66, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RST_EN*/
214 {0x35, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDSR2*/
215 {0x50, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WVSR*/
216 {0x02, 1, 1, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_PP*/
217 {0x32, 1, 3, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_QPP*/
218 {0xc8, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDEAR*/
219 {0xc5, 1, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WREAR*/
220 {0x81, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_PE*/
221 {0x20, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_SE*/
222 {0x52, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_BE32*/
223 {0xd8, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_BE64*/
224 {0x60, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_CE*/
225 {0x15, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDSR3*/
226 {0x11, 1, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRSR3*/
227 {0xb7, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_EN4BM*/
228 {0xe9, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_ET4BM*/
229 {0x13, 0, 1, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_RD4BA*/
230 {0x0c, 0, 1, 8, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_FR4BA*/
231 {0x6c, 0, 3, 8, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_FQR4BA*/
232 {0xec, 0, 3, 4, 0, 3, 3, 3, 1}, /* SPI_FLASH_CMD_4RD4BA*/
233 {0x12, 1, 1, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_PP4BA*/
234 {0x34, 1, 3, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_QPP4BA*/
235 {0x21, 0, 0, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_SE4BA*/
236 {0xDC, 0, 0, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_BE4BA*/
237 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_WRSR2*/
238 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_LEFPA*/
239 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_BBM*/
240 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_RBLUT*/
241 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_CFREAD*/
242 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_C4READ*/
243 {0x4b, 0, 1, 8, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_RUID*/
244 {0x48, 0, 1, 8, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_RDSCUR*/
245 {0x42, 1, 1, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_PRSCUR*/
246 {0x44, 0, 0, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_ERSCUR*/
247 {0xb9, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_DPD*/
248 {0xab, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDP*/
249 {0xed, 0, 7, 7, 0, 7, 3, 7, 1}, /* SPI_FLASH_CMD_DTR4R*/
250 {0x5a, 0, 1, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_RDSFDP*/
251 }
252 },
253 {
254 //type 3
255 0, /* NOR flash */
256 0Xc8, /* giga manuf id */
257 0x60,
258 0x19,
259 0x0,
260 0x0,
261 0x3,
262 0x0,
263 0x0,
264 0x0,
265 0x0,
266 0x1,
267 4096,
268 {
269 {0x06, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WREN*/
270 {0x04, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRDI*/
271 {0x05, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDSR*/
272 {0x01, 1, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRSR*/
273 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PREAD*/
274 {0x03, 0, 1, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_READ*/
275 {0x0b, 0, 1, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_FREAD*/
276 {0x3b, 0, 2, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_DREAD*/
277 {0x6b, 0, 3, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_QREAD*/
278 {0xbb, 0, 2, 0, 0, 2, 2, 2, 1}, /* SPI_FLASH_CMD_2READ*/
279 {0xeb, 0, 3, 4, 0, 3, 2, 3, 1}, /* SPI_FLASH_CMD_4READ*/
280 {0x9f, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDID*/
281 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PLD*/
282 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_QPLD*/
283 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PLDR*/
284 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_QPLDR*/
285 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PEXE*/
286 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_BE*/
287 {0x99, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RST*/
288 {0x66, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RST_EN*/
289 {0x35, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDSR2*/
290 {0x50, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WVSR*/
291 {0x02, 1, 1, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_PP*/
292 {0x32, 1, 3, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_QPP*/
293 {0xc8, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDEAR*/
294 {0xc5, 1, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WREAR*/
295 {0x81, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_PE*/
296 {0x20, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_SE*/
297 {0x52, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_BE32*/
298 {0xd8, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_BE64*/
299 {0x60, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_CE*/
300 {0x15, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDSR3*/
301 {0x11, 1, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRSR3*/
302 {0xb7, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_EN4BM*/
303 {0xe9, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_ET4BM*/
304 {0x03, 0, 1, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_RD4BA*/
305 {0x0b, 0, 1, 8, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_FR4BA*/
306 {0x6b, 0, 3, 8, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_FQR4BA*/
307 {0xeb, 0, 3, 4, 0, 3, 3, 3, 1}, /* SPI_FLASH_CMD_4RD4BA*/
308 {0x02, 1, 1, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_PP4BA*/
309 {0x32, 1, 3, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_QPP4BA*/
310 {0x20, 0, 0, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_SE4BA*/
311 {0xD8, 0, 0, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_BE4BA*/
312 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_WRSR2*/
313 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_LEFPA*/
314 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_BBM*/
315 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_RBLUT*/
316 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_CFREAD*/
317 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_C4READ*/
318 {0x4b, 0, 1, 8, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_RUID*/
319 {0x48, 0, 1, 8, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_RDSCUR*/
320 {0x42, 1, 1, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_PRSCUR*/
321 {0x44, 0, 0, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_ERSCUR*/
322 {0xb9, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_DPD*/
323 {0xab, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDP*/
324 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_DTR4R*/
325 {0x5a, 0, 1, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_RDSFDP*/
326 }
327 },
328 {
329 //type 4
330 0, /* NOR flash */
331 0X20, /* wuhan xinxin manuf id */
332 0x41,
333 0x19, /* mem cap */
334 0x0,
335 0x0,
336 0x3,
337 0x0,
338 0x0,
339 0x0,
340 0x0,
341 0x1,
342 4096,
343 {
344 {0x06, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WREN*/
345 {0x04, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRDI*/
346 {0x05, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDSR*/
347 {0x01, 1, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRSR*/
348 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PREAD*/
349 {0x03, 0, 1, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_READ*/
350 {0x0b, 0, 1, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_FREAD*/
351 {0x3b, 0, 2, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_DREAD*/
352 {0x6b, 0, 3, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_QREAD*/
353 {0xbb, 0, 2, 0, 0, 2, 2, 2, 1}, /* SPI_FLASH_CMD_2READ*/
354 {0xeb, 0, 3, 4, 0, 3, 2, 3, 1}, /* SPI_FLASH_CMD_4READ*/
355 {0x9f, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDID*/
356 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PLD*/
357 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_QPLD*/
358 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PLDR*/
359 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_QPLDR*/
360 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PEXE*/
361 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_BE*/
362 {0x99, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RST*/
363 {0x66, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RST_EN*/
364 {0x35, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDSR2*/
365 {0x50, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WVSR*/
366 {0x02, 1, 1, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_PP*/
367 {0x32, 1, 3, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_QPP*/
368 {0xc8, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDEAR*/
369 {0xc5, 1, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WREAR*/
370 {0x81, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_PE*/
371 {0x20, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_SE*/
372 {0x52, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_BE32*/
373 {0xd8, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_BE64*/
374 {0x60, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_CE*/
375 {0x15, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDSR3*/
376 {0x11, 1, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRSR3*/
377 {0xb7, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_EN4BM*/
378 {0xe9, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_ET4BM*/
379 {0x13, 0, 1, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_RD4BA*/
380 {0x0c, 0, 1, 8, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_FR4BA*/
381 {0x6c, 0, 3, 8, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_FQR4BA*/
382 {0xec, 0, 3, 4, 0, 3, 3, 3, 1}, /* SPI_FLASH_CMD_4RD4BA*/
383 {0x12, 1, 1, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_PP4BA*/
384 {0x34, 1, 3, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_QPP4BA*/
385 {0x21, 0, 0, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_SE4BA*/
386 {0xDC, 0, 0, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_BE4BA*/
387 {0x31, 1, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRSR2*/
388 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_LEFPA*/
389 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_BBM*/
390 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_RBLUT*/
391 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_CFREAD*/
392 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_C4READ*/
393 {0x4b, 0, 1, 8, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_RUID*/
394 {0x48, 0, 1, 8, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_RDSCUR*/
395 {0x42, 1, 1, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_PRSCUR*/
396 {0x44, 0, 0, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_ERSCUR*/
397 {0xb9, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_DPD*/
398 {0xab, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDP*/
399 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_DTR4R*/
400 {0x5a, 0, 1, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_RDSFDP*/
401 }
402 },
403 {
404 // type 5
405 0, /* NOR flash */
406 0Xc2, /* MXIC manuf id */
407 0x25,
408 0x39,
409 0x0,
410 0x0,
411 0x0,
412 0x3c,
413 0x60,
414 0x0,
415 0x0,
416 0x0,
417 4096,
418 {
419 {0x06, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WREN*/
420 {0x04, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRDI*/
421 {0x05, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDSR*/
422 {0x01, 1, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRSR*/
423 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PREAD*/
424 {0x03, 0, 1, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_READ*/
425 {0x0b, 0, 1, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_FREAD*/
426 {0x3b, 0, 2, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_DREAD*/
427 {0x6b, 0, 3, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_QREAD*/
428 {0xbb, 0, 2, 0, 0, 2, 2, 2, 1}, /* SPI_FLASH_CMD_2READ*/
429 {0xeb, 0, 3, 4, 0, 3, 2, 3, 1}, /* SPI_FLASH_CMD_4READ*/
430 {0x9f, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDID*/
431 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PLD*/
432 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_QPLD*/
433 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PLDR*/
434 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_QPLDR*/
435 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PEXE*/
436 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_BE*/
437 {0x99, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RST*/
438 {0x66, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RST_EN*/
439 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_RDSR2*/
440 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_WVSR*/
441 {0x02, 1, 1, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_PP*/
442 {0x32, 1, 3, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_QPP*/
443 {0xc8, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDEAR*/
444 {0xc5, 1, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WREAR*/
445 {0x81, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_PE*/
446 {0x20, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_SE*/
447 {0x52, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_BE32*/
448 {0xd8, 0, 0, 0, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_BE64*/
449 {0x60, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_CE*/
450 {0x15, 0, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDSR3*/
451 {0x11, 1, 1, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_WRSR3*/
452 {0xb7, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_EN4BM*/
453 {0xe9, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_ET4BM*/
454 {0x03, 0, 1, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_RD4BA*/
455 {0x0b, 0, 1, 8, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_FR4BA*/
456 {0x6b, 0, 3, 8, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_FQR4BA*/
457 {0xeb, 0, 3, 4, 0, 3, 3, 3, 1}, /* SPI_FLASH_CMD_4RD4BA*/
458 {0x02, 1, 1, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_PP4BA*/
459 {0x32, 1, 3, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_QPP4BA*/
460 {0x20, 0, 0, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_SE4BA*/
461 {0xD8, 0, 0, 0, 0, 0, 3, 1, 1}, /* SPI_FLASH_CMD_BE4BA*/
462 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_WRSR2*/
463 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_LEFPA*/
464 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_BBM*/
465 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_RBLUT*/
466 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_CFREAD*/
467 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_C4READ*/
468 {0x4b, 0, 1, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_RUID*/
469 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_RDSCUR*/
470 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_PRSCUR*/
471 {0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_ERSCUR*/
472 {0xb9, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_DPD*/
473 {0xab, 0, 0, 0, 0, 0, 0, 0, 1}, /* SPI_FLASH_CMD_RDP*/
474 {0x00, 0, 0, 0, 0, 0, 0, 0, 0}, /* SPI_FLASH_CMD_DTR4R*/
475 {0x5a, 0, 1, 8, 0, 0, 2, 1, 1}, /* SPI_FLASH_CMD_RDSFDP*/
476 }
477 },
478 #endif
479 };
480
481 FT_CONST FLASH_RDID_TYPE_T flash_cmd_id_pool_typ0[] =
482 {
483 {0x85, 0x60, 0x15, 1, 0x200000}, //P25Q16LE_RDID
484 {0x85, 0x60, 0x14, 1, 0x100000}, //P25Q80LE_RDID
485 {0x85, 0x60, 0x13, 0, 0x80000}, //P25Q40SU_RDID
486 {0xc8, 0x60, 0x14, 0, 0x100000}, //GD25LE80E_RDID
487 {0xc8, 0x60, 0x15, 0, 0x200000}, //GD25LE16E_RDID
488 {0xc8, 0x60, 0x16, 0, 0x400000}, //GD25LE32E_RDID
489 {0xc8, 0x60, 0x17, 0, 0x800000}, //GD25LE64E_RDID
490 {0xc8, 0x60, 0x18, 0, 0x1000000}, //GD25LQ128E_RDID
491 {0x0B, 0x40, 0x17, 0, 0x800000}, //XT25F64BW_RDID
492 {0xf8, 0x42, 0x18, 0, 0x1000000}, //FM25M4AA_RDID
493 {0x5e, 0x70, 0x17, 0, 0x800000}, //ZB25LQ64A_RDID
494 {0x5e, 0x40, 0x18, 0, 0x1000000}, //ZB25VQ128_SPI
495 {0xef, 0x60, 0x16, 0, 0x400000}, //W25Q32JW_RDID
496 {0x20, 0x40, 0X18, 1, 0x1000000}, //XM25QH128D ???
497 {0x20, 0x41, 0X18, 0, 0x1000000}, //XM25QU128C
498 {0x20, 0x50, 0x18, 0, 0x1000000}, //XM25QU128B
499 {0xeb, 0x60, 0x13, 0, 0x100000}, //TH25Q-80UA_RDID // reused command, but otp only 512 x 3
500 {0xeb, 0x60, 0x14, 0, 0x100000}, //TH25Q-80U_RDID // reused command, but otp only 512 x 3
501 {0x1c, 0x40, 0x18, 0, 0x1000000}, //GM25Q128A
502 {0x68, 0x40, 0x17, 0, 0x800000}, //BY25Q64ES_RDID
503 {0x68, 0x40, 0x18, 0, 0x1000000}, //BY25Q128ES_RDID
504 {0x0B, 0x40, 0X18, 0, 0x1000000}, //XT25F128F_RDID
505 {FLASH_INVALID_ID, 0, 0, 0, 0}, //last one
506 };
507
508 FT_CONST FLASH_RDID_TYPE_T flash_cmd_id_pool_typ1[] =
509 {
510 {0x85, 0x60, 0x16, 1, 0x400000}, //P25Q32L_RDID
511 {0x85, 0x60, 0x17, 1, 0x800000}, //P25Q64H_RDID, P25Q64SH
512 {0x85, 0x60, 0x18, 1, 0x1000000}, //P25Q128L_RDID
513 {0x85, 0x65, 0x18, 1, 0x1000000}, //P25Q128LA_RDID
514 {0x85, 0x63, 0x18, 1, 0x1000000}, //PY25F128LA
515 {0x85, 0x20, 0x17, 1, 0x800000}, //PY25Q64HA
516 {0x85, 0x20, 0x18, 1, 0x1000000}, //PY25Q128HA
517 {0x25, 0x70, 0x16, 0, 0x400000}, //SK25LE032_RDID
518 {0xef, 0x60, 0x18, 0, 0x1000000}, //W25Q128JW_RDID
519 {0xef, 0x40, 0x18, 0, 0x1000000}, //W25Q128JV_RDID
520 {0x0B, 0x60, 0X18, 0, 0x1000000}, //XT25Q128DW_RDID
521 {0x5e, 0x50, 0x18, 0, 0x1000000}, //ZB25LQ128BW_RDID
522 {0xa1, 0x28, 0x18, 0, 0x1000000}, //FM25W128_RDID
523 {0xc8, 0x43, 0x18, 1, 0x1000000}, //GD25Q128F_RDID
524 {0xc8, 0x40, 0x18, 0, 0x1000000}, //MD25Q128_RDID
525 {0xc8, 0x40, 0x17, 0, 0x800000}, //MD25Q64C_RDID
526 {0x20, 0x40, 0X17, 1, 0x800000}, //XM25QH64D
527 {0xcd, 0x60, 0X18, 0, 0x1000000}, //TH25Q128HA_RDID
528 {FLASH_INVALID_ID, 0, 0, 0, 0}, //last one
529 };
530
531 FT_CONST FLASH_RDID_TYPE_T flash_cmd_id_pool_typ2[] =
532 {
533 {0xef, 0x60, 0x19, 0, 0x2000000}, //W25Q256JW_RDID
534 {0xef, 0x70, 0x19, 1, 0x2000000}, //W25Q256JV_RDID
535 {0xE5, 0x42, 0x19, 0, 0x2000000}, //DS25M4BA_RDID
536 {0xef, 0x40, 0x19, 0, 0x2000000}, //W25Q256JVM_RDID
537 {0x68, 0x49, 0x19, 0, 0x2000000}, //BY25Q256FS
538 {0x5e, 0x40, 0x19, 0, 0x2000000}, //ZQ25Q256AW1G
539 {FLASH_INVALID_ID, 0, 0, 0, 0}, //last one
540 };
541 FT_CONST FLASH_RDID_TYPE_T flash_cmd_id_pool_typ3[] =
542 {
543 {0xc8, 0x60, 0x19, 0, 0x2000000}, //GD25LQ256D_RDID
544 {0x0B, 0x40, 0X19, 0, 0x2000000}, //XT25F256BW_RDID
545 {0xc8, 0x40, 0x19, 0, 0x2000000}, //GD25Q256E
546 {FLASH_INVALID_ID, 0, 0, 0, 0}, //last one
547 };
548 FT_CONST FLASH_RDID_TYPE_T flash_cmd_id_pool_typ4[] =
549 {
550 {0x20, 0x41, 0x19, 0, 0x2000000}, //XM25QU256C_RDID
551 {0x20, 0x40, 0x19, 0, 0x2000000}, //XM25QH256C_RDID
552 {0x20, 0x43, 0x19, 0, 0x2000000}, //XM25RH256C_RDID
553 {0x85, 0x20, 0x19, 1, 0x2000000}, //PY25Q256HB_RDID
554 {0x85, 0x20, 0x1a, 1, 0x4000000}, //PY25Q512HB_RDID
555 {FLASH_INVALID_ID, 0, 0, 0, 0}, //last one
556 };
557 FT_CONST FLASH_RDID_TYPE_T flash_cmd_id_pool_typ5[] =
558 {
559 {0xc2, 0x25, 0x39, 0, 0x2000000}, //MX25U25643G_RDID
560 {0xc2, 0x25, 0x37, 0, 0x800000}, //MX25U6432F_RDID
561 {0xc2, 0x20, 0x19, 1, 0x2000000}, //MX25L25645G
562 {0x25, 0x70, 0x18, 0, 0x1000000}, //SK25LP128_RDID
563 {FLASH_INVALID_ID, 0, 0, 0, 0}, //last one
564 };
565
566
567 #if defined(JLINK) || defined(KEIL)
568 FLASH_RDID_TYPE_T *flash_cmd_id_pool[NOR_CMD_TABLE_CNT];
569 #else
570 __weak FT_CONST FLASH_RDID_TYPE_T *FT_CONST flash_cmd_id_pool[] =
571 {
572 &flash_cmd_id_pool_typ0[0], // type 0, < 32m
573 &flash_cmd_id_pool_typ1[0], // type 1, < 32m
574 &flash_cmd_id_pool_typ2[0], // type 2, 32m
575 &flash_cmd_id_pool_typ3[0], // type 3, 32m
576 &flash_cmd_id_pool_typ4[0], // type 4, 32m
577 &flash_cmd_id_pool_typ5[0], // type 5, 32m
578 };
579 #endif /* JLINK || KEIL */
580
581 #if defined(JLINK) || defined(KEIL)
spi_nor_table_init(void)582 __weak void spi_nor_table_init(void)
583 {
584 if (NOR_CMD_TABLE_CNT != 6)
585 {
586 while (1);
587 }
588 flash_cmd_id_pool[0] = &flash_cmd_id_pool_typ0[0];
589 flash_cmd_id_pool[1] = &flash_cmd_id_pool_typ1[0];
590 flash_cmd_id_pool[2] = &flash_cmd_id_pool_typ2[0];
591 flash_cmd_id_pool[3] = &flash_cmd_id_pool_typ3[0];
592 flash_cmd_id_pool[4] = &flash_cmd_id_pool_typ4[0];
593 flash_cmd_id_pool[5] = &flash_cmd_id_pool_typ5[0];
594 }
595 #endif /* JLINK || KEIL */
596
597
598
599
600 #if defined(CFG_FACTORY_DEBUG)
get_user_flash_cfg(uint8_t isnand,uint8_t fid,uint8_t did,uint8_t type,uint8_t * flash_type)601 __WEAK void *get_user_flash_cfg(uint8_t isnand, uint8_t fid, uint8_t did, uint8_t type, uint8_t *flash_type)
602 {
603 return NULL;
604 }
605 #endif
606
spi_flash_get_rdid(uint8_t fid,uint8_t did,uint8_t type,uint8_t * flash_type)607 FT_CONST FLASH_RDID_TYPE_T *spi_flash_get_rdid(uint8_t fid, uint8_t did, uint8_t type, uint8_t *flash_type)
608 {
609 int i;
610 FT_CONST FLASH_RDID_TYPE_T *res;
611
612 // check flash id valid
613 if ((fid == FLASH_INVALID_ID) || (fid == FLASH_UNKNOW_ID))
614 return NULL;
615
616 for (i = 0; i < NOR_CMD_TABLE_CNT; i++)
617 {
618 res = flash_cmd_id_pool[i];
619 while (res->manufacture_id != FLASH_INVALID_ID)
620 {
621 if (fid == res->manufacture_id &&
622 type == res->memory_type &&
623 did == res->memory_density)
624 break;
625 res++;
626 };
627 if (res->manufacture_id != FLASH_INVALID_ID) // Found flash ID
628 break;
629 }
630 if (i == NOR_CMD_TABLE_CNT)
631 {
632 #if defined(CFG_FACTORY_DEBUG)
633 res = (FLASH_RDID_TYPE_T *)get_user_flash_cfg(0, fid, did, type, flash_type);
634 #else
635 res = NULL;
636 #endif
637 //
638 }
639 else if (flash_type)
640 {
641 *flash_type = i;
642 }
643 return res;
644 }
645
646 // get command table by index from register table
spi_flash_get_cmd_by_id(uint8_t fid,uint8_t did,uint8_t type)647 const SPI_FLASH_FACT_CFG_T *spi_flash_get_cmd_by_id(uint8_t fid, uint8_t did, uint8_t type)
648 {
649 uint8_t i;
650 const SPI_FLASH_FACT_CFG_T *res = NULL;
651
652 FT_CONST FLASH_RDID_TYPE_T *rdid = spi_flash_get_rdid(fid, did, type, &i);
653
654 if (rdid)
655 res = (const SPI_FLASH_FACT_CFG_T *)&flash_cmd_table_list[i];
656 else // set a default table for nor flash
657 res = &flash_cmd_table_list[FLASH_DEFAULT_CMD_TABLE];
658 return res;
659 }
660
spi_flash_get_size_by_id(uint8_t fid,uint8_t did,uint8_t type)661 int spi_flash_get_size_by_id(uint8_t fid, uint8_t did, uint8_t type)
662 {
663 int res = 0x80000;
664
665 FT_CONST FLASH_RDID_TYPE_T *rdid = spi_flash_get_rdid(fid, did, type, NULL);
666 if (rdid)
667 res = rdid->mem_size;
668
669 return res;
670 }
671
spi_flash_is_support_dtr(uint8_t fid,uint8_t did,uint8_t type)672 int spi_flash_is_support_dtr(uint8_t fid, uint8_t did, uint8_t type)
673 {
674 int res = 0;
675
676 FT_CONST FLASH_RDID_TYPE_T *rdid = spi_flash_get_rdid(fid, did, type, NULL);
677 if (rdid)
678 res = (rdid->ext_flags & DTR_SUPPORT_FLAG);
679
680 return res;
681 }
