1 /* 2 * SPDX-FileCopyrightText: 2016 STMicroelectronics 3 * SPDX-FileCopyrightText: 2019-2025 SiFli Technologies(Nanjing) Co., Ltd 4 * 5 * SPDX-License-Identifier: BSD-3-Clause AND Apache-2.0 6 */ 7 8 #ifndef __BF0_HAL_UART_H 9 #define __BF0_HAL_UART_H 10 11 #ifdef __cplusplus 12 extern "C" { 13 #endif 14 15 #ifdef _SIFLI_DOXYGEN_ 16 #define USART_CR1_FIFOEN // Enable for document purpose. 17 #endif 18 19 /* Includes ------------------------------------------------------------------*/ 20 #include "bf0_hal_def.h" 21 22 /** @addtogroup BF0_HAL_Driver 23 * @{ 24 */ 25 26 /** @addtogroup UART 27 * @{ 28 */ 29 30 /* Exported types ------------------------------------------------------------*/ 31 /** @defgroup UART_Exported_Types UART Exported Types 32 * @{ 33 */ 34 35 /** 36 * @brief UART Init Structure definition 37 */ 38 typedef struct 39 { 40 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 41 The baud rate register is computed using the following formula: 42 UART: 43 ===== 44 - If oversampling is 16 or in LIN mode, 45 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 46 - If oversampling is 8, 47 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[15:4] 48 Baud Rate Register[3] = 0 49 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[3:0]) >> 1 50 LPUART: 51 ======= 52 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) 53 54 where (uart/lpuart)_ker_ck_pres is the UART input clock divided by a prescaler */ 55 56 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 57 This parameter can be a value of @ref UART_Word_Length. */ 58 59 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 60 This parameter can be a value of @ref UART_Stop_Bits. */ 61 62 uint32_t Parity; /*!< Specifies the parity mode. 63 This parameter can be a value of @ref UART_Parity 64 @note When parity is enabled, the computed parity is inserted 65 at the MSB position of the transmitted data (9th bit when 66 the word length is set to 9 data bits; 8th bit when the 67 word length is set to 8 data bits). */ 68 69 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 70 This parameter can be a value of @ref UART_Mode. */ 71 72 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 73 or disabled. 74 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 75 76 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8). 77 This parameter can be a value of @ref UART_Over_Sampling. */ 78 79 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 80 Selecting the single sample method increases the receiver tolerance to clock 81 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 82 83 #if defined(USART_PRESC_PRESCALER) 84 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 85 This parameter can be a value of @ref UART_ClockPrescaler. */ 86 #endif 87 88 } UART_InitTypeDef; 89 90 /** 91 * @brief UART Advanced Features initalization structure definition 92 */ 93 typedef struct 94 { 95 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 96 Advanced Features may be initialized at the same time . 97 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */ 98 99 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 100 This parameter can be a value of @ref UART_Tx_Inv. */ 101 102 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 103 This parameter can be a value of @ref UART_Rx_Inv. */ 104 105 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 106 vs negative/inverted logic). 107 This parameter can be a value of @ref UART_Data_Inv. */ 108 109 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 110 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 111 112 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 113 This parameter can be a value of @ref UART_Overrun_Disable. */ 114 115 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 116 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 117 118 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 119 This parameter can be a value of @ref UART_AutoBaudRate_Enable */ 120 121 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 122 detection is carried out. 123 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 124 125 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 126 This parameter can be a value of @ref UART_MSB_First. */ 127 } UART_AdvFeatureInitTypeDef; 128 129 130 131 /** 132 * @brief HAL UART State structures definition 133 * @note HAL UART State value is a combination of 2 different substates: gState and RxState. 134 * - gState contains UART state information related to global Handle management 135 * and also information related to Tx operations. 136 * gState value coding follow below described bitmap : 137 * b7-b6 Error information 138 * 00 : No Error 139 * 01 : (Not Used) 140 * 10 : Timeout 141 * 11 : Error 142 * b5 IP initilisation status 143 * 0 : Reset (IP not initialized) 144 * 1 : Init done (IP not initialized. HAL UART Init function already called) 145 * b4-b3 (not used) 146 * xx : Should be set to 00 147 * b2 Intrinsic process state 148 * 0 : Ready 149 * 1 : Busy (IP busy with some configuration or internal operations) 150 * b1 (not used) 151 * x : Should be set to 0 152 * b0 Tx state 153 * 0 : Ready (no Tx operation ongoing) 154 * 1 : Busy (Tx operation ongoing) 155 * - RxState contains information related to Rx operations. 156 * RxState value coding follow below described bitmap : 157 * b7-b6 (not used) 158 * xx : Should be set to 00 159 * b5 IP initilisation status 160 * 0 : Reset (IP not initialized) 161 * 1 : Init done (IP not initialized) 162 * b4-b2 (not used) 163 * xxx : Should be set to 000 164 * b1 Rx state 165 * 0 : Ready (no Rx operation ongoing) 166 * 1 : Busy (Rx operation ongoing) 167 * b0 (not used) 168 * x : Should be set to 0. 169 */ 170 typedef enum 171 { 172 HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized 173 Value is allowed for gState and RxState */ 174 HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use 175 Value is allowed for gState and RxState */ 176 HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing 177 Value is allowed for gState only */ 178 HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing 179 Value is allowed for gState only */ 180 HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing 181 Value is allowed for RxState only */ 182 HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing 183 Not to be used for neither gState nor RxState. 184 Value is result of combination (Or) between gState and RxState values */ 185 HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state 186 Value is allowed for gState only */ 187 HAL_UART_STATE_ERROR = 0xE0U /*!< Error 188 Value is allowed for gState only */ 189 } HAL_UART_StateTypeDef; 190 191 192 /** 193 * @brief UART handle Structure definition 194 */ 195 typedef struct __UART_HandleTypeDef 196 { 197 USART_TypeDef *Instance; /*!< UART registers base address */ 198 199 UART_InitTypeDef Init; /*!< UART communication parameters */ 200 201 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 202 203 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 204 205 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 206 207 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 208 209 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 210 211 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 212 213 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 214 215 uint16_t Mask; /*!< UART Rx RDR register mask */ 216 217 #if defined(USART_CR1_FIFOEN) 218 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 219 This parameter can be a value of 1: enabled, 0: disabled */ 220 221 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 222 223 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 224 #endif 225 226 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 227 228 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 229 230 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 231 232 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 233 234 HAL_LockTypeDef Lock; /*!< Locking object */ 235 236 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 237 and also related to Tx operations. 238 This parameter can be a value of @ref HAL_UART_StateTypeDef */ 239 240 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. 241 This parameter can be a value of @ref HAL_UART_StateTypeDef */ 242 243 __IO uint32_t ErrorCode; /*!< UART Error code */ 244 245 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 246 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 247 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 248 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 249 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 250 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 251 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 252 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 253 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 254 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 255 #if defined(USART_CR1_FIFOEN) 256 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 257 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 258 #endif 259 260 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 261 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 262 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 263 264 } UART_HandleTypeDef; 265 266 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 267 /** 268 * @brief HAL UART Callback ID enumeration definition 269 */ 270 typedef enum 271 { 272 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 273 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 274 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 275 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 276 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 277 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 278 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 279 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 280 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 281 #if defined(USART_CR1_FIFOEN) 282 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 283 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 284 #endif 285 286 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 287 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 288 289 } HAL_UART_CallbackIDTypeDef; 290 291 /** 292 * @brief HAL UART Callback pointer definition 293 */ 294 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 295 296 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 297 298 /** 299 * @} 300 */ 301 302 /* Exported constants --------------------------------------------------------*/ 303 /** @defgroup UART_Exported_Constants UART Exported Constants 304 * @{ 305 */ 306 307 /** @defgroup UART_Error_Definition UART Error Definition 308 * @{ 309 */ 310 #define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ 311 #define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */ 312 #define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */ 313 #define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */ 314 #define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */ 315 #define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */ 316 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 317 #define HAL_UART_ERROR_INVALID_CALLBACK ((uint32_t)0x00000020U) /*!< Invalid Callback error */ 318 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 319 /** 320 * @} 321 */ 322 323 /** @defgroup UART_Word_Length UART Word Length 324 * @{ 325 */ 326 #define USART_CR1_M0 (0x1UL << USART_CR1_M_Pos) 327 #define USART_CR1_M1 (0x2UL << USART_CR1_M_Pos) 328 #define UART_WORDLENGTH_6B (0) /*!< 6-bit long UART frame */ 329 #define UART_WORDLENGTH_7B (USART_CR1_M0) /*!< 7-bit long UART frame */ 330 #define UART_WORDLENGTH_8B ((uint32_t)USART_CR1_M1) /*!< 8-bit long UART frame */ 331 #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) /*!< 9-bit long UART frame */ 332 333 334 /** 335 * @} 336 */ 337 338 339 340 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 341 * @{ 342 */ 343 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 344 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 345 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 346 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 347 /** 348 * @} 349 */ 350 351 /** @defgroup UART_Parity UART Parity 352 * @{ 353 */ 354 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 355 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 356 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 357 /** 358 * @} 359 */ 360 361 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 362 * @{ 363 */ 364 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 365 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 366 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 367 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 368 /** 369 * @} 370 */ 371 372 /** @defgroup UART_Mode UART Transfer Mode 373 * @{ 374 */ 375 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 376 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 377 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 378 /** 379 * @} 380 */ 381 382 /** @defgroup UART_State UART State 383 * @{ 384 */ 385 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 386 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 387 /** 388 * @} 389 */ 390 391 /** @defgroup UART_Over_Sampling UART Over Sampling 392 * @{ 393 */ 394 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 395 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 396 /** 397 * @} 398 */ 399 400 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 401 * @{ 402 */ 403 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 404 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 405 /** 406 * @} 407 */ 408 409 #if defined(USART_PRESC_PRESCALER) 410 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 411 * @{ 412 */ 413 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 414 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 415 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 416 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 417 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 418 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 419 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 420 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 421 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 422 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 423 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 424 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 425 426 /** 427 * @} 428 */ 429 #endif 430 431 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 432 * @{ 433 */ 434 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection on start bit */ 435 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection on falling edge */ 436 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection on 0x7F frame detection */ 437 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection on 0x55 frame detection */ 438 /** 439 * @} 440 */ 441 442 /** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut 443 * @{ 444 */ 445 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART receiver timeout disable */ 446 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART receiver timeout enable */ 447 /** 448 * @} 449 */ 450 451 /** @defgroup UART_LIN UART Local Interconnection Network mode 452 * @{ 453 */ 454 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 455 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 456 /** 457 * @} 458 */ 459 460 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 461 * @{ 462 */ 463 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 464 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 465 /** 466 * @} 467 */ 468 469 /** @defgroup UART_DMA_Tx UART DMA Tx 470 * @{ 471 */ 472 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 473 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 474 /** 475 * @} 476 */ 477 478 /** @defgroup UART_DMA_Rx UART DMA Rx 479 * @{ 480 */ 481 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 482 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 483 /** 484 * @} 485 */ 486 487 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 488 * @{ 489 */ 490 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 491 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 492 /** 493 * @} 494 */ 495 496 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 497 * @{ 498 */ 499 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 500 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 501 /** 502 * @} 503 */ 504 505 /** @defgroup UART_Request_Parameters UART Request Parameters 506 * @{ 507 */ 508 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 509 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 510 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 511 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 512 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 513 /** 514 * @} 515 */ 516 517 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 518 * @{ 519 */ 520 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 521 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 522 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 523 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 524 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 525 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 526 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 527 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 528 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 529 /** 530 * @} 531 */ 532 533 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 534 * @{ 535 */ 536 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 537 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 538 /** 539 * @} 540 */ 541 542 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 543 * @{ 544 */ 545 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 546 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 547 /** 548 * @} 549 */ 550 551 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 552 * @{ 553 */ 554 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 555 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 556 /** 557 * @} 558 */ 559 560 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 561 * @{ 562 */ 563 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 564 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 565 /** 566 * @} 567 */ 568 569 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 570 * @{ 571 */ 572 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 573 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 574 /** 575 * @} 576 */ 577 578 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 579 * @{ 580 */ 581 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 582 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 583 /** 584 * @} 585 */ 586 587 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 588 * @{ 589 */ 590 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 591 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 592 /** 593 * @} 594 */ 595 596 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 597 * @{ 598 */ 599 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received first disable */ 600 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received first enable */ 601 /** 602 * @} 603 */ 604 605 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 606 * @{ 607 */ 608 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 609 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 610 /** 611 * @} 612 */ 613 614 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 615 * @{ 616 */ 617 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 618 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 619 /** 620 * @} 621 */ 622 623 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 624 * @{ 625 */ 626 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 627 /** 628 * @} 629 */ 630 631 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 632 * @{ 633 */ 634 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 635 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 636 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register not empty or RXFIFO is not empty */ 637 /** 638 * @} 639 */ 640 641 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 642 * @{ 643 */ 644 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 645 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 646 /** 647 * @} 648 */ 649 650 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 651 * @{ 652 */ 653 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB position in CR1 register */ 654 /** 655 * @} 656 */ 657 658 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 659 * @{ 660 */ 661 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB position in CR1 register */ 662 /** 663 * @} 664 */ 665 666 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 667 * @{ 668 */ 669 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 670 /** 671 * @} 672 */ 673 674 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 675 * @{ 676 */ 677 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 678 /** 679 * @} 680 */ 681 682 /** @defgroup UART_Flags UART Status Flags 683 * Elements values convention: 0xXXXX 684 * - 0xXXXX : Flag mask in the ISR register 685 * @{ 686 */ 687 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 688 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 689 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 690 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 691 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 692 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 693 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 694 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 695 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 696 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 697 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 698 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 699 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 700 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 701 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 702 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 703 #if defined(USART_CR1_FIFOEN) 704 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 705 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 706 #else 707 #define UART_FLAG_TXE USART_ISR_TXE /*!< UART transmit data register empty */ 708 #endif 709 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 710 #if defined(USART_CR1_FIFOEN) 711 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 712 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 713 #else 714 #define UART_FLAG_RXNE USART_ISR_RXNE /*!< UART read data register not empty */ 715 #endif 716 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 717 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 718 #define UART_FLAG_NE USART_ISR_NF /*!< UART noise error */ 719 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 720 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 721 /** 722 * @} 723 */ 724 725 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 726 * Elements values convention: 000ZZZZZ0XXYYYYYb 727 * - YYYYY : Interrupt source position in the XX register (5bits) 728 * - XX : Interrupt source register (2bits) 729 * - 01: CR1 register 730 * - 10: CR2 register 731 * - 11: CR3 register 732 * - ZZZZZ : Flag position in the ISR register(5bits) 733 * @{ 734 */ 735 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 736 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 737 #if defined(USART_CR1_FIFOEN) 738 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 739 #endif 740 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 741 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 742 #if defined(USART_CR1_FIFOEN) 743 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 744 #endif 745 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 746 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 747 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 748 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 749 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 750 #if defined(USART_CR1_FIFOEN) 751 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 752 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 753 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 754 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 755 #endif 756 757 /* Elements values convention: 000000000XXYYYYYb 758 - YYYYY : Interrupt source position in the XX register (5bits) 759 - XX : Interrupt source register (2bits) 760 - 01: CR1 register 761 - 10: CR2 register 762 - 11: CR3 register */ 763 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 764 765 /* Elements values convention: 0000ZZZZ00000000b 766 - ZZZZ : Flag position in the ISR register(4bits) */ 767 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 768 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 769 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 770 /** 771 * @} 772 */ 773 774 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 775 * @{ 776 */ 777 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 778 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 779 #define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise Error detected Clear Flag */ 780 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 781 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 782 #if defined(USART_CR1_FIFOEN) 783 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 784 #endif 785 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 786 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 787 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 788 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 789 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 790 /** 791 * @} 792 */ 793 794 795 /** 796 * @} 797 */ 798 799 /* Exported macros -----------------------------------------------------------*/ 800 /** @defgroup UART_Exported_Macros UART Exported Macros 801 * @{ 802 */ 803 804 /** @brief Reset UART handle states. 805 * @param \__HANDLE__ UART handle. 806 * @retval None 807 */ 808 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 809 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 810 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 811 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 812 (__HANDLE__)->MspInitCallback = NULL; \ 813 (__HANDLE__)->MspDeInitCallback = NULL; \ 814 } while(0U) 815 #else 816 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 817 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 818 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 819 } while(0U) 820 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 821 822 /** @brief Flush the UART Data registers. 823 * @param \__HANDLE__ specifies the UART Handle. 824 * @retval None 825 */ 826 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 827 do{ \ 828 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 829 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 830 } while(0U) 831 832 /** @brief Clear the specified UART pending flag. 833 * @param \__HANDLE__ specifies the UART Handle. 834 * @param \__FLAG__ specifies the flag to check. 835 * This parameter can be any combination of the following values: 836 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 837 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 838 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 839 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 840 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 841 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 842 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 843 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 844 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 845 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 846 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 847 * @retval None 848 */ 849 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 850 851 /** @brief Clear the UART PE pending flag. 852 * @param \__HANDLE__ specifies the UART Handle. 853 * @retval None 854 */ 855 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 856 857 /** @brief Clear the UART FE pending flag. 858 * @param \__HANDLE__ specifies the UART Handle. 859 * @retval None 860 */ 861 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 862 863 /** @brief Clear the UART NE pending flag. 864 * @param \__HANDLE__ specifies the UART Handle. 865 * @retval None 866 */ 867 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 868 869 /** @brief Clear the UART ORE pending flag. 870 * @param \__HANDLE__ specifies the UART Handle. 871 * @retval None 872 */ 873 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 874 875 /** @brief Clear the UART IDLE pending flag. 876 * @param \__HANDLE__ specifies the UART Handle. 877 * @retval None 878 */ 879 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 880 881 #if defined(USART_CR1_FIFOEN) 882 /** @brief Clear the UART TX FIFO empty clear flag. 883 * @param \__HANDLE__ specifies the UART Handle. 884 * @retval None 885 */ 886 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 887 #endif 888 889 /** @brief Check whether the specified UART flag is set or not. 890 * @param \__HANDLE__ specifies the UART Handle. 891 * @param \__FLAG__ specifies the flag to check. 892 * This parameter can be one of the following values: 893 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 894 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 895 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 896 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 897 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 898 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 899 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 900 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 901 * @arg @ref UART_FLAG_SBKF Send Break flag 902 * @arg @ref UART_FLAG_CMF Character match flag 903 * @arg @ref UART_FLAG_BUSY Busy flag 904 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 905 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 906 * @arg @ref UART_FLAG_CTS CTS Change flag 907 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 908 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 909 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 910 * @arg @ref UART_FLAG_TC Transmission Complete flag 911 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 912 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 913 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 914 * @arg @ref UART_FLAG_ORE Overrun Error flag 915 * @arg @ref UART_FLAG_NE Noise Error flag 916 * @arg @ref UART_FLAG_FE Framing Error flag 917 * @arg @ref UART_FLAG_PE Parity Error flag 918 * @retval The new state of __FLAG__ (TRUE or FALSE). 919 */ 920 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 921 922 /** @brief Enable the specified UART interrupt. 923 * @param \__HANDLE__ specifies the UART Handle. 924 * @param \__INTERRUPT__ specifies the UART interrupt source to enable. 925 * This parameter can be one of the following values: 926 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 927 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 928 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 929 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 930 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 931 * @arg @ref UART_IT_CM Character match interrupt 932 * @arg @ref UART_IT_CTS CTS change interrupt 933 * @arg @ref UART_IT_LBD LIN Break detection interrupt 934 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 935 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 936 * @arg @ref UART_IT_TC Transmission complete interrupt 937 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 938 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 939 * @arg @ref UART_IT_IDLE Idle line detection interrupt 940 * @arg @ref UART_IT_PE Parity Error interrupt 941 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 942 * @retval None 943 */ 944 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 945 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 946 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK)))) 947 948 949 /** @brief Disable the specified UART interrupt. 950 * @param \__HANDLE__ specifies the UART Handle. 951 * @param \__INTERRUPT__ specifies the UART interrupt source to disable. 952 * This parameter can be one of the following values: 953 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 954 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 955 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 956 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 957 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 958 * @arg @ref UART_IT_CM Character match interrupt 959 * @arg @ref UART_IT_CTS CTS change interrupt 960 * @arg @ref UART_IT_LBD LIN Break detection interrupt 961 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 962 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 963 * @arg @ref UART_IT_TC Transmission complete interrupt 964 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 965 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 966 * @arg @ref UART_IT_IDLE Idle line detection interrupt 967 * @arg @ref UART_IT_PE Parity Error interrupt 968 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 969 * @retval None 970 */ 971 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 972 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 973 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK)))) 974 975 /** @brief Check whether the specified UART interrupt has occurred or not. 976 * @param \__HANDLE__ specifies the UART Handle. 977 * @param \__INTERRUPT__ specifies the UART interrupt to check. 978 * This parameter can be one of the following values: 979 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 980 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 981 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 982 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 983 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 984 * @arg @ref UART_IT_CM Character match interrupt 985 * @arg @ref UART_IT_CTS CTS change interrupt 986 * @arg @ref UART_IT_LBD LIN Break detection interrupt 987 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 988 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 989 * @arg @ref UART_IT_TC Transmission complete interrupt 990 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 991 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 992 * @arg @ref UART_IT_IDLE Idle line detection interrupt 993 * @arg @ref UART_IT_PE Parity Error interrupt 994 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 995 * @retval The new state of __INTERRUPT__ (SET or RESET). 996 */ 997 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 998 999 /** @brief Check whether the specified UART interrupt source is enabled or not. 1000 * @param \__HANDLE__ specifies the UART Handle. 1001 * @param \__INTERRUPT__ specifies the UART interrupt source to check. 1002 * This parameter can be one of the following values: 1003 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1004 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1005 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1006 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1007 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1008 * @arg @ref UART_IT_CM Character match interrupt 1009 * @arg @ref UART_IT_CTS CTS change interrupt 1010 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1011 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1012 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1013 * @arg @ref UART_IT_TC Transmission complete interrupt 1014 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1015 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1016 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1017 * @arg @ref UART_IT_PE Parity Error interrupt 1018 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1019 * @retval The new state of __INTERRUPT__ (SET or RESET). 1020 */ 1021 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ? (__HANDLE__)->Instance->CR1 : \ 1022 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ? (__HANDLE__)->Instance->CR2 : \ 1023 (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__INTERRUPT__)) & UART_IT_MASK))) != RESET) ? SET : RESET) 1024 1025 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1026 * @param \__HANDLE__ specifies the UART Handle. 1027 * @param \__IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1028 * to clear the corresponding interrupt 1029 * This parameter can be one of the following values: 1030 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1031 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1032 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1033 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1034 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1035 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 1036 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1037 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1038 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1039 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1040 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1041 * @retval None 1042 */ 1043 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1044 1045 /** @brief Set a specific UART request flag. 1046 * @param \__HANDLE__ specifies the UART Handle. 1047 * @param \__REQ__ specifies the request flag to set 1048 * This parameter can be one of the following values: 1049 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1050 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1051 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1052 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1053 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1054 * @retval None 1055 */ 1056 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (__REQ__)) 1057 1058 /** @brief Enable the UART one bit sample method. 1059 * @param \__HANDLE__ specifies the UART Handle. 1060 * @retval None 1061 */ 1062 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1063 1064 /** @brief Disable the UART one bit sample method. 1065 * @param \__HANDLE__ specifies the UART Handle. 1066 * @retval None 1067 */ 1068 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1069 1070 /** @brief Enable UART. 1071 * @param \__HANDLE__ specifies the UART Handle. 1072 * @retval None 1073 */ 1074 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1075 1076 /** @brief Disable UART. 1077 * @param \__HANDLE__ specifies the UART Handle. 1078 * @retval None 1079 */ 1080 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1081 1082 /** @brief Enable CTS flow control. 1083 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1084 * without need to call HAL_UART_Init() function. 1085 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1086 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1087 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1088 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1089 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1090 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1091 * @param \__HANDLE__ specifies the UART Handle. 1092 * @retval None 1093 */ 1094 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1095 do{ \ 1096 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1097 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1098 } while(0U) 1099 1100 /** @brief Disable CTS flow control. 1101 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1102 * without need to call HAL_UART_Init() function. 1103 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1104 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1105 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1106 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1107 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1108 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1109 * @param \__HANDLE__ specifies the UART Handle. 1110 * @retval None 1111 */ 1112 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1113 do{ \ 1114 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1115 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1116 } while(0U) 1117 1118 /** @brief Enable RTS flow control. 1119 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1120 * without need to call HAL_UART_Init() function. 1121 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1122 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1123 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1124 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1125 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1126 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1127 * @param \__HANDLE__ specifies the UART Handle. 1128 * @retval None 1129 */ 1130 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1131 do{ \ 1132 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1133 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1134 } while(0U) 1135 1136 /** @brief Disable RTS flow control. 1137 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1138 * without need to call HAL_UART_Init() function. 1139 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1140 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1141 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1142 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1143 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1144 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1145 * @param \__HANDLE__ specifies the UART Handle. 1146 * @retval None 1147 */ 1148 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1149 do{ \ 1150 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1151 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1152 } while(0U) 1153 1154 1155 /** @brief Get byte in FIFO. 1156 @param \__HANDLE__ specifies the UART Handle. 1157 @retval Byte in FIFO 1158 */ 1159 #define __HAL_UART_GETC(__HANDLE__) ((__HANDLE__)->Instance->RDR & 0xff) 1160 1161 /** @brief Put byte in FIFO for RX. 1162 @param \__HANDLE__ specifies the UART Handle. 1163 @param ch Byte to put into FIFO 1164 @retval Byte in FIFO 1165 */ 1166 #define __HAL_UART_PUTC(__HANDLE__,ch) (__HANDLE__)->Instance->TDR=ch 1167 1168 1169 /** 1170 * @} 1171 */ 1172 1173 /* Private macros --------------------------------------------------------*/ 1174 /** @defgroup UART_Private_Macros UART Private Macros 1175 * @{ 1176 */ 1177 1178 /** @brief Report the UART mask to apply to retrieve the received data 1179 * according to the word length and to the parity bits activation. 1180 * @note If PCE = 1, the parity bit is not included in the data extracted 1181 * by the reception API(). 1182 * This masking operation is not carried out in the case of 1183 * DMA transfers. 1184 * @param \__HANDLE__ specifies the UART Handle. 1185 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. 1186 */ 1187 #define UART_MASK_COMPUTATION(__HANDLE__) \ 1188 do { \ 1189 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ 1190 { \ 1191 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 1192 { \ 1193 (__HANDLE__)->Mask = 0x01FFU ; \ 1194 } \ 1195 else \ 1196 { \ 1197 (__HANDLE__)->Mask = 0x00FFU ; \ 1198 } \ 1199 } \ 1200 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ 1201 { \ 1202 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 1203 { \ 1204 (__HANDLE__)->Mask = 0x00FFU ; \ 1205 } \ 1206 else \ 1207 { \ 1208 (__HANDLE__)->Mask = 0x007FU ; \ 1209 } \ 1210 } \ 1211 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ 1212 { \ 1213 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 1214 { \ 1215 (__HANDLE__)->Mask = 0x007FU ; \ 1216 } \ 1217 else \ 1218 { \ 1219 (__HANDLE__)->Mask = 0x003FU ; \ 1220 } \ 1221 } \ 1222 } while(0U) 1223 1224 1225 #if defined(USART_PRESC_PRESCALER) 1226 /** @brief Get UART clok division factor from clock prescaler value. 1227 * @param \__CLOCKPRESCALER__ UART prescaler value. 1228 * @retval UART clock division factor 1229 */ 1230 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 1231 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 1232 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 1233 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 1234 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 1235 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 1236 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 1237 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 1238 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 1239 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 1240 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 1241 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \ 1242 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U) 1243 1244 /** @brief BRR division operation to set BRR register with LPUART. 1245 * @param \__PCLK__ LPUART clock. 1246 * @param \__BAUD__ Baud rate set by the user. 1247 * @param \__CLOCKPRESCALER__ UART prescaler value. 1248 * @retval Division result 1249 */ 1250 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((((uint64_t)(__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__)))*256U)) + ((__BAUD__)/2U)) / (__BAUD__)) 1251 1252 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1253 * @param \__PCLK__ UART clock. 1254 * @param \__BAUD__ Baud rate set by the user. 1255 * @param \__CLOCKPRESCALER__ UART prescaler value. 1256 * @retval Division result 1257 */ 1258 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) (((((__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__)))*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1259 1260 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1261 * @param \__PCLK__ UART clock. 1262 * @param \__BAUD__ Baud rate set by the user. 1263 * @param \__CLOCKPRESCALER__ UART prescaler value. 1264 * @retval Division result 1265 */ 1266 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__))) + ((__BAUD__)/2U)) / (__BAUD__)) 1267 #else 1268 1269 /** @brief BRR division operation to set BRR register with LPUART. 1270 * @param \__PCLK__ LPUART clock. 1271 * @param \__BAUD__ Baud rate set by the user. 1272 * @retval Division result 1273 */ 1274 #define UART_DIV_LPUART(__PCLK__, __BAUD__) (((((uint64_t)(__PCLK__)*256U)) + ((__BAUD__)/2U)) / (__BAUD__)) 1275 1276 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1277 * @param \__PCLK__ UART clock. 1278 * @param \__BAUD__ Baud rate set by the user. 1279 * @retval Division result 1280 */ 1281 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1282 1283 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1284 * @param \__PCLK__ UART clock. 1285 * @param \__BAUD__ Baud rate set by the user. 1286 * @retval Division result 1287 */ 1288 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__)) 1289 #endif 1290 1291 1292 /** @brief Check whether or not UART instance is Low Power UART. 1293 * @param \__HANDLE__ specifies the UART Handle. 1294 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 1295 */ 1296 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 1297 1298 #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_6B) || \ 1299 ((LENGTH) == UART_WORDLENGTH_7B) || \ 1300 ((LENGTH) == UART_WORDLENGTH_8B) || \ 1301 ((LENGTH) == UART_WORDLENGTH_9B)) 1302 1303 /** @brief Check UART Baud rate. 1304 * @param \__BAUDRATE__ Baudrate specified by the user. 1305 * The maximum Baud Rate is derived from the maximum clock on L4 1306 * divided by the smallest oversampling used on the USART (i.e. 8) 1307 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1308 */ 1309 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 10000001U) 1310 1311 /** @brief Check UART assertion time. 1312 * @param \__TIME__ 5-bit value assertion time. 1313 * @retval Test result (TRUE or FALSE). 1314 */ 1315 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1316 1317 /** @brief Check UART deassertion time. 1318 * @param \__TIME__ 5-bit value deassertion time. 1319 * @retval Test result (TRUE or FALSE). 1320 */ 1321 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1322 1323 /** 1324 * @brief Ensure that UART frame number of stop bits is valid. 1325 * @param \__STOPBITS__ UART frame number of stop bits. 1326 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1327 */ 1328 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1329 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1330 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1331 ((__STOPBITS__) == UART_STOPBITS_2)) 1332 1333 /** 1334 * @brief Ensure that LPUART frame number of stop bits is valid. 1335 * @param \__STOPBITS__ LPUART frame number of stop bits. 1336 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1337 */ 1338 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1339 ((__STOPBITS__) == UART_STOPBITS_2)) 1340 1341 /** 1342 * @brief Ensure that UART frame parity is valid. 1343 * @param \__PARITY__ UART frame parity. 1344 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1345 */ 1346 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1347 ((__PARITY__) == UART_PARITY_EVEN) || \ 1348 ((__PARITY__) == UART_PARITY_ODD)) 1349 1350 /** 1351 * @brief Ensure that UART hardware flow control is valid. 1352 * @param \__CONTROL__ UART hardware flow control. 1353 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1354 */ 1355 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1356 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1357 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1358 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1359 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1360 1361 /** 1362 * @brief Ensure that UART communication mode is valid. 1363 * @param \__MODE__ UART communication mode. 1364 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1365 */ 1366 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1367 1368 /** 1369 * @brief Ensure that UART state is valid. 1370 * @param \__STATE__ UART state. 1371 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1372 */ 1373 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1374 ((__STATE__) == UART_STATE_ENABLE)) 1375 1376 /** 1377 * @brief Ensure that UART oversampling is valid. 1378 * @param \__SAMPLING__ UART oversampling. 1379 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1380 */ 1381 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1382 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1383 1384 /** 1385 * @brief Ensure that UART frame sampling is valid. 1386 * @param \__ONEBIT__ UART frame sampling. 1387 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1388 */ 1389 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1390 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1391 1392 /** 1393 * @brief Ensure that UART auto Baud rate detection mode is valid. 1394 * @param \__MODE__ UART auto Baud rate detection mode. 1395 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1396 */ 1397 // TODO: Fix me with realy defines 1398 #if 0 1399 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1400 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1401 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1402 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1403 #else 1404 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (1) 1405 #endif 1406 1407 /** 1408 * @brief Ensure that UART receiver timeout setting is valid. 1409 * @param \__TIMEOUT__ UART receiver timeout setting. 1410 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1411 */ 1412 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1413 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1414 1415 /** 1416 * @brief Ensure that UART LIN state is valid. 1417 * @param \__LIN__ UART LIN state. 1418 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1419 */ 1420 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1421 ((__LIN__) == UART_LIN_ENABLE)) 1422 1423 /** 1424 * @brief Ensure that UART LIN break detection length is valid. 1425 * @param \__LENGTH__ UART LIN break detection length. 1426 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1427 */ 1428 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1429 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1430 1431 /** 1432 * @brief Ensure that UART DMA TX state is valid. 1433 * @param \__DMATX__ UART DMA TX state. 1434 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1435 */ 1436 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1437 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1438 1439 /** 1440 * @brief Ensure that UART DMA RX state is valid. 1441 * @param \__DMARX__ UART DMA RX state. 1442 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1443 */ 1444 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1445 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1446 1447 /** 1448 * @brief Ensure that UART half-duplex state is valid. 1449 * @param \__HDSEL__ UART half-duplex state. 1450 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1451 */ 1452 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1453 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1454 1455 /** 1456 * @brief Ensure that UART wake-up method is valid. 1457 * @param \__WAKEUP__ UART wake-up method . 1458 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1459 */ 1460 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1461 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1462 1463 /** 1464 * @brief Ensure that UART request parameter is valid. 1465 * @param \__PARAM__ UART request parameter. 1466 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1467 */ 1468 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1469 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1470 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1471 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1472 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1473 1474 /** 1475 * @brief Ensure that UART advanced features initialization is valid. 1476 * @param \__INIT__ UART advanced features initialization. 1477 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1478 */ 1479 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1480 UART_ADVFEATURE_TXINVERT_INIT | \ 1481 UART_ADVFEATURE_RXINVERT_INIT | \ 1482 UART_ADVFEATURE_DATAINVERT_INIT | \ 1483 UART_ADVFEATURE_SWAP_INIT | \ 1484 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1485 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1486 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1487 UART_ADVFEATURE_MSBFIRST_INIT)) 1488 1489 /** 1490 * @brief Ensure that UART frame TX inversion setting is valid. 1491 * @param \__TXINV__ UART frame TX inversion setting. 1492 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1493 */ 1494 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1495 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1496 1497 /** 1498 * @brief Ensure that UART frame RX inversion setting is valid. 1499 * @param \__RXINV__ UART frame RX inversion setting. 1500 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1501 */ 1502 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1503 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1504 1505 /** 1506 * @brief Ensure that UART frame data inversion setting is valid. 1507 * @param \__DATAINV__ UART frame data inversion setting. 1508 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1509 */ 1510 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1511 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1512 1513 /** 1514 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1515 * @param \__SWAP__ UART frame RX/TX pins swap setting. 1516 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1517 */ 1518 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1519 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1520 1521 /** 1522 * @brief Ensure that UART frame overrun setting is valid. 1523 * @param \__OVERRUN__ UART frame overrun setting. 1524 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1525 */ 1526 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1527 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1528 1529 /** 1530 * @brief Ensure that UART auto Baud rate state is valid. 1531 * @param \__AUTOBAUDRATE__ UART auto Baud rate state. 1532 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1533 */ 1534 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1535 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1536 1537 /** 1538 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1539 * @param \__DMA__ UART DMA enabling or disabling on error setting. 1540 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1541 */ 1542 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1543 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1544 1545 /** 1546 * @brief Ensure that UART frame MSB first setting is valid. 1547 * @param \__MSBFIRST__ UART frame MSB first setting. 1548 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1549 */ 1550 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1551 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1552 1553 /** 1554 * @brief Ensure that UART stop mode state is valid. 1555 * @param \__STOPMODE__ UART stop mode state. 1556 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1557 */ 1558 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1559 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1560 1561 /** 1562 * @brief Ensure that UART mute mode state is valid. 1563 * @param \__MUTE__ UART mute mode state. 1564 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1565 */ 1566 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1567 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1568 1569 /** 1570 * @brief Ensure that UART wake-up selection is valid. 1571 * @param \__WAKE__ UART wake-up selection. 1572 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1573 */ 1574 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1575 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1576 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1577 1578 /** 1579 * @brief Ensure that UART driver enable polarity is valid. 1580 * @param \__POLARITY__ UART driver enable polarity. 1581 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1582 */ 1583 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1584 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1585 1586 #if defined(USART_PRESC_PRESCALER) 1587 /** 1588 * @brief Ensure that UART Prescaler is valid. 1589 * @param \__CLOCKPRESCALER__ UART Prescaler value. 1590 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 1591 */ 1592 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 1593 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 1594 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 1595 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 1596 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 1597 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 1598 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 1599 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 1600 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 1601 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 1602 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 1603 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 1604 #endif 1605 1606 /* TODO: Revisit with real define*/ 1607 #define IS_UART_HWFLOW_INSTANCE(__INSTANCE__) (1) 1608 #define IS_UART_INSTANCE(__INSTANCE__) (1) 1609 #define IS_UART_HALFDUPLEX_INSTANCE(__INSTANCE__) (1) 1610 #define IS_UART_LIN_INSTANCE(__INSTANCE__) (1) 1611 #define IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(__INSTANCE__) (1) 1612 1613 #if defined(USART_EXR_BUSY) 1614 #define HAL_UART_LOCK_DEF() volatile uint32_t exr 1615 1616 /* Can be nested, if already locked by CPU, lock will succeed and unlock would do nothing */ 1617 #define HAL_UART_LOCK(__HANDLE__) \ 1618 do \ 1619 { \ 1620 exr = (__HANDLE__)->Instance->EXR; \ 1621 while ((exr & USART_EXR_BUSY) && (exr & USART_EXR_ID_Msk)) \ 1622 { \ 1623 exr = (__HANDLE__)->Instance->EXR; \ 1624 } \ 1625 } \ 1626 while (0); 1627 1628 #define HAL_UART_UNLOCK(__HANDLE__) \ 1629 do \ 1630 { \ 1631 if (0 == (exr & USART_EXR_BUSY)) \ 1632 { \ 1633 (__HANDLE__)->Instance->EXR = USART_EXR_BUSY; \ 1634 } \ 1635 } \ 1636 while (0); 1637 1638 #else 1639 #define HAL_UART_LOCK_DEF() 1640 #define HAL_UART_LOCK(__HANDLE__) 1641 #define HAL_UART_UNLOCK(__HANDLE__) 1642 #endif /* USART_EXR_BUSY */ 1643 1644 /** 1645 * @} 1646 */ 1647 1648 1649 /* Exported functions --------------------------------------------------------*/ 1650 /** @addtogroup UART_Exported_Functions UART Exported Functions 1651 * @{ 1652 */ 1653 1654 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1655 * @{ 1656 */ 1657 1658 /* Initialization and de-initialization functions ****************************/ 1659 1660 /** 1661 * @brief Initialize the UART mode according to the specified 1662 * parameters in the UART_InitTypeDef and initialize the associated handle. 1663 * @param huart UART handle. 1664 * @retval HAL status 1665 */ 1666 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1667 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1668 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1669 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1670 1671 /** 1672 * @brief DeInitialize the UART peripheral. 1673 * @param huart UART handle. 1674 * @retval HAL status 1675 */ 1676 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1677 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1678 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1679 1680 /* Callbacks Register/UnRegister functions ***********************************/ 1681 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1682 /** 1683 * @brief Register a User UART Callback 1684 * To be used instead of the weak predefined callback 1685 * @param huart uart handle 1686 * @param CallbackID ID of the callback to be registered 1687 * This parameter can be one of the following values: 1688 * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID 1689 * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID 1690 * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID 1691 * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID 1692 * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID 1693 * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID 1694 * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID 1695 * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID 1696 * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID 1697 * @arg @ref HAL_UART_RX_FIFO_FULL_CB_ID Rx Fifo Full Callback ID 1698 * @arg @ref HAL_UART_TX_FIFO_EMPTY_CB_ID Tx Fifo Empty Callback ID 1699 * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID 1700 * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID 1701 * @param pCallback pointer to the Callback function 1702 * @retval HAL status 1703 */ 1704 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, pUART_CallbackTypeDef pCallback); 1705 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1706 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1707 1708 /** 1709 * @} 1710 */ 1711 1712 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1713 * @{ 1714 */ 1715 1716 /* IO operation functions *****************************************************/ 1717 1718 /** 1719 * @brief Send an amount of data in blocking mode. 1720 * @note When FIFO mode is enabled, writing a data in the TDR register adds one 1721 * data to the TXFIFO. Write operations to the TDR register are performed 1722 * when TXFNF flag is set. From hardware perspective, TXFNF flag and 1723 * TXE are mapped on the same bit-field. 1724 * @param huart UART handle. 1725 * @param pData Pointer to data buffer. 1726 * @param Size Amount of data to be sent. 1727 * @param Timeout Timeout duration. 1728 * @retval HAL status 1729 */ 1730 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1731 1732 /** 1733 * @brief Receive an amount of data in blocking mode. 1734 * @note When FIFO mode is enabled, the RXFNE flag is set as long as the RXFIFO 1735 * is not empty. Read operations from the RDR register are performed when 1736 * RXFNE flag is set. From hardware perspective, RXFNE flag and 1737 * RXNE are mapped on the same bit-field. 1738 * @param huart UART handle. 1739 * @param pData Pointer to data buffer. 1740 * @param Size Amount of data to be received. 1741 * @param Timeout Timeout duration. 1742 * @retval HAL status 1743 */ 1744 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1745 1746 /** 1747 * @brief Send an amount of data in interrupt mode. 1748 * @param huart UART handle. 1749 * @param pData Pointer to data buffer. 1750 * @param Size Amount of data to be sent. 1751 * @retval HAL status 1752 */ 1753 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1754 1755 /** 1756 * @brief Receive an amount of data in interrupt mode. 1757 * @param huart UART handle. 1758 * @param pData Pointer to data buffer. 1759 * @param Size Amount of data to be received. 1760 * @retval HAL status 1761 */ 1762 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1763 1764 /** 1765 * @brief Send an amount of data in DMA mode. 1766 * @param huart UART handle. 1767 * @param pData Pointer to data buffer. 1768 * @param Size Amount of data to be sent. 1769 * @retval HAL status 1770 */ 1771 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1772 1773 /** 1774 * @brief Receive an amount of data in DMA mode. 1775 * @note When the UART parity is enabled (PCE = 1), the received data contain 1776 * the parity bit (MSB position). 1777 * @param huart UART handle. 1778 * @param pData Pointer to data buffer. 1779 * @param Size Amount of data to be received. 1780 * @retval HAL status 1781 */ 1782 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1783 1784 1785 /** 1786 * @brief Start UART DMA transfer 1787 * @param huart UART handle. 1788 * @param buf Buffer to receive/send from/to UART. 1789 * @param size Size of buf. 1790 * @param direction DMA_PERIPH_TO_MEMORY for uart rX, DMA_MEMORY_TO_PERIPH for uart tx. 1791 * @retval HAL status 1792 */ 1793 HAL_StatusTypeDef HAL_UART_DmaTransmit(UART_HandleTypeDef *huart, uint8_t *buf, uint32_t size, int direction); 1794 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1795 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1796 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1797 /* Transfer Abort functions */ 1798 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1799 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1800 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1801 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1802 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1803 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1804 1805 1806 /** 1807 * @brief Handle UART interrupt request. 1808 * @param huart UART handle. 1809 * @retval None 1810 */ 1811 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1812 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1813 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1814 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1815 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1816 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1817 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1818 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1819 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1820 void HAL_UART_WakeupCallback(UART_HandleTypeDef *huart); 1821 1822 1823 /** 1824 * @} 1825 */ 1826 1827 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1828 * @{ 1829 */ 1830 1831 /* Peripheral Control functions ************************************************/ 1832 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1833 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1834 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1835 /** 1836 * @} 1837 */ 1838 1839 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1840 * @{ 1841 */ 1842 1843 /* Peripheral State and Errors functions **************************************************/ 1844 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); 1845 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); 1846 1847 /** 1848 * @} 1849 */ 1850 1851 /** 1852 * @} 1853 */ 1854 1855 /* Private functions -----------------------------------------------------------*/ 1856 /** @addtogroup UART_Private_Functions UART Private Functions 1857 * @{ 1858 */ 1859 /** 1860 * @brief Configure the UART peripheral. 1861 * @param huart UART handle. 1862 * @retval HAL status 1863 */ 1864 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1865 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1866 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout); 1867 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1868 1869 /** 1870 * @} 1871 */ 1872 1873 /** 1874 * @} 1875 */ 1876 1877 /** 1878 * @} 1879 */ 1880 1881 #ifdef __cplusplus 1882 } 1883 #endif 1884 1885 #endif /* __BF0_HAL_UART_H */
