1#!/usr/bin/env python3
2
3# NOTE THIS SCRIPT IS DEPRECATED. Use 'picotool coprodis' instead
4
5import argparse, re
6
7parser = argparse.ArgumentParser(description="Disassemble RCP instructions in DIS file")
8
9parser.add_argument("input", help="Input DIS")
10parser.add_argument("output", help="Output DIS")
11
12args = parser.parse_args()
13
14fin = open(args.input, mode="r")
15contents = fin.read()
16fin.close()
17
18def gpiodir(val):
19    val = int(val)
20    if val//4 == 0:
21        return "out"
22    elif val//4 == 1:
23        return "oe"
24    elif val//4 == 2:
25        return "in"
26    else:
27        return "unknown"
28
29def gpiohilo(val):
30    val = int(val)
31    if val % 4 == 0:
32        return "lo_" + gpiodir(val)
33    elif val % 4 == 1:
34        return "hi_" + gpiodir(val)
35    else:
36        return "unknown"
37
38def gpiopxsc(val):
39    val = int(val)
40    if val == 0:
41        return "put"
42    elif val == 1:
43        return "xor"
44    elif val == 2:
45        return "set"
46    elif val == 3:
47        return "clr"
48    else:
49        return "unknown"
50
51def gpioxsc2(val):
52    val = int(val)
53    return gpiopxsc(val - 4) + ("2" if val > 4 else "")
54
55def gpioxsc(val):
56    val = int(val)
57    return gpiopxsc(val - 4)
58
59replacements = [
60    # ========================== RCP ==========================
61    (r'mrc\s*p?7, #?0, (.*), cr?(.*), cr?(.*), [\{#]1}?',   lambda m: 'rcp_canary_get {0}, 0x{1:02x} ({1}), delay'.format(m.group(1), int(m.group(2)) * 16 + int(m.group(3)))),
62    (r'mrc2\s*p?7, #?0, (.*), cr?(.*), cr?(.*), [\{#]1}?',  lambda m: 'rcp_canary_get {0}, 0x{1:02x} ({1}), nodelay'.format(m.group(1), int(m.group(2)) * 16 + int(m.group(3)))),
63    (r'mcr\s*p?7, #?0, (.*), cr?(.*), cr?(.*), [\{#]1}?',   lambda m: 'rcp_canary_check {0}, 0x{1:02x} ({1}), delay'.format(m.group(1), int(m.group(2)) * 16 + int(m.group(3)))),
64    (r'mcr2\s*p?7, #?0, (.*), cr?(.*), cr?(.*), [\{#]1}?',  lambda m: 'rcp_canary_check {0}, 0x{1:02x} ({1}), nodelay'.format(m.group(1), int(m.group(2)) * 16 + int(m.group(3)))),
65
66    (r'mrc\s*p?7, #?1, (.*), cr?(.*), cr?(.*), [\{#]0}?',   r'rcp_canary_status \1, delay'),
67    (r'mrc2\s*p?7, #?1, (.*), cr?(.*), cr?(.*), [\{#]0}?',   r'rcp_canary_status \1, nodelay'),
68    (r'mcr\s*p?7, #?1, (.*), cr?(.*), cr?(.*), [\{#]0}?',   r'rcp_bvalid \1, delay'),
69    (r'mcr2\s*p?7, #?1, (.*), cr?(.*), cr?(.*), [\{#]0}?',  r'rcp_bvalid \1, nodelay'),
70
71    (r'mcr\s*p?7, #?2, (.*), cr?(.*), cr?(.*), [\{#]0}?',   r'rcp_btrue \1, delay'),
72    (r'mcr2\s*p?7, #?2, (.*), cr?(.*), cr?(.*), [\{#]0}?',  r'rcp_btrue \1, nodelay'),
73
74    (r'mcr\s*p?7, #?3, (.*), cr?(.*), cr?(.*), [\{#]1}?',   r'rcp_bfalse \1, delay'),
75    (r'mcr2\s*p?7, #?3, (.*), cr?(.*), cr?(.*), [\{#]1}?',  r'rcp_bfalse \1, nodelay'),
76
77    (r'mcr\s*p?7, #?4, (.*), cr?(.*), cr?(.*), [\{#]0}?',   lambda m: 'rcp_count_set 0x{0:02x} ({0}), delay'.format(int(m.group(2)) * 16 + int(m.group(3)))),
78    (r'mcr2\s*p?7, #?4, (.*), cr?(.*), cr?(.*), [\{#]0}?',  lambda m: 'rcp_count_set 0x{0:02x} ({0}), nodelay'.format(int(m.group(2)) * 16 + int(m.group(3)))),
79    (r'mcr\s*p?7, #?5, (.*), cr?(.*), cr?(.*), [\{#]1}?',   lambda m: 'rcp_count_check 0x{0:02x} ({0}), delay'.format(int(m.group(2)) * 16 + int(m.group(3)))),
80    (r'mcr2\s*p?7, #?5, (.*), cr?(.*), cr?(.*), [\{#]1}?',  lambda m: 'rcp_count_check 0x{0:02x} ({0}), nodelay'.format(int(m.group(2)) * 16 + int(m.group(3)))),
81
82    (r'mcrr\s*p?7, #?0, (.*), (.*), cr?(.*)',          r'rcp_b2valid \1, \2, delay'),
83    (r'mcrr2\s*p?7, #?0, (.*), (.*), cr?(.*)',         r'rcp_b2valid \1, \2, nodelay'),
84
85    (r'mcrr\s*p?7, #?1, (.*), (.*), cr?(.*)',          r'rcp_b2and \1, \2, delay'),
86    (r'mcrr2\s*p?7, #?1, (.*), (.*), cr?(.*)',         r'rcp_b2and \1, \2, nodelay'),
87
88    (r'mcrr\s*p?7, #?2, (.*), (.*), cr?(.*)',          r'rcp_b2or \1, \2, delay'),
89    (r'mcrr2\s*p?7, #?2, (.*), (.*), cr?(.*)',         r'rcp_b2or \1, \2, nodelay'),
90
91    (r'mcrr\s*p?7, #?3, (.*), (.*), cr?(.*)',          r'rcp_bxorvalid \1, \2, delay'),
92    (r'mcrr2\s*p?7, #?3, (.*), (.*), cr?(.*)',         r'rcp_bxorvalid \1, \2, nodelay'),
93
94    (r'mcrr\s*p?7, #?4, (.*), (.*), cr?(.*)',          r'rcp_bxortrue \1, \2, delay'),
95    (r'mcrr2\s*p?7, #?4, (.*), (.*), cr?(.*)',         r'rcp_bxortrue \1, \2, nodelay'),
96
97    (r'mcrr\s*p?7, #?5, (.*), (.*), cr?(.*)',          r'rcp_bxorfalse \1, \2, delay'),
98    (r'mcrr2\s*p?7, #?5, (.*), (.*), cr?(.*)',         r'rcp_bxorfalse \1, \2, nodelay'),
99
100    (r'mcrr\s*p?7, #?6, (.*), (.*), cr?(.*)',          r'rcp_ivalid \1, \2, delay'),
101    (r'mcrr2\s*p?7, #?6, (.*), (.*), cr?(.*)',         r'rcp_ivalid \1, \2, nodelay'),
102
103    (r'mcrr\s*p?7, #?7, (.*), (.*), cr?(.*)',          r'rcp_iequal \1, \2, delay'),
104    (r'mcrr2\s*p?7, #?7, (.*), (.*), cr?(.*)',         r'rcp_iequal \1, \2, nodelay'),
105
106    (r'mcrr\s*p?7, #?8, (.*), (.*), cr?0',             r'rcp_salt_core0 \1, \2, delay'),
107    (r'mcrr2\s*p?7, #?8, (.*), (.*), cr?0',            r'rcp_salt_core0 \1, \2, nodelay'),
108
109    (r'mcrr\s*p?7, #?8, (.*), (.*), cr?1',             r'rcp_salt_core1 \1, \2, delay'),
110    (r'mcrr2\s*p?7, #?8, (.*), (.*), cr?1',            r'rcp_salt_core1 \1, \2, nodelay'),
111
112    (r'cdp\s*p?7, #?0, cr?0, cr?0, cr?0, [\{#]1}?',          r'rcp_panic'),
113
114    # ========================== DCP ==========================
115
116    ('([0-9a-f]{8}:\tee00 0400 \t).*',r'\1dcp_init'),
117    ('([0-9a-f]{8}:\tee00 0500 \t).*',r'\1dcps_init'),
118    ('([0-9a-f]{8}:\tee00 0401 \t).*',r'\1dcp_add0'),
119    ('([0-9a-f]{8}:\tee00 0501 \t).*',r'\1dcps_add0'),
120    ('([0-9a-f]{8}:\tee10 0401 \t).*',r'\1dcp_add1'),
121    ('([0-9a-f]{8}:\tee10 0501 \t).*',r'\1dcps_add1'),
122    ('([0-9a-f]{8}:\tee10 0421 \t).*',r'\1dcp_sub1'),
123    ('([0-9a-f]{8}:\tee10 0521 \t).*',r'\1dcps_sub1'),
124    ('([0-9a-f]{8}:\tee20 0401 \t).*',r'\1dcp_sqr0'),
125    ('([0-9a-f]{8}:\tee20 0501 \t).*',r'\1dcps_sqr0'),
126    ('([0-9a-f]{8}:\tee80 0402 \t).*',r'\1dcp_norm'),
127    ('([0-9a-f]{8}:\tee80 0502 \t).*',r'\1dcps_norm'),
128    ('([0-9a-f]{8}:\tee80 0422 \t).*',r'\1dcp_nrdf'),
129    ('([0-9a-f]{8}:\tee80 0522 \t).*',r'\1dcps_nrdf'),
130    ('([0-9a-f]{8}:\tee80 0420 \t).*',r'\1dcp_nrdd'),
131    ('([0-9a-f]{8}:\tee80 0520 \t).*',r'\1dcps_nrdd'),
132    ('([0-9a-f]{8}:\tee80 0440 \t).*',r'\1dcp_ntdc'),
133    ('([0-9a-f]{8}:\tee80 0540 \t).*',r'\1dcps_ntdc'),
134    ('([0-9a-f]{8}:\tee80 0460 \t).*',r'\1dcp_nrdc'),
135    ('([0-9a-f]{8}:\tee80 0560 \t).*',r'\1dcps_nrdc'),
136    ('([0-9a-f]{8}:\tec4(.) (.)400 \t).*',r'\1dcp_wxmd _cpu_reg_\3_, _cpu_reg_\2_'),
137    ('([0-9a-f]{8}:\tec4(.) (.)500 \t).*',r'\1dcps_wxmd _cpu_reg_\3_, _cpu_reg_\2_'),
138    ('([0-9a-f]{8}:\tec4(.) (.)401 \t).*',r'\1dcp_wymd _cpu_reg_\3_, _cpu_reg_\2_'),
139    ('([0-9a-f]{8}:\tec4(.) (.)501 \t).*',r'\1dcps_wymd _cpu_reg_\3_, _cpu_reg_\2_'),
140    ('([0-9a-f]{8}:\tec4(.) (.)402 \t).*',r'\1dcp_wefd _cpu_reg_\3_, _cpu_reg_\2_'),
141    ('([0-9a-f]{8}:\tec4(.) (.)502 \t).*',r'\1dcps_wefd _cpu_reg_\3_, _cpu_reg_\2_'),
142    ('([0-9a-f]{8}:\tec4(.) (.)410 \t).*',r'\1dcp_wxup _cpu_reg_\3_, _cpu_reg_\2_'),
143    ('([0-9a-f]{8}:\tec4(.) (.)510 \t).*',r'\1dcps_wxup _cpu_reg_\3_, _cpu_reg_\2_'),
144    ('([0-9a-f]{8}:\tec4(.) (.)411 \t).*',r'\1dcp_wyup _cpu_reg_\3_, _cpu_reg_\2_'),
145    ('([0-9a-f]{8}:\tec4(.) (.)511 \t).*',r'\1dcps_wyup _cpu_reg_\3_, _cpu_reg_\2_'),
146    ('([0-9a-f]{8}:\tec4(.) (.)412 \t).*',r'\1dcp_wxyu _cpu_reg_\3_, _cpu_reg_\2_'),
147    ('([0-9a-f]{8}:\tec4(.) (.)512 \t).*',r'\1dcps_wxyu _cpu_reg_\3_, _cpu_reg_\2_'),
148    ('([0-9a-f]{8}:\tec4(.) (.)420 \t).*',r'\1dcp_wxms _cpu_reg_\3_, _cpu_reg_\2_'),
149    ('([0-9a-f]{8}:\tec4(.) (.)520 \t).*',r'\1dcps_wxms _cpu_reg_\3_, _cpu_reg_\2_'),
150    ('([0-9a-f]{8}:\tec4(.) (.)430 \t).*',r'\1dcp_wxmo _cpu_reg_\3_, _cpu_reg_\2_'),
151    ('([0-9a-f]{8}:\tec4(.) (.)530 \t).*',r'\1dcps_wxmo _cpu_reg_\3_, _cpu_reg_\2_'),
152    ('([0-9a-f]{8}:\tec4(.) (.)440 \t).*',r'\1dcp_wxdd _cpu_reg_\3_, _cpu_reg_\2_'),
153    ('([0-9a-f]{8}:\tec4(.) (.)540 \t).*',r'\1dcps_wxdd _cpu_reg_\3_, _cpu_reg_\2_'),
154    ('([0-9a-f]{8}:\tec4(.) (.)450 \t).*',r'\1dcp_wxdq _cpu_reg_\3_, _cpu_reg_\2_'),
155    ('([0-9a-f]{8}:\tec4(.) (.)550 \t).*',r'\1dcps_wxdq _cpu_reg_\3_, _cpu_reg_\2_'),
156    ('([0-9a-f]{8}:\tec4(.) (.)460 \t).*',r'\1dcp_wxuc _cpu_reg_\3_, _cpu_reg_\2_'),
157    ('([0-9a-f]{8}:\tec4(.) (.)560 \t).*',r'\1dcps_wxuc _cpu_reg_\3_, _cpu_reg_\2_'),
158    ('([0-9a-f]{8}:\tec4(.) (.)470 \t).*',r'\1dcp_wxic _cpu_reg_\3_, _cpu_reg_\2_'),
159    ('([0-9a-f]{8}:\tec4(.) (.)570 \t).*',r'\1dcps_wxic _cpu_reg_\3_, _cpu_reg_\2_'),
160    ('([0-9a-f]{8}:\tec4(.) (.)480 \t).*',r'\1dcp_wxdc _cpu_reg_\3_, _cpu_reg_\2_'),
161    ('([0-9a-f]{8}:\tec4(.) (.)580 \t).*',r'\1dcps_wxdc _cpu_reg_\3_, _cpu_reg_\2_'),
162    ('([0-9a-f]{8}:\tec4(.) (.)492 \t).*',r'\1dcp_wxfc _cpu_reg_\3_, _cpu_reg_\2_'),
163    ('([0-9a-f]{8}:\tec4(.) (.)592 \t).*',r'\1dcps_wxfc _cpu_reg_\3_, _cpu_reg_\2_'),
164    ('([0-9a-f]{8}:\tec4(.) (.)4a0 \t).*',r'\1dcp_wxfm _cpu_reg_\3_, _cpu_reg_\2_'),
165    ('([0-9a-f]{8}:\tec4(.) (.)5a0 \t).*',r'\1dcps_wxfm _cpu_reg_\3_, _cpu_reg_\2_'),
166    ('([0-9a-f]{8}:\tec4(.) (.)4b0 \t).*',r'\1dcp_wxfd _cpu_reg_\3_, _cpu_reg_\2_'),
167    ('([0-9a-f]{8}:\tec4(.) (.)5b0 \t).*',r'\1dcps_wxfd _cpu_reg_\3_, _cpu_reg_\2_'),
168    ('([0-9a-f]{8}:\tec4(.) (.)4c0 \t).*',r'\1dcp_wxfq _cpu_reg_\3_, _cpu_reg_\2_'),
169    ('([0-9a-f]{8}:\tec4(.) (.)5c0 \t).*',r'\1dcps_wxfq _cpu_reg_\3_, _cpu_reg_\2_'),
170    ('([0-9a-f]{8}:\tee10 (.)410 \t).*',r'\1dcp_rxvd _cpu_reg_\2_'),
171    ('([0-9a-f]{8}:\tee10 (.)510 \t).*',r'\1dcps_rxvd _cpu_reg_\2_'),
172    ('([0-9a-f]{8}:\tee10 (.)430 \t).*',r'\1dcp_rcmp _cpu_reg_\2_'),
173    ('([0-9a-f]{8}:\tee10 (.)530 \t).*',r'\1dcps_rcmp _cpu_reg_\2_'),
174    ('([0-9a-f]{8}:\tee10 (.)412 \t).*',r'\1dcp_rdfa _cpu_reg_\2_'),
175    ('([0-9a-f]{8}:\tee10 (.)512 \t).*',r'\1dcps_rdfa _cpu_reg_\2_'),
176    ('([0-9a-f]{8}:\tee10 (.)432 \t).*',r'\1dcp_rdfs _cpu_reg_\2_'),
177    ('([0-9a-f]{8}:\tee10 (.)532 \t).*',r'\1dcps_rdfs _cpu_reg_\2_'),
178    ('([0-9a-f]{8}:\tee10 (.)452 \t).*',r'\1dcp_rdfm _cpu_reg_\2_'),
179    ('([0-9a-f]{8}:\tee10 (.)552 \t).*',r'\1dcps_rdfm _cpu_reg_\2_'),
180    ('([0-9a-f]{8}:\tee10 (.)472 \t).*',r'\1dcp_rdfd _cpu_reg_\2_'),
181    ('([0-9a-f]{8}:\tee10 (.)572 \t).*',r'\1dcps_rdfd _cpu_reg_\2_'),
182    ('([0-9a-f]{8}:\tee10 (.)492 \t).*',r'\1dcp_rdfq _cpu_reg_\2_'),
183    ('([0-9a-f]{8}:\tee10 (.)592 \t).*',r'\1dcps_rdfq _cpu_reg_\2_'),
184    ('([0-9a-f]{8}:\tee10 (.)4b2 \t).*',r'\1dcp_rdfg _cpu_reg_\2_'),
185    ('([0-9a-f]{8}:\tee10 (.)5b2 \t).*',r'\1dcps_rdfg _cpu_reg_\2_'),
186    ('([0-9a-f]{8}:\tee10 (.)413 \t).*',r'\1dcp_rdic _cpu_reg_\2_'),
187    ('([0-9a-f]{8}:\tee10 (.)513 \t).*',r'\1dcps_rdic _cpu_reg_\2_'),
188    ('([0-9a-f]{8}:\tee10 (.)433 \t).*',r'\1dcp_rduc _cpu_reg_\2_'),
189    ('([0-9a-f]{8}:\tee10 (.)533 \t).*',r'\1dcps_rduc _cpu_reg_\2_'),
190    ('([0-9a-f]{8}:\tec5(.) (.)408 \t).*',r'\1dcp_rxmd _cpu_reg_\3_, _cpu_reg_\2_'),
191    ('([0-9a-f]{8}:\tec5(.) (.)508 \t).*',r'\1dcps_rxmd _cpu_reg_\3_, _cpu_reg_\2_'),
192    ('([0-9a-f]{8}:\tec5(.) (.)409 \t).*',r'\1dcp_rymd _cpu_reg_\3_, _cpu_reg_\2_'),
193    ('([0-9a-f]{8}:\tec5(.) (.)509 \t).*',r'\1dcps_rymd _cpu_reg_\3_, _cpu_reg_\2_'),
194    ('([0-9a-f]{8}:\tec5(.) (.)40a \t).*',r'\1dcp_refd _cpu_reg_\3_, _cpu_reg_\2_'),
195    ('([0-9a-f]{8}:\tec5(.) (.)50a \t).*',r'\1dcps_refd _cpu_reg_\3_, _cpu_reg_\2_'),
196    ('([0-9a-f]{8}:\tec5(.) (.)4(.)4 \t).*',r'\1dcp_rxms _cpu_reg_\3_, _cpu_reg_\2_, #0x\4'),
197    ('([0-9a-f]{8}:\tec5(.) (.)5(.)4 \t).*',r'\1dcps_rxms _cpu_reg_\3_, _cpu_reg_\2_, #0x\4'),
198    ('([0-9a-f]{8}:\tec5(.) (.)4(.)5 \t).*',r'\1dcp_ryms _cpu_reg_\3_, _cpu_reg_\2_, #0x\4'),
199    ('([0-9a-f]{8}:\tec5(.) (.)5(.)5 \t).*',r'\1dcps_ryms _cpu_reg_\3_, _cpu_reg_\2_, #0x\4'),
200    ('([0-9a-f]{8}:\tec5(.) (.)411 \t).*',r'\1dcp_rxyh _cpu_reg_\3_, _cpu_reg_\2_'),
201    ('([0-9a-f]{8}:\tec5(.) (.)511 \t).*',r'\1dcps_rxyh _cpu_reg_\3_, _cpu_reg_\2_'),
202    ('([0-9a-f]{8}:\tec5(.) (.)421 \t).*',r'\1dcp_rymr _cpu_reg_\3_, _cpu_reg_\2_'),
203    ('([0-9a-f]{8}:\tec5(.) (.)521 \t).*',r'\1dcps_rymr _cpu_reg_\3_, _cpu_reg_\2_'),
204    ('([0-9a-f]{8}:\tec5(.) (.)441 \t).*',r'\1dcp_rxmq _cpu_reg_\3_, _cpu_reg_\2_'),
205    ('([0-9a-f]{8}:\tec5(.) (.)541 \t).*',r'\1dcps_rxmq _cpu_reg_\3_, _cpu_reg_\2_'),
206    ('([0-9a-f]{8}:\tec5(.) (.)410 \t).*',r'\1dcp_rdda _cpu_reg_\3_, _cpu_reg_\2_'),
207    ('([0-9a-f]{8}:\tec5(.) (.)510 \t).*',r'\1dcps_rdda _cpu_reg_\3_, _cpu_reg_\2_'),
208    ('([0-9a-f]{8}:\tec5(.) (.)430 \t).*',r'\1dcp_rdds _cpu_reg_\3_, _cpu_reg_\2_'),
209    ('([0-9a-f]{8}:\tec5(.) (.)530 \t).*',r'\1dcps_rdds _cpu_reg_\3_, _cpu_reg_\2_'),
210    ('([0-9a-f]{8}:\tec5(.) (.)450 \t).*',r'\1dcp_rddm _cpu_reg_\3_, _cpu_reg_\2_'),
211    ('([0-9a-f]{8}:\tec5(.) (.)550 \t).*',r'\1dcps_rddm _cpu_reg_\3_, _cpu_reg_\2_'),
212    ('([0-9a-f]{8}:\tec5(.) (.)470 \t).*',r'\1dcp_rddd _cpu_reg_\3_, _cpu_reg_\2_'),
213    ('([0-9a-f]{8}:\tec5(.) (.)570 \t).*',r'\1dcps_rddd _cpu_reg_\3_, _cpu_reg_\2_'),
214    ('([0-9a-f]{8}:\tec5(.) (.)490 \t).*',r'\1dcp_rddq _cpu_reg_\3_, _cpu_reg_\2_'),
215    ('([0-9a-f]{8}:\tec5(.) (.)590 \t).*',r'\1dcps_rddq _cpu_reg_\3_, _cpu_reg_\2_'),
216    ('([0-9a-f]{8}:\tec5(.) (.)4b0 \t).*',r'\1dcp_rddg _cpu_reg_\3_, _cpu_reg_\2_'),
217    ('([0-9a-f]{8}:\tec5(.) (.)5b0 \t).*',r'\1dcps_rddg _cpu_reg_\3_, _cpu_reg_\2_'),
218    ('([0-9a-f]{8}:\tfe10 (.)410 \t).*',r'\1dcp_pxvd _cpu_reg_\2_'),
219    ('([0-9a-f]{8}:\tfe10 (.)510 \t).*',r'\1dcps_pxvd _cpu_reg_\2_'),
220    ('([0-9a-f]{8}:\tfe10 (.)430 \t).*',r'\1dcp_pcmp _cpu_reg_\2_'),
221    ('([0-9a-f]{8}:\tfe10 (.)530 \t).*',r'\1dcps_pcmp _cpu_reg_\2_'),
222    ('([0-9a-f]{8}:\tfe10 (.)412 \t).*',r'\1dcp_pdfa _cpu_reg_\2_'),
223    ('([0-9a-f]{8}:\tfe10 (.)512 \t).*',r'\1dcps_pdfa _cpu_reg_\2_'),
224    ('([0-9a-f]{8}:\tfe10 (.)432 \t).*',r'\1dcp_pdfs _cpu_reg_\2_'),
225    ('([0-9a-f]{8}:\tfe10 (.)532 \t).*',r'\1dcps_pdfs _cpu_reg_\2_'),
226    ('([0-9a-f]{8}:\tfe10 (.)452 \t).*',r'\1dcp_pdfm _cpu_reg_\2_'),
227    ('([0-9a-f]{8}:\tfe10 (.)552 \t).*',r'\1dcps_pdfm _cpu_reg_\2_'),
228    ('([0-9a-f]{8}:\tfe10 (.)472 \t).*',r'\1dcp_pdfd _cpu_reg_\2_'),
229    ('([0-9a-f]{8}:\tfe10 (.)572 \t).*',r'\1dcps_pdfd _cpu_reg_\2_'),
230    ('([0-9a-f]{8}:\tfe10 (.)492 \t).*',r'\1dcp_pdfq _cpu_reg_\2_'),
231    ('([0-9a-f]{8}:\tfe10 (.)592 \t).*',r'\1dcps_pdfq _cpu_reg_\2_'),
232    ('([0-9a-f]{8}:\tfe10 (.)4b2 \t).*',r'\1dcp_pdfg _cpu_reg_\2_'),
233    ('([0-9a-f]{8}:\tfe10 (.)5b2 \t).*',r'\1dcps_pdfg _cpu_reg_\2_'),
234    ('([0-9a-f]{8}:\tfe10 (.)413 \t).*',r'\1dcp_pdic _cpu_reg_\2_'),
235    ('([0-9a-f]{8}:\tfe10 (.)513 \t).*',r'\1dcps_pdic _cpu_reg_\2_'),
236    ('([0-9a-f]{8}:\tfe10 (.)433 \t).*',r'\1dcp_pduc _cpu_reg_\2_'),
237    ('([0-9a-f]{8}:\tfe10 (.)533 \t).*',r'\1dcps_pduc _cpu_reg_\2_'),
238    ('([0-9a-f]{8}:\tfc5(.) (.)408 \t).*',r'\1dcp_pxmd _cpu_reg_\3_, _cpu_reg_\2_'),
239    ('([0-9a-f]{8}:\tfc5(.) (.)508 \t).*',r'\1dcps_pxmd _cpu_reg_\3_, _cpu_reg_\2_'),
240    ('([0-9a-f]{8}:\tfc5(.) (.)409 \t).*',r'\1dcp_pymd _cpu_reg_\3_, _cpu_reg_\2_'),
241    ('([0-9a-f]{8}:\tfc5(.) (.)509 \t).*',r'\1dcps_pymd _cpu_reg_\3_, _cpu_reg_\2_'),
242    ('([0-9a-f]{8}:\tfc5(.) (.)40a \t).*',r'\1dcp_pefd _cpu_reg_\3_, _cpu_reg_\2_'),
243    ('([0-9a-f]{8}:\tfc5(.) (.)50a \t).*',r'\1dcps_pefd _cpu_reg_\3_, _cpu_reg_\2_'),
244    ('([0-9a-f]{8}:\tfc5(.) (.)4(.)4 \t).*',r'\1dcp_pxms _cpu_reg_\3_, _cpu_reg_\2_, #0x\4'),
245    ('([0-9a-f]{8}:\tfc5(.) (.)5(.)4 \t).*',r'\1dcps_pxms _cpu_reg_\3_, _cpu_reg_\2_, #0x\4'),
246    ('([0-9a-f]{8}:\tfc5(.) (.)4(.)5 \t).*',r'\1dcp_pyms _cpu_reg_\3_, _cpu_reg_\2_, #0x\4'),
247    ('([0-9a-f]{8}:\tfc5(.) (.)5(.)5 \t).*',r'\1dcps_pyms _cpu_reg_\3_, _cpu_reg_\2_, #0x\4'),
248    ('([0-9a-f]{8}:\tfc5(.) (.)411 \t).*',r'\1dcp_pxyh _cpu_reg_\3_, _cpu_reg_\2_'),
249    ('([0-9a-f]{8}:\tfc5(.) (.)511 \t).*',r'\1dcps_pxyh _cpu_reg_\3_, _cpu_reg_\2_'),
250    ('([0-9a-f]{8}:\tfc5(.) (.)421 \t).*',r'\1dcp_pymr _cpu_reg_\3_, _cpu_reg_\2_'),
251    ('([0-9a-f]{8}:\tfc5(.) (.)521 \t).*',r'\1dcps_pymr _cpu_reg_\3_, _cpu_reg_\2_'),
252    ('([0-9a-f]{8}:\tfc5(.) (.)441 \t).*',r'\1dcp_pxmq _cpu_reg_\3_, _cpu_reg_\2_'),
253    ('([0-9a-f]{8}:\tfc5(.) (.)541 \t).*',r'\1dcps_pxmq _cpu_reg_\3_, _cpu_reg_\2_'),
254    ('([0-9a-f]{8}:\tfc5(.) (.)410 \t).*',r'\1dcp_pdda _cpu_reg_\3_, _cpu_reg_\2_'),
255    ('([0-9a-f]{8}:\tfc5(.) (.)510 \t).*',r'\1dcps_pdda _cpu_reg_\3_, _cpu_reg_\2_'),
256    ('([0-9a-f]{8}:\tfc5(.) (.)430 \t).*',r'\1dcp_pdds _cpu_reg_\3_, _cpu_reg_\2_'),
257    ('([0-9a-f]{8}:\tfc5(.) (.)530 \t).*',r'\1dcps_pdds _cpu_reg_\3_, _cpu_reg_\2_'),
258    ('([0-9a-f]{8}:\tfc5(.) (.)450 \t).*',r'\1dcp_pddm _cpu_reg_\3_, _cpu_reg_\2_'),
259    ('([0-9a-f]{8}:\tfc5(.) (.)550 \t).*',r'\1dcps_pddm _cpu_reg_\3_, _cpu_reg_\2_'),
260    ('([0-9a-f]{8}:\tfc5(.) (.)470 \t).*',r'\1dcp_pddd _cpu_reg_\3_, _cpu_reg_\2_'),
261    ('([0-9a-f]{8}:\tfc5(.) (.)570 \t).*',r'\1dcps_pddd _cpu_reg_\3_, _cpu_reg_\2_'),
262    ('([0-9a-f]{8}:\tfc5(.) (.)490 \t).*',r'\1dcp_pddq _cpu_reg_\3_, _cpu_reg_\2_'),
263    ('([0-9a-f]{8}:\tfc5(.) (.)590 \t).*',r'\1dcps_pddq _cpu_reg_\3_, _cpu_reg_\2_'),
264    ('([0-9a-f]{8}:\tfc5(.) (.)4b0 \t).*',r'\1dcp_pddg _cpu_reg_\3_, _cpu_reg_\2_'),
265    ('([0-9a-f]{8}:\tfc5(.) (.)5b0 \t).*',r'\1dcps_pddg _cpu_reg_\3_, _cpu_reg_\2_'),
266    ('_cpu_reg_([0-9])_', r'r\1'),
267    ('_cpu_reg_a_', r'sl'),
268    ('_cpu_reg_b_', r'fp'),
269    ('_cpu_reg_c_', r'ip'),
270    ('_cpu_reg_d_', r'sp'),
271    ('_cpu_reg_e_', r'lr'),
272    ('_cpu_reg_f_', r'pc'),
273
274    # ========================== GPIO ==========================
275
276    # OUT and OE mask write instructions
277    (r'mcr\s*p?0, #?([0-3]), (.*), cr?0, cr?([0145])', lambda m: 'gpioc_{0}_{1} {2}'.format(
278        gpiohilo(m.group(3)), gpiopxsc(m.group(1)), m.group(2)
279    )),
280    (r'mcrr\s*p?0, #?([0-3]), (.*), (.*), cr?([04])', lambda m: 'gpioc_hilo_{0}_{1} {2}, {3}'.format(
281        gpiodir(m.group(4)), gpiopxsc(m.group(1)), m.group(2), m.group(3)
282    )),
283    # Single-bit write instructions
284    (r'mcrr\s*p?0, #?([4-7]), (.*), (.*), cr?([04])', lambda m: 'gpioc_bit_{0}_{1} {2}, {3}'.format(
285        gpiodir(m.group(4)), gpioxsc2(m.group(1)), m.group(2), m.group(3)
286    )),
287    (r'mcr\s*p?0, #?([5-7]), (.*), cr?0, cr?([04])', lambda m: 'gpioc_bit_{0}_{1} {2}'.format(
288        gpiodir(m.group(3)), gpioxsc(m.group(1)), m.group(2)
289    )),
290    # Indexed mask write instructions -- write to a dynamically selected 32-bit
291    (r'mcrr\s*p?0, #?(8|9|10|11), (.*), (.*), cr?([04])', lambda m: 'gpioc_index_{0}_{1} {2}, {3}'.format(
292        gpiodir(m.group(4)), gpiopxsc(int(m.group(1)) - 8), m.group(2), m.group(3)
293    )),
294    # Read instructions
295    (r'mrc\s*p?0, #?0, (.*), cr?0, cr?([014589])', lambda m: 'gpioc_{0}_get {1}'.format(
296        gpiohilo(m.group(2)), m.group(1)
297    )),
298    (r'mrrc\s*p?0, #?0, (.*), (.*), cr?([048])', lambda m: 'gpioc_hilo_{0}_get {1}, {2}'.format(
299        gpiodir(m.group(3)), m.group(1), m.group(2)
300    )),
301]
302
303# Add clang DCP replacements
304for pat, rep in replacements:
305    if pat.startswith('([0-9a-f]{8}:\t'):
306        mid = pat.split('\t')[1]
307        left, right = mid.split(' ')[0:2]
308        if len(right) > 6:
309            new_pat = f"([0-9a-f]{{8}}:\s*{left[2:]} {left[0:2]} {right[4:]} {right[:4]} \s*).*"
310            new_rep = rep.replace('3', '7')
311            new_rep = new_rep.replace('4', '3')
312            new_rep = new_rep.replace('7', '4')
313            replacements.append((new_pat, new_rep))
314        else:
315            replacements.append((f"([0-9a-f]{{8}}:\s*{left[2:]} {left[0:2]} {right[-2:]} {right[:-2]} \s*).*", rep))
316
317for pat, rep in replacements:
318    contents = re.sub(pat, rep, contents)
319
320fout = open(args.output, mode="w")
321fout.write(contents)
322fout.close()
323