1 // THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT 2 3 /** 4 * Copyright (c) 2024 Raspberry Pi Ltd. 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 */ 8 #ifndef _HARDWARE_STRUCTS_SYSINFO_H 9 #define _HARDWARE_STRUCTS_SYSINFO_H 10 11 /** 12 * \file rp2350/sysinfo.h 13 */ 14 15 #include "hardware/address_mapped.h" 16 #include "hardware/regs/sysinfo.h" 17 18 // Reference to datasheet: https://datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf#tab-registerlist_sysinfo 19 // 20 // The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the "Go to Definition" feature) 21 // _REG_(x) will link to the corresponding register in hardware/regs/sysinfo.h. 22 // 23 // Bit-field descriptions are of the form: 24 // BITMASK [BITRANGE] FIELDNAME (RESETVALUE) DESCRIPTION 25 26 typedef struct { 27 _REG_(SYSINFO_CHIP_ID_OFFSET) // SYSINFO_CHIP_ID 28 // JEDEC JEP-106 compliant chip identifier 29 // 0xf0000000 [31:28] REVISION (-) 30 // 0x0ffff000 [27:12] PART (-) 31 // 0x00000ffe [11:1] MANUFACTURER (-) 32 // 0x00000001 [0] STOP_BIT (1) 33 io_ro_32 chip_id; 34 35 _REG_(SYSINFO_PACKAGE_SEL_OFFSET) // SYSINFO_PACKAGE_SEL 36 // 0x00000001 [0] PACKAGE_SEL (0) 37 io_ro_32 package_sel; 38 39 _REG_(SYSINFO_PLATFORM_OFFSET) // SYSINFO_PLATFORM 40 // Platform register 41 // 0x00000010 [4] GATESIM (-) 42 // 0x00000008 [3] BATCHSIM (-) 43 // 0x00000004 [2] HDLSIM (-) 44 // 0x00000002 [1] ASIC (-) 45 // 0x00000001 [0] FPGA (-) 46 io_ro_32 platform; 47 48 uint32_t _pad0[2]; 49 50 _REG_(SYSINFO_GITREF_RP2350_OFFSET) // SYSINFO_GITREF_RP2350 51 // Git hash of the chip source 52 // 0xffffffff [31:0] GITREF_RP2350 (-) 53 io_ro_32 gitref_rp2350; 54 } sysinfo_hw_t; 55 56 #define sysinfo_hw ((sysinfo_hw_t *)SYSINFO_BASE) 57 static_assert(sizeof (sysinfo_hw_t) == 0x0018, ""); 58 59 #endif // _HARDWARE_STRUCTS_SYSINFO_H 60 61
