1 // THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT 2 3 /** 4 * Copyright (c) 2024 Raspberry Pi Ltd. 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 */ 8 #ifndef _HARDWARE_STRUCTS_SYSCFG_H 9 #define _HARDWARE_STRUCTS_SYSCFG_H 10 11 /** 12 * \file rp2350/syscfg.h 13 */ 14 15 #include "hardware/address_mapped.h" 16 #include "hardware/regs/syscfg.h" 17 18 // Reference to datasheet: https://datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf#tab-registerlist_syscfg 19 // 20 // The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the "Go to Definition" feature) 21 // _REG_(x) will link to the corresponding register in hardware/regs/syscfg.h. 22 // 23 // Bit-field descriptions are of the form: 24 // BITMASK [BITRANGE] FIELDNAME (RESETVALUE) DESCRIPTION 25 26 typedef struct { 27 _REG_(SYSCFG_PROC_CONFIG_OFFSET) // SYSCFG_PROC_CONFIG 28 // Configuration for processors 29 // 0x00000002 [1] PROC1_HALTED (0) Indication that proc1 has halted 30 // 0x00000001 [0] PROC0_HALTED (0) Indication that proc0 has halted 31 io_ro_32 proc_config; 32 33 _REG_(SYSCFG_PROC_IN_SYNC_BYPASS_OFFSET) // SYSCFG_PROC_IN_SYNC_BYPASS 34 // For each bit, if 1, bypass the input synchronizer between that GPIO + 35 // 0xffffffff [31:0] GPIO (0x00000000) 36 io_rw_32 proc_in_sync_bypass; 37 38 _REG_(SYSCFG_PROC_IN_SYNC_BYPASS_HI_OFFSET) // SYSCFG_PROC_IN_SYNC_BYPASS_HI 39 // For each bit, if 1, bypass the input synchronizer between that GPIO + 40 // 0xf0000000 [31:28] QSPI_SD (0x0) 41 // 0x08000000 [27] QSPI_CSN (0) 42 // 0x04000000 [26] QSPI_SCK (0) 43 // 0x02000000 [25] USB_DM (0) 44 // 0x01000000 [24] USB_DP (0) 45 // 0x0000ffff [15:0] GPIO (0x0000) 46 io_rw_32 proc_in_sync_bypass_hi; 47 48 _REG_(SYSCFG_DBGFORCE_OFFSET) // SYSCFG_DBGFORCE 49 // Directly control the chip SWD debug port 50 // 0x00000008 [3] ATTACH (0) Attach chip debug port to syscfg controls, and... 51 // 0x00000004 [2] SWCLK (1) Directly drive SWCLK, if ATTACH is set 52 // 0x00000002 [1] SWDI (1) Directly drive SWDIO input, if ATTACH is set 53 // 0x00000001 [0] SWDO (-) Observe the value of SWDIO output 54 io_rw_32 dbgforce; 55 56 _REG_(SYSCFG_MEMPOWERDOWN_OFFSET) // SYSCFG_MEMPOWERDOWN 57 // Control PD pins to memories 58 // 0x00001000 [12] BOOTRAM (0) 59 // 0x00000800 [11] ROM (0) 60 // 0x00000400 [10] USB (0) 61 // 0x00000200 [9] SRAM9 (0) 62 // 0x00000100 [8] SRAM8 (0) 63 // 0x00000080 [7] SRAM7 (0) 64 // 0x00000040 [6] SRAM6 (0) 65 // 0x00000020 [5] SRAM5 (0) 66 // 0x00000010 [4] SRAM4 (0) 67 // 0x00000008 [3] SRAM3 (0) 68 // 0x00000004 [2] SRAM2 (0) 69 // 0x00000002 [1] SRAM1 (0) 70 // 0x00000001 [0] SRAM0 (0) 71 io_rw_32 mempowerdown; 72 73 _REG_(SYSCFG_AUXCTRL_OFFSET) // SYSCFG_AUXCTRL 74 // Auxiliary system control register 75 // 0x000000ff [7:0] AUXCTRL (0x00) * Bits 7:2: Reserved 76 io_rw_32 auxctrl; 77 } syscfg_hw_t; 78 79 #define syscfg_hw ((syscfg_hw_t *)SYSCFG_BASE) 80 static_assert(sizeof (syscfg_hw_t) == 0x0018, ""); 81 82 #endif // _HARDWARE_STRUCTS_SYSCFG_H 83 84
