1 // THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
2 
3 /**
4  * Copyright (c) 2024 Raspberry Pi Ltd.
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 #ifndef _HARDWARE_STRUCTS_SHA256_H
9 #define _HARDWARE_STRUCTS_SHA256_H
10 
11 /**
12  * \file rp2350/sha256.h
13  */
14 
15 #include "hardware/address_mapped.h"
16 #include "hardware/regs/sha256.h"
17 
18 // Reference to datasheet: https://datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf#tab-registerlist_sha256
19 //
20 // The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the "Go to Definition" feature)
21 // _REG_(x) will link to the corresponding register in hardware/regs/sha256.h.
22 //
23 // Bit-field descriptions are of the form:
24 // BITMASK [BITRANGE] FIELDNAME (RESETVALUE) DESCRIPTION
25 
26 typedef struct {
27     _REG_(SHA256_CSR_OFFSET) // SHA256_CSR
28     // Control and status register
29     // 0x00001000 [12]    BSWAP        (1) Enable byte swapping of 32-bit values at the point they...
30     // 0x00000300 [9:8]   DMA_SIZE     (0x2) Configure DREQ logic for the correct DMA data size
31     // 0x00000010 [4]     ERR_WDATA_NOT_RDY (0) Set when a write occurs whilst the SHA-256 core is not...
32     // 0x00000004 [2]     SUM_VLD      (1) If 1, the SHA-256 checksum presented in registers SUM0...
33     // 0x00000002 [1]     WDATA_RDY    (1) If 1, the SHA-256 core is ready to accept more data...
34     // 0x00000001 [0]     START        (0) Write 1 to prepare the SHA-256 core for a new checksum
35     io_rw_32 csr;
36 
37     _REG_(SHA256_WDATA_OFFSET) // SHA256_WDATA
38     // Write data register
39     // 0xffffffff [31:0]  WDATA        (0x00000000) After pulsing START and writing 16 words of data to this...
40     io_wo_32 wdata;
41 
42     // (Description copied from array index 0 register SHA256_SUM0 applies similarly to other array indexes)
43     _REG_(SHA256_SUM0_OFFSET) // SHA256_SUM0
44     // 256-bit checksum result
45     // 0xffffffff [31:0]  SUM0         (0x00000000)
46     io_ro_32 sum[8];
47 } sha256_hw_t;
48 
49 #define sha256_hw ((sha256_hw_t *)SHA256_BASE)
50 static_assert(sizeof (sha256_hw_t) == 0x0028, "");
51 
52 #endif // _HARDWARE_STRUCTS_SHA256_H
53 
54