1 // THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT 2 3 /** 4 * Copyright (c) 2024 Raspberry Pi Ltd. 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 */ 8 #ifndef _HARDWARE_STRUCTS_XOSC_H 9 #define _HARDWARE_STRUCTS_XOSC_H 10 11 /** 12 * \file rp2040/xosc.h 13 */ 14 15 #include "hardware/address_mapped.h" 16 #include "hardware/regs/xosc.h" 17 18 // Reference to datasheet: https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf#tab-registerlist_xosc 19 // 20 // The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the "Go to Definition" feature) 21 // _REG_(x) will link to the corresponding register in hardware/regs/xosc.h. 22 // 23 // Bit-field descriptions are of the form: 24 // BITMASK [BITRANGE] FIELDNAME (RESETVALUE) DESCRIPTION 25 26 /// \tag::xosc_hw[] 27 typedef struct { 28 _REG_(XOSC_CTRL_OFFSET) // XOSC_CTRL 29 // Crystal Oscillator Control 30 // 0x00fff000 [23:12] ENABLE (-) On power-up this field is initialised to DISABLE and the... 31 // 0x00000fff [11:0] FREQ_RANGE (-) Frequency range 32 io_rw_32 ctrl; 33 34 _REG_(XOSC_STATUS_OFFSET) // XOSC_STATUS 35 // Crystal Oscillator Status 36 // 0x80000000 [31] STABLE (0) Oscillator is running and stable 37 // 0x01000000 [24] BADWRITE (0) An invalid value has been written to CTRL_ENABLE or... 38 // 0x00001000 [12] ENABLED (-) Oscillator is enabled but not necessarily running and... 39 // 0x00000003 [1:0] FREQ_RANGE (-) The current frequency range setting, always reads 0 40 io_rw_32 status; 41 42 _REG_(XOSC_DORMANT_OFFSET) // XOSC_DORMANT 43 // Crystal Oscillator pause control 44 // 0xffffffff [31:0] DORMANT (-) This is used to save power by pausing the XOSC + 45 io_rw_32 dormant; 46 47 _REG_(XOSC_STARTUP_OFFSET) // XOSC_STARTUP 48 // Controls the startup delay 49 // 0x00100000 [20] X4 (-) Multiplies the startup_delay by 4 50 // 0x00003fff [13:0] DELAY (-) in multiples of 256*xtal_period 51 io_rw_32 startup; 52 53 uint32_t _pad0[3]; 54 55 _REG_(XOSC_COUNT_OFFSET) // XOSC_COUNT 56 // A down counter running at the XOSC frequency which counts to zero and stops. 57 // 0x000000ff [7:0] COUNT (0x00) 58 io_rw_32 count; 59 } xosc_hw_t; 60 /// \end::xosc_hw[] 61 62 #define xosc_hw ((xosc_hw_t *)XOSC_BASE) 63 static_assert(sizeof (xosc_hw_t) == 0x0020, ""); 64 65 #endif // _HARDWARE_STRUCTS_XOSC_H 66 67
