1 /*
2 * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include "hardware/flash.h"
8 #include "pico/bootrom.h"
9
10 #include "hardware/structs/ssi.h"
11 #include "hardware/structs/ioqspi.h"
12
13 #define FLASH_BLOCK_ERASE_CMD 0xd8
14
15 // Standard RUID instruction: 4Bh command prefix, 32 dummy bits, 64 data bits.
16 #define FLASH_RUID_CMD 0x4b
17 #define FLASH_RUID_DUMMY_BYTES 4
18 #define FLASH_RUID_DATA_BYTES 8
19 #define FLASH_RUID_TOTAL_BYTES (1 + FLASH_RUID_DUMMY_BYTES + FLASH_RUID_DATA_BYTES)
20
21 //-----------------------------------------------------------------------------
22 // Infrastructure for reentering XIP mode after exiting for programming (take
23 // a copy of boot2 before XIP exit). Calling boot2 as a function works because
24 // it accepts a return vector in LR (and doesn't trash r4-r7). Bootrom passes
25 // NULL in LR, instructing boot2 to enter flash vector table's reset handler.
26
27 #if !PICO_NO_FLASH
28
29 #define BOOT2_SIZE_WORDS 64
30
31 static uint32_t boot2_copyout[BOOT2_SIZE_WORDS];
32 static bool boot2_copyout_valid = false;
33
__no_inline_not_in_flash_func(flash_init_boot2_copyout)34 static void __no_inline_not_in_flash_func(flash_init_boot2_copyout)(void) {
35 if (boot2_copyout_valid)
36 return;
37 for (int i = 0; i < BOOT2_SIZE_WORDS; ++i)
38 boot2_copyout[i] = ((uint32_t *)XIP_BASE)[i];
39 __compiler_memory_barrier();
40 boot2_copyout_valid = true;
41 }
42
__no_inline_not_in_flash_func(flash_enable_xip_via_boot2)43 static void __no_inline_not_in_flash_func(flash_enable_xip_via_boot2)(void) {
44 ((void (*)(void))boot2_copyout+1)();
45 }
46
47 #else
48
__no_inline_not_in_flash_func(flash_init_boot2_copyout)49 static void __no_inline_not_in_flash_func(flash_init_boot2_copyout)(void) {}
50
__no_inline_not_in_flash_func(flash_enable_xip_via_boot2)51 static void __no_inline_not_in_flash_func(flash_enable_xip_via_boot2)(void) {
52 // Set up XIP for 03h read on bus access (slow but generic)
53 rom_flash_enter_cmd_xip_fn flash_enter_cmd_xip = (rom_flash_enter_cmd_xip_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_ENTER_CMD_XIP);
54 assert(flash_enter_cmd_xip);
55 flash_enter_cmd_xip();
56 }
57
58 #endif
59
60 //-----------------------------------------------------------------------------
61 // Actual flash programming shims (work whether or not PICO_NO_FLASH==1)
62
__no_inline_not_in_flash_func(flash_range_erase)63 void __no_inline_not_in_flash_func(flash_range_erase)(uint32_t flash_offs, size_t count) {
64 #ifdef PICO_FLASH_SIZE_BYTES
65 hard_assert(flash_offs + count <= PICO_FLASH_SIZE_BYTES);
66 #endif
67 invalid_params_if(FLASH, flash_offs & (FLASH_SECTOR_SIZE - 1));
68 invalid_params_if(FLASH, count & (FLASH_SECTOR_SIZE - 1));
69 rom_connect_internal_flash_fn connect_internal_flash = (rom_connect_internal_flash_fn)rom_func_lookup_inline(ROM_FUNC_CONNECT_INTERNAL_FLASH);
70 rom_flash_exit_xip_fn flash_exit_xip = (rom_flash_exit_xip_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_EXIT_XIP);
71 rom_flash_range_erase_fn flash_range_erase = (rom_flash_range_erase_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_RANGE_ERASE);
72 rom_flash_flush_cache_fn flash_flush_cache = (rom_flash_flush_cache_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_FLUSH_CACHE);
73 assert(connect_internal_flash && flash_exit_xip && flash_range_erase && flash_flush_cache);
74 flash_init_boot2_copyout();
75
76 // No flash accesses after this point
77 __compiler_memory_barrier();
78
79 connect_internal_flash();
80 flash_exit_xip();
81 flash_range_erase(flash_offs, count, FLASH_BLOCK_SIZE, FLASH_BLOCK_ERASE_CMD);
82 flash_flush_cache(); // Note this is needed to remove CSn IO force as well as cache flushing
83 flash_enable_xip_via_boot2();
84 }
85
__no_inline_not_in_flash_func(flash_range_program)86 void __no_inline_not_in_flash_func(flash_range_program)(uint32_t flash_offs, const uint8_t *data, size_t count) {
87 #ifdef PICO_FLASH_SIZE_BYTES
88 hard_assert(flash_offs + count <= PICO_FLASH_SIZE_BYTES);
89 #endif
90 invalid_params_if(FLASH, flash_offs & (FLASH_PAGE_SIZE - 1));
91 invalid_params_if(FLASH, count & (FLASH_PAGE_SIZE - 1));
92 rom_connect_internal_flash_fn connect_internal_flash = (rom_connect_internal_flash_fn)rom_func_lookup_inline(ROM_FUNC_CONNECT_INTERNAL_FLASH);
93 rom_flash_exit_xip_fn flash_exit_xip = (rom_flash_exit_xip_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_EXIT_XIP);
94 rom_flash_range_program_fn flash_range_program = (rom_flash_range_program_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_RANGE_PROGRAM);
95 rom_flash_flush_cache_fn flash_flush_cache = (rom_flash_flush_cache_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_FLUSH_CACHE);
96 assert(connect_internal_flash && flash_exit_xip && flash_range_program && flash_flush_cache);
97 flash_init_boot2_copyout();
98
99 __compiler_memory_barrier();
100
101 connect_internal_flash();
102 flash_exit_xip();
103 flash_range_program(flash_offs, data, count);
104 flash_flush_cache(); // Note this is needed to remove CSn IO force as well as cache flushing
105 flash_enable_xip_via_boot2();
106 }
107
108 //-----------------------------------------------------------------------------
109 // Lower-level flash access functions
110
111 #if !PICO_NO_FLASH
112 // Bitbanging the chip select using IO overrides, in case RAM-resident IRQs
113 // are still running, and the FIFO bottoms out. (the bootrom does the same)
__no_inline_not_in_flash_func(flash_cs_force)114 static void __no_inline_not_in_flash_func(flash_cs_force)(bool high) {
115 uint32_t field_val = high ?
116 IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_VALUE_HIGH :
117 IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_VALUE_LOW;
118 hw_write_masked(&ioqspi_hw->io[1].ctrl,
119 field_val << IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_LSB,
120 IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_BITS
121 );
122 }
123
__no_inline_not_in_flash_func(flash_do_cmd)124 void __no_inline_not_in_flash_func(flash_do_cmd)(const uint8_t *txbuf, uint8_t *rxbuf, size_t count) {
125 rom_connect_internal_flash_fn connect_internal_flash = (rom_connect_internal_flash_fn)rom_func_lookup_inline(ROM_FUNC_CONNECT_INTERNAL_FLASH);
126 rom_flash_exit_xip_fn flash_exit_xip = (rom_flash_exit_xip_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_EXIT_XIP);
127 rom_flash_flush_cache_fn flash_flush_cache = (rom_flash_flush_cache_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_FLUSH_CACHE);
128 assert(connect_internal_flash && flash_exit_xip && flash_flush_cache);
129 flash_init_boot2_copyout();
130 __compiler_memory_barrier();
131 connect_internal_flash();
132 flash_exit_xip();
133
134 flash_cs_force(0);
135 size_t tx_remaining = count;
136 size_t rx_remaining = count;
137 // We may be interrupted -- don't want FIFO to overflow if we're distracted.
138 const size_t max_in_flight = 16 - 2;
139 while (tx_remaining || rx_remaining) {
140 uint32_t flags = ssi_hw->sr;
141 bool can_put = !!(flags & SSI_SR_TFNF_BITS);
142 bool can_get = !!(flags & SSI_SR_RFNE_BITS);
143 if (can_put && tx_remaining && rx_remaining - tx_remaining < max_in_flight) {
144 ssi_hw->dr0 = *txbuf++;
145 --tx_remaining;
146 }
147 if (can_get && rx_remaining) {
148 *rxbuf++ = (uint8_t)ssi_hw->dr0;
149 --rx_remaining;
150 }
151 }
152 flash_cs_force(1);
153
154 flash_flush_cache();
155 flash_enable_xip_via_boot2();
156 }
157 #endif
158
159 // Use standard RUID command to get a unique identifier for the flash (and
160 // hence the board)
161
162 static_assert(FLASH_UNIQUE_ID_SIZE_BYTES == FLASH_RUID_DATA_BYTES, "");
163
flash_get_unique_id(uint8_t * id_out)164 void flash_get_unique_id(uint8_t *id_out) {
165 #if PICO_NO_FLASH
166 __unused uint8_t *ignore = id_out;
167 panic_unsupported();
168 #else
169 uint8_t txbuf[FLASH_RUID_TOTAL_BYTES] = {0};
170 uint8_t rxbuf[FLASH_RUID_TOTAL_BYTES] = {0};
171 txbuf[0] = FLASH_RUID_CMD;
172 flash_do_cmd(txbuf, rxbuf, FLASH_RUID_TOTAL_BYTES);
173 for (int i = 0; i < FLASH_RUID_DATA_BYTES; i++)
174 id_out[i] = rxbuf[i + 1 + FLASH_RUID_DUMMY_BYTES];
175 #endif
176 }
177
