1 // THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT 2 3 /* 4 * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 */ 8 9 #ifndef _HARDWARE_STRUCTS_RTC_H 10 #define _HARDWARE_STRUCTS_RTC_H 11 12 #include "hardware/address_mapped.h" 13 #include "hardware/regs/rtc.h" 14 15 // Reference to datasheet: https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf#tab-registerlist_rtc 16 // 17 // The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the "Go to Definition" feature) 18 // _REG_(x) will link to the corresponding register in hardware/regs/rtc.h. 19 // 20 // Bit-field descriptions are of the form: 21 // BITMASK [BITRANGE]: FIELDNAME (RESETVALUE): DESCRIPTION 22 23 typedef struct { 24 _REG_(RTC_CLKDIV_M1_OFFSET) // RTC_CLKDIV_M1 25 // Divider minus 1 for the 1 second counter 26 // 0x0000ffff [15:0] : CLKDIV_M1 (0) 27 io_rw_32 clkdiv_m1; 28 29 _REG_(RTC_SETUP_0_OFFSET) // RTC_SETUP_0 30 // RTC setup register 0 31 // 0x00fff000 [23:12] : YEAR (0): Year 32 // 0x00000f00 [11:8] : MONTH (0): Month (1 33 // 0x0000001f [4:0] : DAY (0): Day of the month (1 34 io_rw_32 setup_0; 35 36 _REG_(RTC_SETUP_1_OFFSET) // RTC_SETUP_1 37 // RTC setup register 1 38 // 0x07000000 [26:24] : DOTW (0): Day of the week: 1-Monday 39 // 0x001f0000 [20:16] : HOUR (0): Hours 40 // 0x00003f00 [13:8] : MIN (0): Minutes 41 // 0x0000003f [5:0] : SEC (0): Seconds 42 io_rw_32 setup_1; 43 44 _REG_(RTC_CTRL_OFFSET) // RTC_CTRL 45 // RTC Control and status 46 // 0x00000100 [8] : FORCE_NOTLEAPYEAR (0): If set, leapyear is forced off 47 // 0x00000010 [4] : LOAD (0): Load RTC 48 // 0x00000002 [1] : RTC_ACTIVE (0): RTC enabled (running) 49 // 0x00000001 [0] : RTC_ENABLE (0): Enable RTC 50 io_rw_32 ctrl; 51 52 _REG_(RTC_IRQ_SETUP_0_OFFSET) // RTC_IRQ_SETUP_0 53 // Interrupt setup register 0 54 // 0x20000000 [29] : MATCH_ACTIVE (0) 55 // 0x10000000 [28] : MATCH_ENA (0): Global match enable 56 // 0x04000000 [26] : YEAR_ENA (0): Enable year matching 57 // 0x02000000 [25] : MONTH_ENA (0): Enable month matching 58 // 0x01000000 [24] : DAY_ENA (0): Enable day matching 59 // 0x00fff000 [23:12] : YEAR (0): Year 60 // 0x00000f00 [11:8] : MONTH (0): Month (1 61 // 0x0000001f [4:0] : DAY (0): Day of the month (1 62 io_rw_32 irq_setup_0; 63 64 _REG_(RTC_IRQ_SETUP_1_OFFSET) // RTC_IRQ_SETUP_1 65 // Interrupt setup register 1 66 // 0x80000000 [31] : DOTW_ENA (0): Enable day of the week matching 67 // 0x40000000 [30] : HOUR_ENA (0): Enable hour matching 68 // 0x20000000 [29] : MIN_ENA (0): Enable minute matching 69 // 0x10000000 [28] : SEC_ENA (0): Enable second matching 70 // 0x07000000 [26:24] : DOTW (0): Day of the week 71 // 0x001f0000 [20:16] : HOUR (0): Hours 72 // 0x00003f00 [13:8] : MIN (0): Minutes 73 // 0x0000003f [5:0] : SEC (0): Seconds 74 io_rw_32 irq_setup_1; 75 76 _REG_(RTC_RTC_1_OFFSET) // RTC_RTC_1 77 // RTC register 1 78 // 0x00fff000 [23:12] : YEAR (0): Year 79 // 0x00000f00 [11:8] : MONTH (0): Month (1 80 // 0x0000001f [4:0] : DAY (0): Day of the month (1 81 io_ro_32 rtc_1; 82 83 _REG_(RTC_RTC_0_OFFSET) // RTC_RTC_0 84 // RTC register 0 85 // 0x07000000 [26:24] : DOTW (0): Day of the week 86 // 0x001f0000 [20:16] : HOUR (0): Hours 87 // 0x00003f00 [13:8] : MIN (0): Minutes 88 // 0x0000003f [5:0] : SEC (0): Seconds 89 io_ro_32 rtc_0; 90 91 _REG_(RTC_INTR_OFFSET) // RTC_INTR 92 // Raw Interrupts 93 // 0x00000001 [0] : RTC (0) 94 io_ro_32 intr; 95 96 _REG_(RTC_INTE_OFFSET) // RTC_INTE 97 // Interrupt Enable 98 // 0x00000001 [0] : RTC (0) 99 io_rw_32 inte; 100 101 _REG_(RTC_INTF_OFFSET) // RTC_INTF 102 // Interrupt Force 103 // 0x00000001 [0] : RTC (0) 104 io_rw_32 intf; 105 106 _REG_(RTC_INTS_OFFSET) // RTC_INTS 107 // Interrupt status after masking & forcing 108 // 0x00000001 [0] : RTC (0) 109 io_ro_32 ints; 110 } rtc_hw_t; 111 112 #define rtc_hw ((rtc_hw_t *)RTC_BASE) 113 114 #endif 115
