1 /*
2 * Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6 
7 /***********************************************************************************************************************
8  * Includes   <System Includes> , "Project Includes"
9  **********************************************************************************************************************/
10 #include "bsp_api.h"
11 
12 /***********************************************************************************************************************
13  * Macro definitions
14  **********************************************************************************************************************/
15 #define BSP_PRV_AIRCR_VECTKEY              (0x05FA0000U)
16 #define FSP_NOT_DEFINED                    (0)
17 
18 #define BSP_PRV_CLEAR_THUMB_INSTRUCTION    (0xFFFFFFFEUL)
19 
20 /***********************************************************************************************************************
21  * Typedef definitions
22  **********************************************************************************************************************/
23 
24 /***********************************************************************************************************************
25  * Exported global variables (to be accessed by other files)
26  **********************************************************************************************************************/
27 void R_BSP_SecurityInit(void);
28 void R_BSP_PinCfgSecurityInit(void);
29 
30 /***********************************************************************************************************************
31  * External symbols
32  **********************************************************************************************************************/
33 extern fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES];
34 
35 #if defined(__ARMCC_VERSION) || defined(__ICCARM__)
36 typedef void (BSP_CMSE_NONSECURE_CALL * bsp_nonsecure_func_t)(void);
37 #elif defined(__GNUC__)
38 typedef BSP_CMSE_NONSECURE_CALL void (*volatile bsp_nonsecure_func_t)(void);
39 #endif
40 
41 #if   defined(__IAR_SYSTEMS_ICC__)
42  #pragma section=".tz_vector_ns_start"
43 
44 /* &__tz_<REGION>_C is the address of the non-secure callable section. Must assign value to this variable or
45  * linker will give error. */
46 
47 /* &__tz_<REGION>_N is the start address of the non-secure region. */
48 BSP_DONT_REMOVE void const * const __tz_VECTBL_N BSP_ALIGN_VARIABLE(16) @".tz_vector_ns_start";
49 
50 BSP_DONT_REMOVE uint32_t const * const gp_start_of_nonsecure_vector_table = (uint32_t *) &__tz_VECTBL_N;
51 #elif defined(__ARMCC_VERSION)
52 extern const uint32_t Image$$__tz_VECTBL_N$$Base;
53 
54  #define __tz_VECTBL_N    Image$$__tz_VECTBL_N$$Base
55 
56 /* Assign region addresses to pointers so that AC6 includes symbols that can be used to determine the
57  * start addresses of Secure, Non-secure and Non-secure Callable regions. */
58 BSP_DONT_REMOVE uint32_t const * const gp_start_of_nonsecure_vector_table = &__tz_VECTBL_N;
59 #elif defined(__GNUC__)
60 extern const uint32_t __tz_VECTBL_N;
61 BSP_DONT_REMOVE uint32_t const * const gp_start_of_nonsecure_vector_table = &__tz_VECTBL_N;
62 #endif
63 
64 #define BSP_PRV_STACK_LIMIT    ((uint32_t) &__StackLimit)
65 extern uint32_t __StackLimit;
66 
67 /*******************************************************************************************************************//**
68  * @addtogroup BSP_MCU
69  * @{
70  **********************************************************************************************************************/
71 
72 /*******************************************************************************************************************//**
73  * Enter the non-secure code environment.
74  *
75  * This function configures the non-secure MSP and vector table then jumps to the non-secure project's Reset_Handler.
76  *
77  * @note This function (and therefore the non-secure code) should not return.
78  **********************************************************************************************************************/
R_BSP_NonSecureEnter(void)79 void R_BSP_NonSecureEnter (void)
80 {
81     /* The NS vector table is at the start of the NS section in internal ram */
82     uint32_t const * p_ns_vector_table = gp_start_of_nonsecure_vector_table;
83 
84     /* Set up the NS Reset_Handler to be called */
85     uint32_t const * p_ns_reset_address = (uint32_t const *) ((uint32_t) p_ns_vector_table + sizeof(uint32_t));
86     uint32_t const   ns_reset_address   = (uint32_t const) ((*p_ns_reset_address) &
87                                                             BSP_PRV_CLEAR_THUMB_INSTRUCTION);
88 
89     /* Set the NS vector table address */
90     SCB_NS->VTOR = (uint32_t) p_ns_vector_table;
91 
92     /* Use CM33 stack monitor. */
93     __TZ_set_MSPLIM_NS(BSP_PRV_STACK_LIMIT);
94 
95     /* Set the NS stack pointer to the first entry in the NS vector table */
96     __TZ_set_MSP_NS(p_ns_vector_table[0]);
97 
98     /* Jump to the NS Reset_Handler */
99     __ASM volatile ("blxns %0" ::"r" (ns_reset_address));
100 }
101 
102 /** @} (end addtogroup BSP_MCU) */
103 
104 /*******************************************************************************************************************//**
105  * Initialize security features for TrustZone.
106  *
107  * This function initializes ARM security register for secure projects.
108  *
109  * @note IDAU settings must be configured to match project settings.
110  **********************************************************************************************************************/
R_BSP_SecurityInit(void)111 void R_BSP_SecurityInit (void)
112 {
113     /* Setting SAU_CTRL.ALLNS to 1 allows the security attribution of all addresses to be set by the IDAU in the
114      * system. */
115     SAU->CTRL = SAU_CTRL_ALLNS_Msk;
116 
117     /* Controls whether the SLEEPDEEP bit is only accessible from the Secure state, and
118      * Controls whether the processor uses sleep or deep sleep as its low-power mode. */
119     SCB->SCR = (SCB->SCR & (~(SCB_SCR_SLEEPDEEPS_Msk | SCB_SCR_SLEEPDEEP_Msk))) |
120                ((SCB_SCR_SLEEPDEEPS_VAL << SCB_SCR_SLEEPDEEPS_Pos) & SCB_SCR_SLEEPDEEPS_Msk) |
121                ((SCB_SCR_SLEEPDEEP_VAL << SCB_SCR_SLEEPDEEP_Pos) & SCB_SCR_SLEEPDEEP_Msk);
122 
123 #if defined(SCB_CSR_AIRCR_INIT) && (SCB_CSR_AIRCR_INIT == 1U)
124 
125     /* Configure whether non-secure projects have access to system reset, whether bus fault, hard fault, and NMI target
126      * secure or non-secure, and whether non-secure interrupt priorities are reduced to the lowest 8 priority levels. */
127     SCB->AIRCR = (SCB->AIRCR & (~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_SYSRESETREQS_Msk |
128                                   SCB_AIRCR_BFHFNMINS_Msk | SCB_AIRCR_PRIS_Msk))) |
129                  BSP_PRV_AIRCR_VECTKEY |
130                  ((SCB_AIRCR_SYSRESETREQS_VAL << SCB_AIRCR_SYSRESETREQS_Pos) & SCB_AIRCR_SYSRESETREQS_Msk) |
131                  ((SCB_AIRCR_PRIS_VAL << SCB_AIRCR_PRIS_Pos) & SCB_AIRCR_PRIS_Msk) |
132                  ((SCB_AIRCR_BFHFNMINS_VAL << SCB_AIRCR_BFHFNMINS_Pos) & SCB_AIRCR_BFHFNMINS_Msk);
133 #endif
134 
135     SCB->SHCSR = (SCB->SHCSR & (~(SCB_SHCSR_SECUREFAULTENA_Msk))) |
136                  ((SCB_SHCSR_SECUREFAULTENA_VAL << SCB_SHCSR_SECUREFAULTENA_Pos) & SCB_SHCSR_SECUREFAULTENA_Msk);
137 
138 #if defined(__FPU_USED) && (__FPU_USED == 1U) && \
139     defined(TZ_FPU_NS_USAGE) && (TZ_FPU_NS_USAGE == 1U)
140 
141     /* Configure whether the FPU can be accessed in the non-secure project. */
142     SCB->NSACR = (SCB->NSACR & ~(SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk)) |
143                  ((SCB_NSACR_CP10_11_VAL << SCB_NSACR_CP10_Pos) & (SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk));
144 
145     /* Configure whether FPU registers are always treated as non-secure (and therefore not preserved on the stack when
146      * switching from secure to non-secure), and whether the FPU registers should be cleared on exception return. */
147     FPU->FPCCR = (FPU->FPCCR & ~(FPU_FPCCR_TS_Msk | FPU_FPCCR_CLRONRETS_Msk | FPU_FPCCR_CLRONRET_Msk)) |
148                  ((FPU_FPCCR_TS_VAL << FPU_FPCCR_TS_Pos) & FPU_FPCCR_TS_Msk) |
149                  ((FPU_FPCCR_CLRONRETS_VAL << FPU_FPCCR_CLRONRETS_Pos) & FPU_FPCCR_CLRONRETS_Msk) |
150                  ((FPU_FPCCR_CLRONRET_VAL << FPU_FPCCR_CLRONRET_Pos) & FPU_FPCCR_CLRONRET_Msk);
151 #endif
152 
153     /* Initialize security attribution registers for Pins. */
154     R_BSP_PinCfgSecurityInit();
155 }
156 
157 /* This function is overridden by tooling. */
R_BSP_PinCfgSecurityInit(void)158 BSP_WEAK_REFERENCE void R_BSP_PinCfgSecurityInit (void)
159 {
160 }
161