1 /*
2 * Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6 
7 /*******************************************************************************************************************//**
8  * @addtogroup IOPORT
9  * @{
10  **********************************************************************************************************************/
11 
12 #ifndef R_IOPORT_H
13 #define R_IOPORT_H
14 
15 /***********************************************************************************************************************
16  * Includes
17  **********************************************************************************************************************/
18 #include "bsp_api.h"
19 
20 /* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
21 FSP_HEADER
22 
23 #include "r_ioport_api.h"
24 #include "r_ioport_cfg.h"
25 
26 /***********************************************************************************************************************
27  * Macro definitions
28  **********************************************************************************************************************/
29 
30 /* Private definition to set enumeration values. */
31 #define IOPORT_PRV_PFS_PSEL_OFFSET    (24)
32 
33 /***********************************************************************************************************************
34  * Typedef definitions
35  **********************************************************************************************************************/
36 
37 /** IOPORT private control block. DO NOT MODIFY. Initialization occurs when R_IOPORT_Open() is called. */
38 typedef struct st_ioport_instance_ctrl
39 {
40     uint32_t             open;
41     void const         * p_context;
42     ioport_cfg_t const * p_cfg;
43 } ioport_instance_ctrl_t;
44 
45 #ifndef BSP_OVERRIDE_IOPORT_PERIPHERAL_T
46 
47 /** Superset of all peripheral functions.  */
48 typedef enum e_ioport_peripheral
49 {
50     /** Pin will function as a Mode0 peripheral pin */
51     IOPORT_PERIPHERAL_MODE0 = (0x0UL << IOPORT_PRV_PFS_PSEL_OFFSET),
52 
53     /** Pin will function as a Mode1 peripheral pin */
54     IOPORT_PERIPHERAL_MODE1 = (0x1UL << IOPORT_PRV_PFS_PSEL_OFFSET),
55 
56     /** Pin will function as a Mode2 peripheral pin */
57     IOPORT_PERIPHERAL_MODE2 = (0x2UL << IOPORT_PRV_PFS_PSEL_OFFSET),
58 
59     /** Pin will function as a Mode3 peripheral pin */
60     IOPORT_PERIPHERAL_MODE3 = (0x3UL << IOPORT_PRV_PFS_PSEL_OFFSET),
61 
62     /** Pin will function as a Mode4 peripheral pin */
63     IOPORT_PERIPHERAL_MODE4 = (0x4UL << IOPORT_PRV_PFS_PSEL_OFFSET),
64 
65     /** Pin will function as a Mode5 peripheral pin */
66     IOPORT_PERIPHERAL_MODE5 = (0x5UL << IOPORT_PRV_PFS_PSEL_OFFSET),
67 
68     /** Pin will function as a Mode6 peripheral pin */
69     IOPORT_PERIPHERAL_MODE6 = (0x6UL << IOPORT_PRV_PFS_PSEL_OFFSET),
70 
71     /** Pin will function as a Mode7 peripheral pin */
72     IOPORT_PERIPHERAL_MODE7 = (0x7UL << IOPORT_PRV_PFS_PSEL_OFFSET),
73 
74     /** Pin will function as a Mode8 peripheral pin */
75     IOPORT_PERIPHERAL_MODE8 = (0x8UL << IOPORT_PRV_PFS_PSEL_OFFSET),
76 
77     /** Pin will function as a Mode9 peripheral pin */
78     IOPORT_PERIPHERAL_MODE9 = (0x9UL << IOPORT_PRV_PFS_PSEL_OFFSET),
79 
80     /** Pin will function as a Mode10 peripheral pin */
81     IOPORT_PERIPHERAL_MODE10 = (0xAUL << IOPORT_PRV_PFS_PSEL_OFFSET),
82 
83     /** Pin will function as a Mode11 peripheral pin */
84     IOPORT_PERIPHERAL_MODE11 = (0xBUL << IOPORT_PRV_PFS_PSEL_OFFSET),
85 
86     /** Pin will function as a Mode12 peripheral pin */
87     IOPORT_PERIPHERAL_MODE12 = (0xCUL << IOPORT_PRV_PFS_PSEL_OFFSET),
88 
89     /** Pin will function as a Mode13 peripheral pin */
90     IOPORT_PERIPHERAL_MODE13 = (0xDUL << IOPORT_PRV_PFS_PSEL_OFFSET),
91 
92     /** Pin will function as a Mode14 peripheral pin */
93     IOPORT_PERIPHERAL_MODE14 = (0xEUL << IOPORT_PRV_PFS_PSEL_OFFSET),
94 
95     /** Pin will function as a Mode15 peripheral pin */
96     IOPORT_PERIPHERAL_MODE15 = (0xFUL << IOPORT_PRV_PFS_PSEL_OFFSET),
97 } ioport_peripheral_t;
98 
99 #endif
100 
101 #ifndef BSP_OVERRIDE_IOPORT_OPTIONS_T
102 
103 /** Options to configure pin functions  */
104 typedef enum e_ioport_cfg_options
105 {
106     /* For PM Register */
107     IOPORT_CFG_PORT_DIRECTION_HIZ          = 0x00000000,        ///< Sets the pin direction to Hi-Z (default)
108     IOPORT_CFG_PORT_DIRECTION_INPUT        = 0x00000004,        ///< Sets the pin direction to input
109     IOPORT_CFG_PORT_DIRECTION_OUTPUT       = 0x00000008,        ///< Sets the pin direction to output (input disable)
110     IOPORT_CFG_PORT_DIRECTION_OUTPUT_INPUT = 0x0000000C,        ///< Sets the pin direction to output (input enable)
111 
112     /* For P Register */
113     IOPORT_CFG_PORT_OUTPUT_LOW  = 0x00000000,                   ///< Sets the pin level to low
114     IOPORT_CFG_PORT_OUTPUT_HIGH = 0x00000001,                   ///< Sets the pin level to high
115 
116     /* For PUPD Register */
117     IOPORT_CFG_PULLUP_PULLDOWN_DISABLE = 0x00000000,            ///< Disable the pin's internal pull-up and pull-down
118     IOPORT_CFG_PULLUP_ENABLE           = 0x00000010,            ///< Enables the pin's internal pull-up
119     IOPORT_CFG_PULLDOWN_ENABLE         = 0x00000020,            ///< Enables the pin's internal pull-down
120 
121     /* For NOD Register */
122     IOPORT_CFG_NOD_DISABLE = 0x00000000,                        ///< Disable the pin's N-ch open-drain
123     IOPORT_CFG_NOD_ENABLE  = 0x00000040,                        ///< Enables the pin's N-ch open-drain
124 
125     /* For SMT Register */
126     IOPORT_CFG_SCHMITT_DISABLE = 0x00000000,                    ///< Disable the pin's Schmitt-trigger input
127     IOPORT_CFG_SCHMITT_ENABLE  = 0x80000000,                    ///< Enables the pin's Schmitt-trigger input
128 
129     /* For IOLH Register */
130     IOPORT_CFG_DRIVE_B00 = 0x00000000,                          ///< Sets the IOLH register value to b'00
131     IOPORT_CFG_DRIVE_B01 = 0x00000400,                          ///< Sets the IOLH register value to b'01
132     IOPORT_CFG_DRIVE_B10 = 0x00000800,                          ///< Sets the IOLH register value to b'10
133     IOPORT_CFG_DRIVE_B11 = 0x00000C00,                          ///< Sets the IOLH register value to b'11
134 
135     /* For ISEL Register */
136     IOPORT_CFG_TINT_DISABLE = 0x00000000,                       ///< Disable IRQ functionality for a pin
137     IOPORT_CFG_TINT_ENABLE  = 0x00004000,                       ///< Sets pin as an IRQ pin
138 
139     /* For SR Register */
140     IOPORT_CFG_SLEW_RATE_SLOW = 0x00000000,                     ///< Sets the pin slew-rate to slow
141     IOPORT_CFG_SLEW_RATE_FAST = 0x00020000,                     ///< Sets the pin slew-rate to fast
142 
143     /* For IEN Register */
144     IOPORT_CFG_SPECIAL_PURPOSE_PORT_INPUT_DISABLE = 0x00000000, ///< Disable input the pin of special purpose port
145     IOPORT_CFG_SPECIAL_PURPOSE_PORT_INPUT_ENABLE  = 0x00040000, ///< Sets the pin of special purpose port to input
146 
147     /* For FILONOFF Register */
148     IOPORT_CFG_NOISE_FILTER_OFF = 0x00000000,                   ///< Noise filter disable
149     IOPORT_CFG_NOISE_FILTER_ON  = 0x00080000,                   ///< Noise filter enable
150 
151     /* For FILNUM Register */
152     IOPORT_CFG_NOISE_FILTER_NUM_4STAGE  = 0x00000000,           ///< Sets the pin noise filter to 4-stage filter
153     IOPORT_CFG_NOISE_FILTER_NUM_8STAGE  = 0x00100000,           ///< Sets the pin noise filter to 8-stage filter
154     IOPORT_CFG_NOISE_FILTER_NUM_12STAGE = 0x00200000,           ///< Sets the pin noise filter to 12-stage filter
155     IOPORT_CFG_NOISE_FILTER_NUM_16STAGE = 0x00300000,           ///< Sets the pin noise filter to 16-stage filter
156 
157     /* For FILCLKSEL Register */
158     IOPORT_CFG_NOISE_FILTER_DIVIDED_B00 = 0x00000000,           ///< Sets the FILCLKSEL register value to b'00
159     IOPORT_CFG_NOISE_FILTER_DIVIDED_B01 = 0x00400000,           ///< Sets the FILCLKSEL register value to b'01
160     IOPORT_CFG_NOISE_FILTER_DIVIDED_B10 = 0x00800000,           ///< Sets the FILCLKSEL register value to b'10
161     IOPORT_CFG_NOISE_FILTER_DIVIDED_B11 = 0x00C00000,           ///< Sets the FILCLKSEL register value to b'11
162 
163     /* For PMC Register */
164     IOPORT_CFG_PERIPHERAL_PIN = 0x00010000                      ///< Enables pin to operate as a peripheral pin
165 } ioport_cfg_options_t;
166 
167 #endif
168 
169 /** Pin selection for port group
170  *  @note Event link must be configured by the ELC
171  */
172 typedef enum e_ioport_event_pin_selection
173 {
174     IOPORT_EVENT_PIN_SELECTION_NONE  = 0x00, ///< No pin selection for port group
175     IOPORT_EVENT_PIN_SELECTION_PIN_0 = 0x01, ///< Select pin 0 to port group
176     IOPORT_EVENT_PIN_SELECTION_PIN_1 = 0x02, ///< Select pin 1 to port group
177     IOPORT_EVENT_PIN_SELECTION_PIN_2 = 0x04, ///< Select pin 2 to port group
178     IOPORT_EVENT_PIN_SELECTION_PIN_3 = 0x08, ///< Select pin 3 to port group
179     IOPORT_EVENT_PIN_SELECTION_PIN_4 = 0x10, ///< Select pin 4 to port group
180     IOPORT_EVENT_PIN_SELECTION_PIN_5 = 0x20, ///< Select pin 5 to port group
181     IOPORT_EVENT_PIN_SELECTION_PIN_6 = 0x40, ///< Select pin 6 to port group
182     IOPORT_EVENT_PIN_SELECTION_PIN_7 = 0x80, ///< Select pin 7 to port group
183 } ioport_event_pin_selection_t;
184 
185 /** Port group operation
186  *  @note Event link must be configured by the ELC
187  */
188 typedef enum e_ioport_event_output_operation
189 {
190     IOPORT_EVENT_OUTPUT_OPERATION_LOW    = 0x0, ///< Set Low output to output operation
191     IOPORT_EVENT_OUTPUT_OPERATION_HIGH   = 0x1, ///< Set High output to output operation
192     IOPORT_EVENT_OUTPUT_OPERATION_TOGGLE = 0x2, ///< Set toggle output to output operation
193     IOPORT_EVENT_OUTPUT_OPERATION_BUFFER = 0x3, ///< Set buffer value output to output operation
194 } ioport_event_output_operation_t;
195 
196 /** Input port group event control
197  *  @note Event link must be configured by the ELC
198  */
199 typedef enum e_ioport_event_control
200 {
201     IOPORT_EVENT_CONTROL_DISABLE = 0x0, ///< Disable function related with event link
202     IOPORT_EVENT_CONTROL_ENABLE  = 0x1, ///< Enable function related with event link
203 } ioport_event_control_t;
204 
205 /** Single port event direction
206  *  @note Event link must be configured by the ELC
207  */
208 typedef enum e_ioport_event_direction
209 {
210     IOPORT_EVENT_DIRECTION_OUTPUT = 0x0, ///< Set output direction to single port
211     IOPORT_EVENT_DIRECTION_INPUT  = 0x1, ///< Set input direction to single port
212 } ioport_event_direction_t;
213 
214 /** Input event edge detection
215  *  @note Event link must be configured by the ELC
216  */
217 typedef enum e_ioport_event_detection
218 {
219     IOPORT_EVENT_DETECTION_RISING_EDGE  = 0x0, ///< Set rising edge to event detection for input event
220     IOPORT_EVENT_DETECTION_FALLING_EDGE = 0x1, ///< Set falling edge to event detection for input event
221     IOPORT_EVENT_DETECTION_BOTH_EGDE    = 0x2, ///< Set both edges to event detection for input event
222 } ioport_event_detection_t;
223 
224 /** Initial value for buffer register
225  *  @note Event link must be configured by the ELC
226  */
227 typedef enum e_ioport_event_initial_buffer_value
228 {
229     IOPORT_EVENT_INITIAL_BUFFER_VALUE_LOW  = 0U, ///< Set low to initial value of buffer register for input port group
230     IOPORT_EVENT_INITIAL_BUFFER_VALUE_HIGH = 1U, ///< Set high to initial value of buffer register for input port group
231 } ioport_event_initial_buffer_value_t;
232 
233 /** Single port configuration
234  *  @note Event link must be configured by the ELC
235  */
236 typedef struct st_ioport_event_single
237 {
238     ioport_event_control_t          event_control;  ///< Event link control for single port
239     ioport_event_direction_t        direction;      ///< Event direction for single port
240     uint16_t                        port_num;       ///< Port number specified to single port
241     ioport_event_output_operation_t operation;      ///< Single port operation select
242     ioport_event_detection_t        edge_detection; ///< Edge detection select
243 } ioport_event_single_t;
244 
245 /** Output port group configuration
246  *  @note Event link must be configured by the ELC
247  */
248 typedef struct st_ioport_event_group_output
249 {
250     uint8_t pin_select;                        ///< Port number specified to output port group
251     ioport_event_output_operation_t operation; ///< Port group operation select
252 } ioport_event_group_output_t;
253 
254 /** Input port group configuration
255  *  @note Event link must be configured by the ELC
256  */
257 typedef struct st_ioport_event_group_input
258 {
259     ioport_event_control_t   event_control;     ///< Event link control for input port group
260     ioport_event_detection_t edge_detection;    ///< Edge detection select
261     ioport_event_control_t   overwrite_control; ///< Buffer register overwrite control
262     uint8_t pin_select;                         ///< Port number specified to input port group
263     uint8_t buffer_init_value;                  ///< Buffer register initial value
264 } ioport_event_group_input_t;
265 
266 /** IOPORT extended configuration for event link function
267  *  @note Event link must be configured by the ELC
268  */
269 typedef struct  st_ioport_extend_cfg
270 {
271     ioport_event_group_output_t const * p_port_group_output_cfg; ///< Pointer to output port group configuration
272     ioport_event_group_input_t const  * p_port_group_input_cfg;  ///< Pointer to input port group configuration
273     ioport_event_single_t const       * p_single_port_cfg;       ///< Pointer to single input port configuration
274 } ioport_extend_cfg_t;
275 
276 /**********************************************************************************************************************
277  * Exported global variables
278  **********************************************************************************************************************/
279 
280 /** @cond INC_HEADER_DEFS_SEC */
281 /** Filled in Interface API structure for this Instance. */
282 extern const ioport_api_t g_ioport_on_ioport;
283 
284 /** @endcond */
285 
286 /***********************************************************************************************************************
287  * Public APIs
288  **********************************************************************************************************************/
289 
290 fsp_err_t R_IOPORT_Open(ioport_ctrl_t * const p_ctrl, const ioport_cfg_t * p_cfg);
291 fsp_err_t R_IOPORT_Close(ioport_ctrl_t * const p_ctrl);
292 fsp_err_t R_IOPORT_PinsCfg(ioport_ctrl_t * const p_ctrl, const ioport_cfg_t * p_cfg);
293 fsp_err_t R_IOPORT_PinCfg(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, uint32_t cfg);
294 fsp_err_t R_IOPORT_PinEventInputRead(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t * p_pin_event);
295 fsp_err_t R_IOPORT_PinEventOutputWrite(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t pin_value);
296 fsp_err_t R_IOPORT_PinRead(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t * p_pin_value);
297 fsp_err_t R_IOPORT_PinWrite(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t level);
298 fsp_err_t R_IOPORT_PortDirectionSet(ioport_ctrl_t * const p_ctrl,
299                                     bsp_io_port_t         port,
300                                     ioport_size_t         direction_values,
301                                     ioport_size_t         mask);
302 fsp_err_t R_IOPORT_PortEventInputRead(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t * event_data);
303 fsp_err_t R_IOPORT_PortEventOutputWrite(ioport_ctrl_t * const p_ctrl,
304                                         bsp_io_port_t         port,
305                                         ioport_size_t         event_data,
306                                         ioport_size_t         mask_value);
307 fsp_err_t R_IOPORT_PortRead(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t * p_port_value);
308 fsp_err_t R_IOPORT_PortWrite(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t value, ioport_size_t mask);
309 
310 /*******************************************************************************************************************//**
311  * @} (end defgroup IOPORT)
312  **********************************************************************************************************************/
313 
314 /* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
315 FSP_FOOTER
316 
317 #endif                                 // R_IOPORT_H
318