1 /* 2 * Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef BSP_ELC_H 8 #define BSP_ELC_H 9 10 /*******************************************************************************************************************//** 11 * @addtogroup BSP_MCU_RA6M5 12 * @{ 13 **********************************************************************************************************************/ 14 15 /*********************************************************************************************************************** 16 * Macro definitions 17 **********************************************************************************************************************/ 18 19 /*********************************************************************************************************************** 20 * Typedef definitions 21 **********************************************************************************************************************/ 22 23 /*********************************************************************************************************************** 24 * Exported global variables 25 **********************************************************************************************************************/ 26 27 /*********************************************************************************************************************** 28 * Exported global functions (to be accessed by other files) 29 **********************************************************************************************************************/ 30 31 /* UNCRUSTIFY-OFF */ 32 33 /** Sources of event signals to be linked to other peripherals or the CPU 34 * @note This list is device specific. 35 * */ 36 typedef enum e_elc_event_ra6m5 37 { 38 ELC_EVENT_NONE = (0x0), // Link disabled 39 ELC_EVENT_ICU_IRQ0 = (0x001), // External pin interrupt 0 40 ELC_EVENT_ICU_IRQ1 = (0x002), // External pin interrupt 1 41 ELC_EVENT_ICU_IRQ2 = (0x003), // External pin interrupt 2 42 ELC_EVENT_ICU_IRQ3 = (0x004), // External pin interrupt 3 43 ELC_EVENT_ICU_IRQ4 = (0x005), // External pin interrupt 4 44 ELC_EVENT_ICU_IRQ5 = (0x006), // External pin interrupt 5 45 ELC_EVENT_ICU_IRQ6 = (0x007), // External pin interrupt 6 46 ELC_EVENT_ICU_IRQ7 = (0x008), // External pin interrupt 7 47 ELC_EVENT_ICU_IRQ8 = (0x009), // External pin interrupt 8 48 ELC_EVENT_ICU_IRQ9 = (0x00A), // External pin interrupt 9 49 ELC_EVENT_ICU_IRQ10 = (0x00B), // External pin interrupt 10 50 ELC_EVENT_ICU_IRQ11 = (0x00C), // External pin interrupt 11 51 ELC_EVENT_ICU_IRQ12 = (0x00D), // External pin interrupt 12 52 ELC_EVENT_ICU_IRQ13 = (0x00E), // External pin interrupt 13 53 ELC_EVENT_ICU_IRQ14 = (0x00F), // External pin interrupt 14 54 ELC_EVENT_ICU_IRQ15 = (0x010), // External pin interrupt 15 55 ELC_EVENT_DMAC0_INT = (0x020), // DMAC0 transfer end 56 ELC_EVENT_DMAC1_INT = (0x021), // DMAC1 transfer end 57 ELC_EVENT_DMAC2_INT = (0x022), // DMAC2 transfer end 58 ELC_EVENT_DMAC3_INT = (0x023), // DMAC3 transfer end 59 ELC_EVENT_DMAC4_INT = (0x024), // DMAC4 transfer end 60 ELC_EVENT_DMAC5_INT = (0x025), // DMAC5 transfer end 61 ELC_EVENT_DMAC6_INT = (0x026), // DMAC6 transfer end 62 ELC_EVENT_DMAC7_INT = (0x027), // DMAC7 transfer end 63 ELC_EVENT_DTC_COMPLETE = (0x029), // DTC transfer complete 64 ELC_EVENT_DTC_END = (0x02A), // DTC transfer end 65 ELC_EVENT_DMA_TRANSERR = (0x02B), // DMA/DTC transfer error 66 ELC_EVENT_ICU_SNOOZE_CANCEL = (0x02D), // Canceling from Snooze mode 67 ELC_EVENT_FCU_FIFERR = (0x030), // Flash access error interrupt 68 ELC_EVENT_FCU_FRDYI = (0x031), // Flash ready interrupt 69 ELC_EVENT_LVD_LVD1 = (0x038), // Voltage monitor 1 interrupt 70 ELC_EVENT_LVD_LVD2 = (0x039), // Voltage monitor 2 interrupt 71 ELC_EVENT_CGC_MOSC_STOP = (0x03B), // Main Clock oscillation stop 72 ELC_EVENT_LPM_SNOOZE_REQUEST = (0x03C), // Snooze entry 73 ELC_EVENT_AGT0_INT = (0x040), // AGT interrupt 74 ELC_EVENT_AGT0_COMPARE_A = (0x041), // Compare match A 75 ELC_EVENT_AGT0_COMPARE_B = (0x042), // Compare match B 76 ELC_EVENT_AGT1_INT = (0x043), // AGT interrupt 77 ELC_EVENT_AGT1_COMPARE_A = (0x044), // Compare match A 78 ELC_EVENT_AGT1_COMPARE_B = (0x045), // Compare match B 79 ELC_EVENT_AGT2_INT = (0x046), // AGT interrupt 80 ELC_EVENT_AGT2_COMPARE_A = (0x047), // Compare match A 81 ELC_EVENT_AGT2_COMPARE_B = (0x048), // Compare match B 82 ELC_EVENT_AGT3_INT = (0x049), // AGT interrupt 83 ELC_EVENT_AGT3_COMPARE_A = (0x04A), // Compare match A 84 ELC_EVENT_AGT3_COMPARE_B = (0x04B), // Compare match B 85 ELC_EVENT_AGT4_INT = (0x04C), // AGT interrupt 86 ELC_EVENT_AGT4_COMPARE_A = (0x04D), // Compare match A 87 ELC_EVENT_AGT4_COMPARE_B = (0x04E), // Compare match B 88 ELC_EVENT_AGT5_INT = (0x04F), // AGT interrupt 89 ELC_EVENT_AGT5_COMPARE_A = (0x050), // Compare match A 90 ELC_EVENT_AGT5_COMPARE_B = (0x051), // Compare match B 91 ELC_EVENT_IWDT_UNDERFLOW = (0x052), // IWDT underflow 92 ELC_EVENT_WDT_UNDERFLOW = (0x053), // WDT0 underflow 93 ELC_EVENT_RTC_ALARM = (0x054), // Alarm interrupt 94 ELC_EVENT_RTC_PERIOD = (0x055), // Periodic interrupt 95 ELC_EVENT_RTC_CARRY = (0x056), // Carry interrupt 96 ELC_EVENT_CAN_RXF = (0x059), // Global recieve FIFO interrupt 97 ELC_EVENT_CAN_GLERR = (0x05A), // Global error 98 ELC_EVENT_CAN_DMAREQ0 = (0x05B), // RX fifo DMA request 0 99 ELC_EVENT_CAN_DMAREQ1 = (0x05C), // RX fifo DMA request 1 100 ELC_EVENT_CAN_DMAREQ2 = (0x05D), // RX fifo DMA request 2 101 ELC_EVENT_CAN_DMAREQ3 = (0x05E), // RX fifo DMA request 3 102 ELC_EVENT_CAN_DMAREQ4 = (0x05F), // RX fifo DMA request 4 103 ELC_EVENT_CAN_DMAREQ5 = (0x060), // RX fifo DMA request 5 104 ELC_EVENT_CAN_DMAREQ6 = (0x061), // RX fifo DMA request 6 105 ELC_EVENT_CAN_DMAREQ7 = (0x062), // RX fifo DMA request 7 106 ELC_EVENT_CAN0_TX = (0x063), // Transmit interrupt 107 ELC_EVENT_CAN0_CHERR = (0x064), // Channel error 108 ELC_EVENT_CAN0_COMFRX = (0x065), // Common FIFO recieve interrupt 109 ELC_EVENT_CAN0_CF_DMAREQ = (0x066), // Channel DMA request 110 ELC_EVENT_CAN1_TX = (0x067), // Transmit interrupt 111 ELC_EVENT_CAN1_CHERR = (0x068), // Channel error 112 ELC_EVENT_CAN1_COMFRX = (0x069), // Common FIFO recieve interrupt 113 ELC_EVENT_CAN1_CF_DMAREQ = (0x06A), // Channel DMA request 114 ELC_EVENT_USBFS_FIFO_0 = (0x06B), // DMA transfer request 0 115 ELC_EVENT_USBFS_FIFO_1 = (0x06C), // DMA transfer request 1 116 ELC_EVENT_USBFS_INT = (0x06D), // USBFS interrupt 117 ELC_EVENT_USBFS_RESUME = (0x06E), // USBFS resume interrupt 118 ELC_EVENT_IIC0_RXI = (0x073), // Receive data full 119 ELC_EVENT_IIC0_TXI = (0x074), // Transmit data empty 120 ELC_EVENT_IIC0_TEI = (0x075), // Transmit end 121 ELC_EVENT_IIC0_ERI = (0x076), // Transfer error 122 ELC_EVENT_IIC0_WUI = (0x077), // Wakeup interrupt 123 ELC_EVENT_IIC1_RXI = (0x078), // Receive data full 124 ELC_EVENT_IIC1_TXI = (0x079), // Transmit data empty 125 ELC_EVENT_IIC1_TEI = (0x07A), // Transmit end 126 ELC_EVENT_IIC1_ERI = (0x07B), // Transfer error 127 ELC_EVENT_IIC2_RXI = (0x07D), // Receive data full 128 ELC_EVENT_IIC2_TXI = (0x07E), // Transmit data empty 129 ELC_EVENT_IIC2_TEI = (0x07F), // Transmit end 130 ELC_EVENT_IIC2_ERI = (0x080), // Transfer error 131 ELC_EVENT_SDHIMMC0_ACCS = (0x082), // Card access 132 ELC_EVENT_SDHIMMC0_SDIO = (0x083), // SDIO access 133 ELC_EVENT_SDHIMMC0_CARD = (0x084), // Card detect 134 ELC_EVENT_SDHIMMC0_DMA_REQ = (0x085), // DMA transfer request 135 ELC_EVENT_SSI0_TXI = (0x08A), // Transmit data empty 136 ELC_EVENT_SSI0_RXI = (0x08B), // Receive data full 137 ELC_EVENT_SSI0_INT = (0x08D), // Error interrupt 138 ELC_EVENT_CTSU_WRITE = (0x09A), // Write request interrupt 139 ELC_EVENT_CTSU_READ = (0x09B), // Measurement data transfer request interrupt 140 ELC_EVENT_CTSU_END = (0x09C), // Measurement end interrupt 141 ELC_EVENT_CAC_FREQUENCY_ERROR = (0x09E), // Frequency error interrupt 142 ELC_EVENT_CAC_MEASUREMENT_END = (0x09F), // Measurement end interrupt 143 ELC_EVENT_CAC_OVERFLOW = (0x0A0), // Overflow interrupt 144 ELC_EVENT_CEC_INTDA = (0x0AB), // Data interrupt 145 ELC_EVENT_CEC_INTCE = (0x0AC), // Communication complete interrupt 146 ELC_EVENT_CEC_INTERR = (0x0AD), // Error interrupt 147 ELC_EVENT_IOPORT_EVENT_1 = (0x0B1), // Port 1 event 148 ELC_EVENT_IOPORT_EVENT_2 = (0x0B2), // Port 2 event 149 ELC_EVENT_IOPORT_EVENT_3 = (0x0B3), // Port 3 event 150 ELC_EVENT_IOPORT_EVENT_4 = (0x0B4), // Port 4 event 151 ELC_EVENT_ELC_SOFTWARE_EVENT_0 = (0x0B5), // Software event 0 152 ELC_EVENT_ELC_SOFTWARE_EVENT_1 = (0x0B6), // Software event 1 153 ELC_EVENT_POEG0_EVENT = (0x0B7), // Port Output disable 0 interrupt 154 ELC_EVENT_POEG1_EVENT = (0x0B8), // Port Output disable 1 interrupt 155 ELC_EVENT_POEG2_EVENT = (0x0B9), // Port Output disable 2 interrupt 156 ELC_EVENT_POEG3_EVENT = (0x0BA), // Port Output disable 3 interrupt 157 ELC_EVENT_GPT0_CAPTURE_COMPARE_A = (0x0C0), // Capture/Compare match A 158 ELC_EVENT_GPT0_CAPTURE_COMPARE_B = (0x0C1), // Capture/Compare match B 159 ELC_EVENT_GPT0_COMPARE_C = (0x0C2), // Compare match C 160 ELC_EVENT_GPT0_COMPARE_D = (0x0C3), // Compare match D 161 ELC_EVENT_GPT0_COMPARE_E = (0x0C4), // Compare match E 162 ELC_EVENT_GPT0_COMPARE_F = (0x0C5), // Compare match F 163 ELC_EVENT_GPT0_COUNTER_OVERFLOW = (0x0C6), // Overflow 164 ELC_EVENT_GPT0_COUNTER_UNDERFLOW = (0x0C7), // Underflow 165 ELC_EVENT_GPT0_PC = (0x0C8), // Period count function finish 166 ELC_EVENT_GPT1_CAPTURE_COMPARE_A = (0x0C9), // Capture/Compare match A 167 ELC_EVENT_GPT1_CAPTURE_COMPARE_B = (0x0CA), // Capture/Compare match B 168 ELC_EVENT_GPT1_COMPARE_C = (0x0CB), // Compare match C 169 ELC_EVENT_GPT1_COMPARE_D = (0x0CC), // Compare match D 170 ELC_EVENT_GPT1_COMPARE_E = (0x0CD), // Compare match E 171 ELC_EVENT_GPT1_COMPARE_F = (0x0CE), // Compare match F 172 ELC_EVENT_GPT1_COUNTER_OVERFLOW = (0x0CF), // Overflow 173 ELC_EVENT_GPT1_COUNTER_UNDERFLOW = (0x0D0), // Underflow 174 ELC_EVENT_GPT1_PC = (0x0D1), // Period count function finish 175 ELC_EVENT_GPT2_CAPTURE_COMPARE_A = (0x0D2), // Capture/Compare match A 176 ELC_EVENT_GPT2_CAPTURE_COMPARE_B = (0x0D3), // Capture/Compare match B 177 ELC_EVENT_GPT2_COMPARE_C = (0x0D4), // Compare match C 178 ELC_EVENT_GPT2_COMPARE_D = (0x0D5), // Compare match D 179 ELC_EVENT_GPT2_COMPARE_E = (0x0D6), // Compare match E 180 ELC_EVENT_GPT2_COMPARE_F = (0x0D7), // Compare match F 181 ELC_EVENT_GPT2_COUNTER_OVERFLOW = (0x0D8), // Overflow 182 ELC_EVENT_GPT2_COUNTER_UNDERFLOW = (0x0D9), // Underflow 183 ELC_EVENT_GPT3_CAPTURE_COMPARE_A = (0x0DB), // Capture/Compare match A 184 ELC_EVENT_GPT3_CAPTURE_COMPARE_B = (0x0DC), // Capture/Compare match B 185 ELC_EVENT_GPT3_COMPARE_C = (0x0DD), // Compare match C 186 ELC_EVENT_GPT3_COMPARE_D = (0x0DE), // Compare match D 187 ELC_EVENT_GPT3_COMPARE_E = (0x0DF), // Compare match E 188 ELC_EVENT_GPT3_COMPARE_F = (0x0E0), // Compare match F 189 ELC_EVENT_GPT3_COUNTER_OVERFLOW = (0x0E1), // Overflow 190 ELC_EVENT_GPT3_COUNTER_UNDERFLOW = (0x0E2), // Underflow 191 ELC_EVENT_GPT4_CAPTURE_COMPARE_A = (0x0E4), // Capture/Compare match A 192 ELC_EVENT_GPT4_CAPTURE_COMPARE_B = (0x0E5), // Capture/Compare match B 193 ELC_EVENT_GPT4_COMPARE_C = (0x0E6), // Compare match C 194 ELC_EVENT_GPT4_COMPARE_D = (0x0E7), // Compare match D 195 ELC_EVENT_GPT4_COMPARE_E = (0x0E8), // Compare match E 196 ELC_EVENT_GPT4_COMPARE_F = (0x0E9), // Compare match F 197 ELC_EVENT_GPT4_COUNTER_OVERFLOW = (0x0EA), // Overflow 198 ELC_EVENT_GPT4_COUNTER_UNDERFLOW = (0x0EB), // Underflow 199 ELC_EVENT_GPT4_PC = (0x0EC), // Period count function finish 200 ELC_EVENT_GPT5_CAPTURE_COMPARE_A = (0x0ED), // Capture/Compare match A 201 ELC_EVENT_GPT5_CAPTURE_COMPARE_B = (0x0EE), // Capture/Compare match B 202 ELC_EVENT_GPT5_COMPARE_C = (0x0EF), // Compare match C 203 ELC_EVENT_GPT5_COMPARE_D = (0x0F0), // Compare match D 204 ELC_EVENT_GPT5_COMPARE_E = (0x0F1), // Compare match E 205 ELC_EVENT_GPT5_COMPARE_F = (0x0F2), // Compare match F 206 ELC_EVENT_GPT5_COUNTER_OVERFLOW = (0x0F3), // Overflow 207 ELC_EVENT_GPT5_COUNTER_UNDERFLOW = (0x0F4), // Underflow 208 ELC_EVENT_GPT5_PC = (0x0F5), // Period count function finish 209 ELC_EVENT_GPT6_CAPTURE_COMPARE_A = (0x0F6), // Capture/Compare match A 210 ELC_EVENT_GPT6_CAPTURE_COMPARE_B = (0x0F7), // Capture/Compare match B 211 ELC_EVENT_GPT6_COMPARE_C = (0x0F8), // Compare match C 212 ELC_EVENT_GPT6_COMPARE_D = (0x0F9), // Compare match D 213 ELC_EVENT_GPT6_COMPARE_E = (0x0FA), // Compare match E 214 ELC_EVENT_GPT6_COMPARE_F = (0x0FB), // Compare match F 215 ELC_EVENT_GPT6_COUNTER_OVERFLOW = (0x0FC), // Overflow 216 ELC_EVENT_GPT6_COUNTER_UNDERFLOW = (0x0FD), // Underflow 217 ELC_EVENT_GPT6_PC = (0x0FE), // Period count function finish 218 ELC_EVENT_GPT7_CAPTURE_COMPARE_A = (0x0FF), // Capture/Compare match A 219 ELC_EVENT_GPT7_CAPTURE_COMPARE_B = (0x100), // Capture/Compare match B 220 ELC_EVENT_GPT7_COMPARE_C = (0x101), // Compare match C 221 ELC_EVENT_GPT7_COMPARE_D = (0x102), // Compare match D 222 ELC_EVENT_GPT7_COMPARE_E = (0x103), // Compare match E 223 ELC_EVENT_GPT7_COMPARE_F = (0x104), // Compare match F 224 ELC_EVENT_GPT7_COUNTER_OVERFLOW = (0x105), // Overflow 225 ELC_EVENT_GPT7_COUNTER_UNDERFLOW = (0x106), // Underflow 226 ELC_EVENT_GPT8_CAPTURE_COMPARE_A = (0x108), // Capture/Compare match A 227 ELC_EVENT_GPT8_CAPTURE_COMPARE_B = (0x109), // Capture/Compare match B 228 ELC_EVENT_GPT8_COMPARE_C = (0x10A), // Compare match C 229 ELC_EVENT_GPT8_COMPARE_D = (0x10B), // Compare match D 230 ELC_EVENT_GPT8_COMPARE_E = (0x10C), // Compare match E 231 ELC_EVENT_GPT8_COMPARE_F = (0x10D), // Compare match F 232 ELC_EVENT_GPT8_COUNTER_OVERFLOW = (0x10E), // Overflow 233 ELC_EVENT_GPT8_COUNTER_UNDERFLOW = (0x10F), // Underflow 234 ELC_EVENT_GPT9_CAPTURE_COMPARE_A = (0x111), // Capture/Compare match A 235 ELC_EVENT_GPT9_CAPTURE_COMPARE_B = (0x112), // Capture/Compare match B 236 ELC_EVENT_GPT9_COMPARE_C = (0x113), // Compare match C 237 ELC_EVENT_GPT9_COMPARE_D = (0x114), // Compare match D 238 ELC_EVENT_GPT9_COMPARE_E = (0x115), // Compare match E 239 ELC_EVENT_GPT9_COMPARE_F = (0x116), // Compare match F 240 ELC_EVENT_GPT9_COUNTER_OVERFLOW = (0x117), // Overflow 241 ELC_EVENT_GPT9_COUNTER_UNDERFLOW = (0x118), // Underflow 242 ELC_EVENT_OPS_UVW_EDGE = (0x150), // UVW edge event 243 ELC_EVENT_ADC0_SCAN_END = (0x160), // End of A/D scanning operation 244 ELC_EVENT_ADC0_SCAN_END_B = (0x161), // A/D scan end interrupt for group B 245 ELC_EVENT_ADC0_WINDOW_A = (0x162), // Window A Compare match interrupt 246 ELC_EVENT_ADC0_WINDOW_B = (0x163), // Window B Compare match interrupt 247 ELC_EVENT_ADC0_COMPARE_MATCH = (0x164), // Compare match 248 ELC_EVENT_ADC0_COMPARE_MISMATCH = (0x165), // Compare mismatch 249 ELC_EVENT_ADC1_SCAN_END = (0x166), // End of A/D scanning operation 250 ELC_EVENT_ADC1_SCAN_END_B = (0x167), // A/D scan end interrupt for group B 251 ELC_EVENT_ADC1_WINDOW_A = (0x168), // Window A Compare match interrupt 252 ELC_EVENT_ADC1_WINDOW_B = (0x169), // Window B Compare match interrupt 253 ELC_EVENT_ADC1_COMPARE_MATCH = (0x16A), // Compare match 254 ELC_EVENT_ADC1_COMPARE_MISMATCH = (0x16B), // Compare mismatch 255 ELC_EVENT_EDMAC0_EINT = (0x16F), // EDMAC 0 interrupt 256 ELC_EVENT_USBHS_FIFO_0 = (0x17D), // DMA transfer request 0 257 ELC_EVENT_USBHS_FIFO_1 = (0x17E), // DMA transfer request 1 258 ELC_EVENT_USBHS_USB_INT_RESUME = (0x17F), // USBHS interrupt 259 ELC_EVENT_SCI0_RXI = (0x180), // Receive data full 260 ELC_EVENT_SCI0_TXI = (0x181), // Transmit data empty 261 ELC_EVENT_SCI0_TEI = (0x182), // Transmit end 262 ELC_EVENT_SCI0_ERI = (0x183), // Receive error 263 ELC_EVENT_SCI0_AM = (0x184), // Address match event 264 ELC_EVENT_SCI0_RXI_OR_ERI = (0x185), // Receive data full/Receive error 265 ELC_EVENT_SCI1_RXI = (0x186), // Receive data full 266 ELC_EVENT_SCI1_TXI = (0x187), // Transmit data empty 267 ELC_EVENT_SCI1_TEI = (0x188), // Transmit end 268 ELC_EVENT_SCI1_ERI = (0x189), // Receive error 269 ELC_EVENT_SCI2_RXI = (0x18C), // Receive data full 270 ELC_EVENT_SCI2_TXI = (0x18D), // Transmit data empty 271 ELC_EVENT_SCI2_TEI = (0x18E), // Transmit end 272 ELC_EVENT_SCI2_ERI = (0x18F), // Receive error 273 ELC_EVENT_SCI3_RXI = (0x192), // Receive data full 274 ELC_EVENT_SCI3_TXI = (0x193), // Transmit data empty 275 ELC_EVENT_SCI3_TEI = (0x194), // Transmit end 276 ELC_EVENT_SCI3_ERI = (0x195), // Receive error 277 ELC_EVENT_SCI3_AM = (0x196), // Address match event 278 ELC_EVENT_SCI4_RXI = (0x198), // Receive data full 279 ELC_EVENT_SCI4_TXI = (0x199), // Transmit data empty 280 ELC_EVENT_SCI4_TEI = (0x19A), // Transmit end 281 ELC_EVENT_SCI4_ERI = (0x19B), // Receive error 282 ELC_EVENT_SCI4_AM = (0x19C), // Address match event 283 ELC_EVENT_SCI5_RXI = (0x19E), // Receive data full 284 ELC_EVENT_SCI5_TXI = (0x19F), // Transmit data empty 285 ELC_EVENT_SCI5_TEI = (0x1A0), // Transmit end 286 ELC_EVENT_SCI5_ERI = (0x1A1), // Receive error 287 ELC_EVENT_SCI5_AM = (0x1A2), // Address match event 288 ELC_EVENT_SCI6_RXI = (0x1A4), // Receive data full 289 ELC_EVENT_SCI6_TXI = (0x1A5), // Transmit data empty 290 ELC_EVENT_SCI6_TEI = (0x1A6), // Transmit end 291 ELC_EVENT_SCI6_ERI = (0x1A7), // Receive error 292 ELC_EVENT_SCI6_AM = (0x1A8), // Address match event 293 ELC_EVENT_SCI7_RXI = (0x1AA), // Receive data full 294 ELC_EVENT_SCI7_TXI = (0x1AB), // Transmit data empty 295 ELC_EVENT_SCI7_TEI = (0x1AC), // Transmit end 296 ELC_EVENT_SCI7_ERI = (0x1AD), // Receive error 297 ELC_EVENT_SCI7_AM = (0x1AE), // Address match event 298 ELC_EVENT_SCI8_RXI = (0x1B0), // Receive data full 299 ELC_EVENT_SCI8_TXI = (0x1B1), // Transmit data empty 300 ELC_EVENT_SCI8_TEI = (0x1B2), // Transmit end 301 ELC_EVENT_SCI8_ERI = (0x1B3), // Receive error 302 ELC_EVENT_SCI8_AM = (0x1B4), // Address match event 303 ELC_EVENT_SCI9_RXI = (0x1B6), // Receive data full 304 ELC_EVENT_SCI9_TXI = (0x1B7), // Transmit data empty 305 ELC_EVENT_SCI9_TEI = (0x1B8), // Transmit end 306 ELC_EVENT_SCI9_ERI = (0x1B9), // Receive error 307 ELC_EVENT_SCI9_AM = (0x1BA), // Address match event 308 ELC_EVENT_SCIX0_SCIX0 = (0x1BC), // SCI0 extended serial mode event 0 309 ELC_EVENT_SCIX0_SCIX1 = (0x1BD), // SCI0 extended serial mode event 1 310 ELC_EVENT_SCIX0_SCIX2 = (0x1BE), // SCI0 extended serial mode event 2 311 ELC_EVENT_SCIX0_SCIX3 = (0x1BF), // SCI0 extended serial mode event 3 312 ELC_EVENT_SCIX1_SCIX0 = (0x1C0), // SCI1 extended serial mode event 0 313 ELC_EVENT_SCIX1_SCIX1 = (0x1C1), // SCI1 extended serial mode event 1 314 ELC_EVENT_SCIX1_SCIX2 = (0x1C2), // SCI1 extended serial mode event 2 315 ELC_EVENT_SCIX1_SCIX3 = (0x1C3), // SCI1 extended serial mode event 3 316 ELC_EVENT_SPI0_RXI = (0x1C4), // Receive buffer full 317 ELC_EVENT_SPI0_TXI = (0x1C5), // Transmit buffer empty 318 ELC_EVENT_SPI0_IDLE = (0x1C6), // Idle 319 ELC_EVENT_SPI0_ERI = (0x1C7), // Error 320 ELC_EVENT_SPI0_TEI = (0x1C8), // Transmission complete event 321 ELC_EVENT_SPI1_RXI = (0x1C9), // Receive buffer full 322 ELC_EVENT_SPI1_TXI = (0x1CA), // Transmit buffer empty 323 ELC_EVENT_SPI1_IDLE = (0x1CB), // Idle 324 ELC_EVENT_SPI1_ERI = (0x1CC), // Error 325 ELC_EVENT_SPI1_TEI = (0x1CD), // Transmission complete event 326 ELC_EVENT_CAN_AFLRAM0_ERI = (0x1CE), // ECC error 327 ELC_EVENT_CAN_AFLRAM1_ERI = (0x1CF), // ECC error 328 ELC_EVENT_CAN0_MRAM_ERI = (0x1D0), // CANFD0 ECC error 329 ELC_EVENT_OSPI_INT = (0x1D9), // OSPI interrupt 330 ELC_EVENT_QSPI_INT = (0x1DA), // QSPI interrupt 331 ELC_EVENT_DOC_INT = (0x1DB) // Data operation circuit interrupt 332 } elc_event_t; 333 334 #define BSP_PRV_VECT_ENUM(event,group) (ELC_ ## event) 335 336 #define ELC_PERIPHERAL_NUM (19U) 337 #define BSP_OVERRIDE_ELC_PERIPHERAL_T 338 /** Possible peripherals to be linked to event signals 339 * @note This list is device specific. 340 * */ 341 typedef enum e_elc_peripheral 342 { 343 ELC_PERIPHERAL_GPT_A = (0), 344 ELC_PERIPHERAL_GPT_B = (1), 345 ELC_PERIPHERAL_GPT_C = (2), 346 ELC_PERIPHERAL_GPT_D = (3), 347 ELC_PERIPHERAL_GPT_E = (4), 348 ELC_PERIPHERAL_GPT_F = (5), 349 ELC_PERIPHERAL_GPT_G = (6), 350 ELC_PERIPHERAL_GPT_H = (7), 351 ELC_PERIPHERAL_ADC0 = (8), 352 ELC_PERIPHERAL_ADC0_B = (9), 353 ELC_PERIPHERAL_ADC1 = (10), 354 ELC_PERIPHERAL_ADC1_B = (11), 355 ELC_PERIPHERAL_DAC0 = (12), 356 ELC_PERIPHERAL_DAC1 = (13), 357 ELC_PERIPHERAL_IOPORT1 = (14), 358 ELC_PERIPHERAL_IOPORT2 = (15), 359 ELC_PERIPHERAL_IOPORT3 = (16), 360 ELC_PERIPHERAL_IOPORT4 = (17), 361 ELC_PERIPHERAL_CTSU = (18) 362 } elc_peripheral_t; 363 364 /** Positions of event link set registers (ELSRs) available on this MCU */ 365 #define BSP_ELC_PERIPHERAL_MASK (0x0007FFFFU) 366 367 /* UNCRUSTIFY-ON */ 368 /** @} (end addtogroup BSP_MCU_RA6M5) */ 369 370 #endif 371
