1 /* 2 * Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef BSP_ELC_H 8 #define BSP_ELC_H 9 10 /*******************************************************************************************************************//** 11 * @addtogroup BSP_MCU_RA4L1 12 * @{ 13 **********************************************************************************************************************/ 14 15 /*********************************************************************************************************************** 16 * Macro definitions 17 **********************************************************************************************************************/ 18 19 /*********************************************************************************************************************** 20 * Typedef definitions 21 **********************************************************************************************************************/ 22 23 /*********************************************************************************************************************** 24 * Exported global variables 25 **********************************************************************************************************************/ 26 27 /*********************************************************************************************************************** 28 * Exported global functions (to be accessed by other files) 29 **********************************************************************************************************************/ 30 31 /* UNCRUSTIFY-OFF */ 32 33 /** Sources of event signals to be linked to other peripherals or the CPU 34 * @note This list is device specific. 35 * */ 36 typedef enum e_elc_event_ra4l1 37 { 38 ELC_EVENT_NONE = (0x0), // Link disabled 39 ELC_EVENT_ICU_IRQ0 = (0x001), // External pin interrupt 0 40 ELC_EVENT_ICU_IRQ1 = (0x002), // External pin interrupt 1 41 ELC_EVENT_ICU_IRQ2 = (0x003), // External pin interrupt 2 42 ELC_EVENT_ICU_IRQ3 = (0x004), // External pin interrupt 3 43 ELC_EVENT_ICU_IRQ4 = (0x005), // External pin interrupt 4 44 ELC_EVENT_ICU_IRQ5 = (0x006), // External pin interrupt 5 45 ELC_EVENT_ICU_IRQ6 = (0x007), // External pin interrupt 6 46 ELC_EVENT_ICU_IRQ7 = (0x008), // External pin interrupt 7 47 ELC_EVENT_ICU_IRQ8 = (0x009), // External pin interrupt 8 48 ELC_EVENT_ICU_IRQ9 = (0x00A), // External pin interrupt 9 49 ELC_EVENT_ICU_IRQ10 = (0x00B), // External pin interrupt 10 50 ELC_EVENT_ICU_IRQ11 = (0x00C), // External pin interrupt 11 51 ELC_EVENT_ICU_IRQ12 = (0x00D), // External pin interrupt 12 52 ELC_EVENT_ICU_IRQ13 = (0x00E), // External pin interrupt 13 53 ELC_EVENT_ICU_IRQ14 = (0x00F), // External pin interrupt 14 54 ELC_EVENT_ICU_IRQ15 = (0x010), // External pin interrupt 15 55 ELC_EVENT_DMAC0_INT = (0x020), // DMAC0 transfer end 56 ELC_EVENT_DMAC1_INT = (0x021), // DMAC1 transfer end 57 ELC_EVENT_DMAC2_INT = (0x022), // DMAC2 transfer end 58 ELC_EVENT_DMAC3_INT = (0x023), // DMAC3 transfer end 59 ELC_EVENT_DMAC4_INT = (0x024), // DMAC4 transfer end 60 ELC_EVENT_DMAC5_INT = (0x025), // DMAC5 transfer end 61 ELC_EVENT_DMAC6_INT = (0x026), // DMAC6 transfer end 62 ELC_EVENT_DMAC7_INT = (0x027), // DMAC7 transfer end 63 ELC_EVENT_DTC_COMPLETE = (0x029), // DTC transfer complete 64 ELC_EVENT_DTC_END = (0x02A), // DTC transfer end 65 ELC_EVENT_DMA_TRANSERR = (0x02B), // DMA/DTC transfer error 66 ELC_EVENT_ICU_SNOOZE_CANCEL = (0x02D), // Canceling from Snooze mode 67 ELC_EVENT_FCU_FIFERR = (0x030), // Flash access error interrupt 68 ELC_EVENT_FCU_FRDYI = (0x031), // Flash ready interrupt 69 ELC_EVENT_LVD_LVD1 = (0x038), // Voltage monitor 1 interrupt 70 ELC_EVENT_LVD_LVD2 = (0x039), // Voltage monitor 2 interrupt 71 ELC_EVENT_CGC_MOSC_STOP = (0x03B), // Main Clock oscillation stop 72 ELC_EVENT_LPM_SNOOZE_REQUEST = (0x03C), // Snooze entry 73 ELC_EVENT_CGC_SOSC_STOP = (0x03D), // Sub oscillation stop 74 ELC_EVENT_AGT0_INT = (0x040), // AGT interrupt 75 ELC_EVENT_AGT0_COMPARE_A = (0x041), // Compare match A 76 ELC_EVENT_AGT0_COMPARE_B = (0x042), // Compare match B 77 ELC_EVENT_AGT1_INT = (0x043), // AGT interrupt 78 ELC_EVENT_AGT1_COMPARE_A = (0x044), // Compare match A 79 ELC_EVENT_AGT1_COMPARE_B = (0x045), // Compare match B 80 ELC_EVENT_IWDT_UNDERFLOW = (0x052), // IWDT underflow 81 ELC_EVENT_WDT_UNDERFLOW = (0x053), // WDT underflow 82 ELC_EVENT_RTC_ALARM = (0x054), // Alarm interrupt 83 ELC_EVENT_RTC_PERIOD = (0x055), // Periodic interrupt 84 ELC_EVENT_RTC_CARRY = (0x056), // Carry interrupt 85 ELC_EVENT_CAN_RXF = (0x059), // Global receive FIFO interrupt 86 ELC_EVENT_CAN_GLERR = (0x05A), // Global error 87 ELC_EVENT_CAN_DMAREQ0 = (0x05B), // RX fifo DMA request 0 88 ELC_EVENT_CAN_DMAREQ1 = (0x05C), // RX fifo DMA request 1 89 ELC_EVENT_CAN0_TX = (0x063), // Transmit interrupt 90 ELC_EVENT_CAN0_CHERR = (0x064), // Channel error 91 ELC_EVENT_CAN0_COMFRX = (0x065), // Common FIFO receive interrupt 92 ELC_EVENT_CAN0_CF_DMAREQ = (0x066), // Channel DMA request 93 ELC_EVENT_CAN0_RXMB = (0x067), // Receive message buffer interrupt 94 ELC_EVENT_USBFS_FIFO_0 = (0x06B), // DMA/DTC transfer request 0 95 ELC_EVENT_USBFS_FIFO_1 = (0x06C), // DMA/DTC transfer request 1 96 ELC_EVENT_USBFS_INT = (0x06D), // USBFS interrupt 97 ELC_EVENT_USBFS_RESUME = (0x06E), // USBFS resume interrupt 98 ELC_EVENT_IIC0_RXI = (0x073), // Receive data full 99 ELC_EVENT_IIC0_TXI = (0x074), // Transmit data empty 100 ELC_EVENT_IIC0_TEI = (0x075), // Transmit end 101 ELC_EVENT_IIC0_ERI = (0x076), // Transfer error 102 ELC_EVENT_IIC0_WUI = (0x077), // Wakeup interrupt 103 ELC_EVENT_SSI0_TXI = (0x08A), // Transmit data empty 104 ELC_EVENT_SSI0_RXI = (0x08B), // Receive data full 105 ELC_EVENT_SSI0_INT = (0x08D), // Error interrupt 106 ELC_EVENT_UARTA0_TXI = (0x08E), // UARTA0 transmission transfer end or buffer empty interrupt 107 ELC_EVENT_UARTA0_RXI = (0x08F), // UARTA0 reception transfer end 108 ELC_EVENT_UARTA0_ERRI = (0x090), // UARTA0 reception communication error occurrence 109 ELC_EVENT_UARTA1_TXI = (0x091), // UARTA1 transmission transfer end or buffer empty interrupt 110 ELC_EVENT_UARTA1_RXI = (0x092), // UARTA1 reception transfer end 111 ELC_EVENT_UARTA1_ERRI = (0x093), // UARTA1 reception communication error occurrence 112 ELC_EVENT_ACMPLP0_INT = (0x094), // Low Power Comparator channel 0 interrupt 113 ELC_EVENT_ACMPLP1_INT = (0x095), // Low Power Comparator channel 1 interrupt 114 ELC_EVENT_CTSU_WRITE = (0x09A), // Write request interrupt 115 ELC_EVENT_CTSU_READ = (0x09B), // Measurement data transfer request interrupt 116 ELC_EVENT_CTSU_END = (0x09C), // Measurement end interrupt 117 ELC_EVENT_CAC_FREQUENCY_ERROR = (0x09E), // Frequency error interrupt 118 ELC_EVENT_CAC_MEASUREMENT_END = (0x09F), // Measurement end interrupt 119 ELC_EVENT_CAC_OVERFLOW = (0x0A0), // Overflow interrupt 120 ELC_EVENT_IOPORT_EVENT_1 = (0x0B1), // Port 1 event 121 ELC_EVENT_IOPORT_EVENT_2 = (0x0B2), // Port 2 event 122 ELC_EVENT_IOPORT_EVENT_3 = (0x0B3), // Port 3 event 123 ELC_EVENT_IOPORT_EVENT_4 = (0x0B4), // Port 4 event 124 ELC_EVENT_ELC_SOFTWARE_EVENT_0 = (0x0B5), // Software event 0 125 ELC_EVENT_ELC_SOFTWARE_EVENT_1 = (0x0B6), // Software event 1 126 ELC_EVENT_POEG0_EVENT = (0x0B7), // Port Output disable 0 interrupt 127 ELC_EVENT_POEG1_EVENT = (0x0B8), // Port Output disable 1 interrupt 128 ELC_EVENT_POEG2_EVENT = (0x0B9), // Port Output disable 2 interrupt 129 ELC_EVENT_POEG3_EVENT = (0x0BA), // Port Output disable 3 interrupt 130 ELC_EVENT_GPT0_CAPTURE_COMPARE_A = (0x0C0), // Capture/Compare match A 131 ELC_EVENT_GPT0_CAPTURE_COMPARE_B = (0x0C1), // Capture/Compare match B 132 ELC_EVENT_GPT0_COMPARE_C = (0x0C2), // Compare match C 133 ELC_EVENT_GPT0_COMPARE_D = (0x0C3), // Compare match D 134 ELC_EVENT_GPT0_COMPARE_E = (0x0C4), // Compare match E 135 ELC_EVENT_GPT0_COMPARE_F = (0x0C5), // Compare match F 136 ELC_EVENT_GPT0_COUNTER_OVERFLOW = (0x0C6), // Overflow 137 ELC_EVENT_GPT0_COUNTER_UNDERFLOW = (0x0C7), // Underflow 138 ELC_EVENT_GPT0_PC = (0x0C8), // Period count function finish 139 ELC_EVENT_GPT1_CAPTURE_COMPARE_A = (0x0C9), // Capture/Compare match A 140 ELC_EVENT_GPT1_CAPTURE_COMPARE_B = (0x0CA), // Capture/Compare match B 141 ELC_EVENT_GPT1_COMPARE_C = (0x0CB), // Compare match C 142 ELC_EVENT_GPT1_COMPARE_D = (0x0CC), // Compare match D 143 ELC_EVENT_GPT1_COMPARE_E = (0x0CD), // Compare match E 144 ELC_EVENT_GPT1_COMPARE_F = (0x0CE), // Compare match F 145 ELC_EVENT_GPT1_COUNTER_OVERFLOW = (0x0CF), // Overflow 146 ELC_EVENT_GPT1_COUNTER_UNDERFLOW = (0x0D0), // Underflow 147 ELC_EVENT_GPT1_PC = (0x0D1), // Period count function finish 148 ELC_EVENT_GPT2_CAPTURE_COMPARE_A = (0x0D2), // Capture/Compare match A 149 ELC_EVENT_GPT2_CAPTURE_COMPARE_B = (0x0D3), // Capture/Compare match B 150 ELC_EVENT_GPT2_COMPARE_C = (0x0D4), // Compare match C 151 ELC_EVENT_GPT2_COMPARE_D = (0x0D5), // Compare match D 152 ELC_EVENT_GPT2_COMPARE_E = (0x0D6), // Compare match E 153 ELC_EVENT_GPT2_COMPARE_F = (0x0D7), // Compare match F 154 ELC_EVENT_GPT2_COUNTER_OVERFLOW = (0x0D8), // Overflow 155 ELC_EVENT_GPT2_COUNTER_UNDERFLOW = (0x0D9), // Underflow 156 ELC_EVENT_GPT2_PC = (0x0DA), // Period count function finish 157 ELC_EVENT_GPT3_CAPTURE_COMPARE_A = (0x0DB), // Capture/Compare match A 158 ELC_EVENT_GPT3_CAPTURE_COMPARE_B = (0x0DC), // Capture/Compare match B 159 ELC_EVENT_GPT3_COMPARE_C = (0x0DD), // Compare match C 160 ELC_EVENT_GPT3_COMPARE_D = (0x0DE), // Compare match D 161 ELC_EVENT_GPT3_COMPARE_E = (0x0DF), // Compare match E 162 ELC_EVENT_GPT3_COMPARE_F = (0x0E0), // Compare match F 163 ELC_EVENT_GPT3_COUNTER_OVERFLOW = (0x0E1), // Overflow 164 ELC_EVENT_GPT3_COUNTER_UNDERFLOW = (0x0E2), // Underflow 165 ELC_EVENT_GPT3_PC = (0x0E3), // Period count function finish 166 ELC_EVENT_GPT4_CAPTURE_COMPARE_A = (0x0E4), // Capture/Compare match A 167 ELC_EVENT_GPT4_CAPTURE_COMPARE_B = (0x0E5), // Capture/Compare match B 168 ELC_EVENT_GPT4_COMPARE_C = (0x0E6), // Compare match C 169 ELC_EVENT_GPT4_COMPARE_D = (0x0E7), // Compare match D 170 ELC_EVENT_GPT4_COMPARE_E = (0x0E8), // Compare match E 171 ELC_EVENT_GPT4_COMPARE_F = (0x0E9), // Compare match F 172 ELC_EVENT_GPT4_COUNTER_OVERFLOW = (0x0EA), // Overflow 173 ELC_EVENT_GPT4_COUNTER_UNDERFLOW = (0x0EB), // Underflow 174 ELC_EVENT_GPT4_PC = (0x0EC), // Period count function finish 175 ELC_EVENT_GPT5_CAPTURE_COMPARE_A = (0x0ED), // Capture/Compare match A 176 ELC_EVENT_GPT5_CAPTURE_COMPARE_B = (0x0EE), // Capture/Compare match B 177 ELC_EVENT_GPT5_COMPARE_C = (0x0EF), // Compare match C 178 ELC_EVENT_GPT5_COMPARE_D = (0x0F0), // Compare match D 179 ELC_EVENT_GPT5_COMPARE_E = (0x0F1), // Compare match E 180 ELC_EVENT_GPT5_COMPARE_F = (0x0F2), // Compare match F 181 ELC_EVENT_GPT5_COUNTER_OVERFLOW = (0x0F3), // Overflow 182 ELC_EVENT_GPT5_COUNTER_UNDERFLOW = (0x0F4), // Underflow 183 ELC_EVENT_OPS_UVW_EDGE = (0x150), // UVW edge event 184 ELC_EVENT_ADC0_SCAN_END = (0x160), // End of A/D scanning operation 185 ELC_EVENT_ADC0_SCAN_END_B = (0x161), // A/D scan end interrupt for group B 186 ELC_EVENT_ADC0_WINDOW_A = (0x162), // Window A Compare match interrupt 187 ELC_EVENT_ADC0_WINDOW_B = (0x163), // Window B Compare match interrupt 188 ELC_EVENT_ADC0_COMPARE_MATCH = (0x164), // Compare match 189 ELC_EVENT_ADC0_COMPARE_MISMATCH = (0x165), // Compare mismatch 190 ELC_EVENT_SCI0_RXI = (0x180), // Receive data full 191 ELC_EVENT_SCI0_TXI = (0x181), // Transmit data empty 192 ELC_EVENT_SCI0_TEI = (0x182), // Transmit end 193 ELC_EVENT_SCI0_ERI = (0x183), // Receive error 194 ELC_EVENT_SCI0_AM = (0x184), // Address match event 195 ELC_EVENT_SCI0_RXI_OR_ERI = (0x185), // Receive data full/Receive error 196 ELC_EVENT_SCI1_RXI = (0x186), // Receive data full 197 ELC_EVENT_SCI1_TXI = (0x187), // Transmit data empty 198 ELC_EVENT_SCI1_TEI = (0x188), // Transmit end 199 ELC_EVENT_SCI1_ERI = (0x189), // Receive error 200 ELC_EVENT_SCI3_RXI = (0x192), // Receive data full 201 ELC_EVENT_SCI3_TXI = (0x193), // Transmit data empty 202 ELC_EVENT_SCI3_TEI = (0x194), // Transmit end 203 ELC_EVENT_SCI3_ERI = (0x195), // Receive error 204 ELC_EVENT_SCI3_AM = (0x196), // Address match event 205 ELC_EVENT_SCI4_RXI = (0x198), // Receive data full 206 ELC_EVENT_SCI4_TXI = (0x199), // Transmit data empty 207 ELC_EVENT_SCI4_TEI = (0x19A), // Transmit end 208 ELC_EVENT_SCI4_ERI = (0x19B), // Receive error 209 ELC_EVENT_SCI4_AM = (0x19C), // Address match event 210 ELC_EVENT_SCI5_RXI = (0x19E), // Receive data full 211 ELC_EVENT_SCI5_TXI = (0x19F), // Transmit data empty 212 ELC_EVENT_SCI5_TEI = (0x1A0), // Transmit end 213 ELC_EVENT_SCI5_ERI = (0x1A1), // Receive error 214 ELC_EVENT_SCI5_AM = (0x1A2), // Address match event 215 ELC_EVENT_SCI9_RXI = (0x1B6), // Receive data full 216 ELC_EVENT_SCI9_TXI = (0x1B7), // Transmit data empty 217 ELC_EVENT_SCI9_TEI = (0x1B8), // Transmit end 218 ELC_EVENT_SCI9_ERI = (0x1B9), // Receive error 219 ELC_EVENT_SCI9_AM = (0x1BA), // Address match event 220 ELC_EVENT_SCIX0_SCIX0 = (0x1BC), // SCI0 extended serial mode event 0 221 ELC_EVENT_SCI1_SCIX0 = (0x1BC), // SCI0 extended serial mode event 0 222 ELC_EVENT_SCIX0_SCIX1 = (0x1BD), // SCI0 extended serial mode event 1 223 ELC_EVENT_SCI1_SCIX1 = (0x1BD), // SCI0 extended serial mode event 1 224 ELC_EVENT_SCIX0_SCIX2 = (0x1BE), // SCI0 extended serial mode event 2 225 ELC_EVENT_SCI1_SCIX2 = (0x1BE), // SCI0 extended serial mode event 2 226 ELC_EVENT_SCIX0_SCIX3 = (0x1BF), // SCI0 extended serial mode event 3 227 ELC_EVENT_SCI1_SCIX3 = (0x1BF), // SCI0 extended serial mode event 3 228 ELC_EVENT_SPI0_RXI = (0x1C4), // Receive buffer full 229 ELC_EVENT_SPI0_TXI = (0x1C5), // Transmit buffer empty 230 ELC_EVENT_SPI0_IDLE = (0x1C6), // Idle 231 ELC_EVENT_SPI0_ERI = (0x1C7), // Error 232 ELC_EVENT_SPI0_TEI = (0x1C8), // Transmission complete event 233 ELC_EVENT_CAN0_MRAM_ERI = (0x1D0), // CANFD0 ECC error 234 ELC_EVENT_QSPI_INT = (0x1DA), // QSPI interrupt 235 ELC_EVENT_DOC_INT = (0x1DB), // Data operation circuit interrupt 236 ELC_EVENT_I3C0_RESPONSE = (0x1DC), // Response status buffer full 237 ELC_EVENT_I3C0_COMMAND = (0x1DD), // Command buffer empty 238 ELC_EVENT_I3C0_IBI = (0x1DE), // IBI status buffer full 239 ELC_EVENT_I3C0_RX = (0x1DF), // Receive 240 ELC_EVENT_IICB0_RXI = (0x1DF), // Receive 241 ELC_EVENT_I3C0_TX = (0x1E0), // Transmit 242 ELC_EVENT_IICB0_TXI = (0x1E0), // Transmit 243 ELC_EVENT_I3C0_RCV_STATUS = (0x1E1), // Receive status buffer full 244 ELC_EVENT_I3C0_TEND = (0x1E6), // Transmit end 245 ELC_EVENT_IICB0_TEI = (0x1E6), // Transmit end 246 ELC_EVENT_I3C0_EEI = (0x1E7), // Error 247 ELC_EVENT_IICB0_ERI = (0x1E7), // Error 248 ELC_EVENT_I3C0_WU = (0x1EC), // Wake-up Condition Detection interrupt 249 ELC_EVENT_RSIP_TADI = (0x1EE) // RSIP Tamper Detection 250 } elc_event_t; 251 252 #define BSP_PRV_VECT_ENUM(event,group) (ELC_ ## event) 253 254 #define ELC_PERIPHERAL_NUM (19U) 255 #define BSP_OVERRIDE_ELC_PERIPHERAL_T 256 /** Possible peripherals to be linked to event signals 257 * @note This list is device specific. 258 * */ 259 typedef enum e_elc_peripheral 260 { 261 ELC_PERIPHERAL_GPT_A = (0), 262 ELC_PERIPHERAL_GPT_B = (1), 263 ELC_PERIPHERAL_GPT_C = (2), 264 ELC_PERIPHERAL_GPT_D = (3), 265 ELC_PERIPHERAL_GPT_E = (4), 266 ELC_PERIPHERAL_GPT_F = (5), 267 ELC_PERIPHERAL_GPT_G = (6), 268 ELC_PERIPHERAL_GPT_H = (7), 269 ELC_PERIPHERAL_ADC0 = (8), 270 ELC_PERIPHERAL_ADC0_B = (9), 271 ELC_PERIPHERAL_DAC0 = (12), 272 ELC_PERIPHERAL_IOPORT1 = (14), 273 ELC_PERIPHERAL_IOPORT2 = (15), 274 ELC_PERIPHERAL_IOPORT3 = (16), 275 ELC_PERIPHERAL_IOPORT4 = (17), 276 ELC_PERIPHERAL_CTSU = (18) 277 } elc_peripheral_t; 278 279 /** Positions of event link set registers (ELSRs) available on this MCU */ 280 #define BSP_ELC_PERIPHERAL_MASK (0x0007D3FFU) 281 282 /* UNCRUSTIFY-ON */ 283 /** @} (end addtogroup BSP_MCU_RA4L1) */ 284 285 #endif 286
