1 /*
2 * Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6 
7 /*******************************************************************************************************************//**
8  * @addtogroup IIC_MASTER
9  * @{
10  **********************************************************************************************************************/
11 
12 #ifndef R_IIC_MASTER_H
13 #define R_IIC_MASTER_H
14 
15 #include "bsp_api.h"
16 #include "r_iic_master_cfg.h"
17 #include "r_i2c_master_api.h"
18 
19 /* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
20 FSP_HEADER
21 
22 /***********************************************************************************************************************
23  * Macro definitions
24  **********************************************************************************************************************/
25 
26 /***********************************************************************************************************************
27  * Typedef definitions
28  **********************************************************************************************************************/
29 
30 /** I2C Timeout mode parameter definition */
31 typedef enum e_iic_master_timeout_mode
32 {
33     IIC_MASTER_TIMEOUT_MODE_LONG  = 0, ///< Timeout Detection Time Select: Long Mode -> TMOS = 0
34     IIC_MASTER_TIMEOUT_MODE_SHORT = 1  ///< Timeout Detection Time Select: Short Mode -> TMOS = 1
35 } iic_master_timeout_mode_t;
36 
37 typedef enum e_iic_master_timeout_scl_low
38 {
39     IIC_MASTER_TIMEOUT_SCL_LOW_DISABLED = 0, ///< Timeout detection during SCL low disabled
40     IIC_MASTER_TIMEOUT_SCL_LOW_ENABLED  = 1  ///< Timeout detection during SCL low enabled
41 } iic_master_timeout_scl_low_t;
42 
43 /** I2C clock settings */
44 typedef struct iic_master_clock_settings
45 {
46     uint8_t cks_value;                 ///< Internal Reference Clock Select
47     uint8_t brh_value;                 ///< High-level period of SCL clock
48     uint8_t brl_value;                 ///< Low-level period of SCL clock
49 } iic_master_clock_settings_t;
50 
51 /** I2C control structure. DO NOT INITIALIZE. */
52 typedef struct st_iic_master_instance_ctrl
53 {
54     i2c_master_cfg_t const * p_cfg;     // Pointer to the configuration structure
55     uint32_t                 slave;     // The address of the slave device
56     i2c_master_addr_mode_t   addr_mode; // Indicates how slave fields should be interpreted
57 
58     uint32_t      open;                 // Flag to determine if the device is open
59     R_IIC0_Type * p_reg;                // Base register for this channel
60 
61     /* Current transfer information. */
62     uint8_t * p_buff;                   // Holds the data associated with the transfer
63     uint32_t  total;                    // Holds the total number of data bytes to transfer
64     uint32_t  remain;                   // Tracks the remaining data bytes to transfer
65     uint32_t  loaded;                   // Tracks the number of data bytes written to the register
66 
67     uint8_t addr_low;                   // Holds the last address byte to issue
68     uint8_t addr_high;                  // Holds the first address byte to issue in 10-bit mode
69     uint8_t addr_total;                 // Holds the total number of address bytes to transfer
70     uint8_t addr_remain;                // Tracks the remaining address bytes to transfer
71     uint8_t addr_loaded;                // Tracks the number of address bytes written to the register
72 
73     volatile bool read;                 // Holds the direction of the data byte transfer
74     volatile bool restart;              // Holds whether or not the restart should be issued when done
75     volatile bool err;                  // Tracks whether or not an error occurred during processing
76     volatile bool restarted;            // Tracks whether or not a restart was issued during the previous transfer
77     volatile bool dummy_read_completed; // Tracks whether the dummy read is performed
78     volatile bool activation_on_rxi;    // Tracks whether the transfer is activated on RXI interrupt
79     volatile bool activation_on_txi;    // Tracks whether the transfer is activated on TXI interrupt
80     volatile bool address_restarted;    // Tracks whether the restart condition is send on 10 bit read
81 
82     /* Pointer to callback and optional working memory */
83     void (* p_callback)(i2c_master_callback_args_t *);
84     i2c_master_callback_args_t * p_callback_memory;
85 
86     /* Pointer to context to be passed into callback function */
87     void const * p_context;
88 } iic_master_instance_ctrl_t;
89 
90 /** R_IIC extended configuration */
91 typedef struct st_iic_master_extended_cfg
92 {
93     iic_master_timeout_mode_t    timeout_mode;    ///< Timeout Detection Time Select: Long Mode = 0 and Short Mode = 1.
94     iic_master_timeout_scl_low_t timeout_scl_low; ///< Allows timeouts to occur when SCL is held low.
95     iic_master_clock_settings_t  clock_settings;  ///< I2C Clock settings
96 } iic_master_extended_cfg_t;
97 
98 /**********************************************************************************************************************
99  * Exported global variables
100  **********************************************************************************************************************/
101 
102 /** @cond INC_HEADER_DEFS_SEC */
103 /** Filled in Interface API structure for this Instance. */
104 extern i2c_master_api_t const g_i2c_master_on_iic;
105 
106 /** @endcond */
107 
108 /***********************************************************************************************************************
109  * Public APIs
110  **********************************************************************************************************************/
111 fsp_err_t R_IIC_MASTER_Open(i2c_master_ctrl_t * const p_api_ctrl, i2c_master_cfg_t const * const p_cfg);
112 
113 fsp_err_t R_IIC_MASTER_Read(i2c_master_ctrl_t * const p_api_ctrl,
114                             uint8_t * const           p_dest,
115                             uint32_t const            bytes,
116                             bool const                restart);
117 fsp_err_t R_IIC_MASTER_Write(i2c_master_ctrl_t * const p_api_ctrl,
118                              uint8_t * const           p_src,
119                              uint32_t const            bytes,
120                              bool const                restart);
121 fsp_err_t R_IIC_MASTER_Abort(i2c_master_ctrl_t * const p_api_ctrl);
122 fsp_err_t R_IIC_MASTER_SlaveAddressSet(i2c_master_ctrl_t * const    p_api_ctrl,
123                                        uint32_t const               slave,
124                                        i2c_master_addr_mode_t const addr_mode);
125 fsp_err_t R_IIC_MASTER_Close(i2c_master_ctrl_t * const p_api_ctrl);
126 fsp_err_t R_IIC_MASTER_CallbackSet(i2c_master_ctrl_t * const          p_api_ctrl,
127                                    void (                           * p_callback)(i2c_master_callback_args_t *),
128                                    void const * const                 p_context,
129                                    i2c_master_callback_args_t * const p_callback_memory);
130 fsp_err_t R_IIC_MASTER_StatusGet(i2c_master_ctrl_t * const p_api_ctrl, i2c_master_status_t * p_status);
131 
132 /* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
133 FSP_FOOTER
134 
135 #endif                                 // R_IIC_MASTER_H
136 
137 /*******************************************************************************************************************//**
138  * @} (end defgroup IIC_MASTER)
139  **********************************************************************************************************************/
140