1 /* 2 * ========================================================== 3 * 4 * Copyright (C) 2020 QuickLogic Corporation 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 * 15 * File : eoss3_hal_audio_reg.h 16 * Purpose : 17 * 18 * =========================================================== 19 * 20 */ 21 22 #ifndef __EOSS3_HAL_AUDIO_REG_H__ 23 #define __EOSS3_HAL_AUDIO_REG_H__ 24 #include <stdbool.h> 25 26 /* VOICE_DMAC_CONFIG Register */ 27 typedef union ql_arch_voice_dmac_cfg_reg 28 { 29 uint32_t voice_dmac_regVal; 30 struct 31 { 32 uint32_t dmac_en:1; /* LSB */ 33 uint32_t dmac_start:1; 34 uint32_t dmac_stop:1; 35 uint32_t ahb_rdy:1; 36 uint32_t ahb_burst_length:2; 37 uint32_t ping_pong_mode:1; 38 uint32_t stereo_dual_buf_mode:1; 39 uint32_t voice_dmac_burst_spd:8; 40 uint32_t RESERVED:16; 41 }fields; 42 }ql_arch_voice_dmac_cfg_reg; 43 44 /* VOICE_CONFIG Register */ 45 typedef union ql_arch_voice_config_reg 46 { 47 uint32_t vocie_config_regVal; 48 struct 49 { 50 uint32_t dmic_sel : 1; 51 uint32_t lpsd_sel : 1; 52 uint32_t mode_sel : 1; 53 uint32_t mono_chn_sel : 1; 54 uint32_t i2s_ds_en : 1; 55 uint32_t pdm_voice_scenario : 3; 56 uint32_t pdm_mic_switch_to_ap : 1; 57 uint32_t lpsd_use_dc_block : 1; 58 uint32_t lpsd_mux : 1; 59 uint32_t lpsd_no : 1; 60 uint32_t i2s_pga_en : 1; 61 uint32_t reserve1 : 2; 62 uint32_t div_ap : 3; 63 uint32_t div_wd : 6; 64 uint32_t fifo_0_clear : 1; 65 uint32_t fifo_1_clear : 1; 66 uint32_t lpsd_voice_detected_mask : 1; 67 uint32_t dmic_voice_detected_mask : 1; 68 uint32_t dmac_blk_done_mask : 1; 69 uint32_t dmac_buf_done_mask : 1; 70 uint32_t ap_pdm_clk_on_mask : 1; 71 uint32_t ap_pdm_clk_off_mask : 1; 72 }fields; 73 }ql_arch_voice_config_reg; 74 75 /* I2S_CONFIG Register */ 76 typedef union _t_ql_arch_i2s_config_reg 77 { 78 uint32_t i2s_config_regVal; 79 struct 80 { 81 uint32_t i2s_lrcdiv : 12; // 0-11 82 uint32_t i2s_bclkdiv : 6; // 12-17 83 uint32_t i2s_clk_inv : 1; 84 uint32_t i2s_iwl : 1; 85 uint32_t RESERVED : 11; 86 }fields; 87 }ql_arch_i2s_config_reg; 88 89 /* PDM_CORE_CONFIG register */ 90 typedef union ql_arch_core_pdm_config_reg 91 { 92 uint32_t pdm_core_config_regVal; 93 struct 94 { 95 uint32_t pdmcore_en : 1; 96 uint32_t soft_mute : 1; 97 uint32_t div_mode : 1; 98 uint32_t s_cycles : 3; 99 uint32_t hpgain : 4; 100 uint32_t adchpd : 1; 101 uint32_t mclkdiv : 2; 102 uint32_t sinc_rate : 7; 103 uint32_t pga_l : 5; 104 uint32_t pga_r : 5; 105 uint32_t dmick_dly : 1; 106 uint32_t div_wd_mode : 1; 107 }fields; 108 }ql_arch_core_pdm_config_reg; 109 110 /* LPSD_CONFIG Register */ 111 typedef union ql_arch_lpsd_config_reg 112 { 113 uint32_t lpsd_config_regVal; 114 struct 115 { 116 uint32_t lpsd_thd:16; 117 uint32_t lpsd_ratio_stop:8; 118 uint32_t lpsd_ratio_run:8; 119 }fields; 120 }ql_arch_lpsd_config_reg; 121 122 #endif /* __EOSS3_HAL_AUDIO_REG_H__ */ 123 124
