1 /* 2 ** ################################################################### 3 ** Processors: RV32M1_zero_riscy 4 ** RV32M1_zero_riscy 5 ** 6 ** Compilers: Keil ARM C/C++ Compiler 7 ** GNU C Compiler 8 ** IAR ANSI C/C++ Compiler for ARM 9 ** MCUXpresso Compiler 10 ** 11 ** Reference manual: RV32M1 Series Reference Manual, Rev. 1 , 8/10/2018 12 ** Version: rev. 1.0, 2018-10-02 13 ** Build: b180926 14 ** 15 ** Abstract: 16 ** Provides a system configuration function and a global variable that 17 ** contains the system frequency. It configures the device and initializes 18 ** the oscillator (PLL) that is part of the microcontroller device. 19 ** 20 ** Copyright 2016 Freescale Semiconductor, Inc. 21 ** Copyright 2016-2018 NXP 22 ** All rights reserved. 23 ** 24 ** SPDX-License-Identifier: BSD-3-Clause 25 ** 26 ** http: www.nxp.com 27 ** mail: support@nxp.com 28 ** 29 ** Revisions: 30 ** - rev. 1.0 (2018-10-02) 31 ** Initial version. 32 ** 33 ** ################################################################### 34 */ 35 36 /*! 37 * @file RV32M1_zero_riscy 38 * @version 1.0 39 * @date 2018-10-02 40 * @brief Device specific configuration file for RV32M1_zero_riscy (header 41 * file) 42 * 43 * Provides a system configuration function and a global variable that contains 44 * the system frequency. It configures the device and initializes the oscillator 45 * (PLL) that is part of the microcontroller device. 46 */ 47 48 #ifndef _SYSTEM_RV32M1_zero_riscy_H_ 49 #define _SYSTEM_RV32M1_zero_riscy_H_ /**< Symbol preventing repeated inclusion */ 50 51 #ifdef __cplusplus 52 extern "C" { 53 #endif 54 55 #include <stdint.h> 56 #include <stdbool.h> 57 58 59 #ifndef DISABLE_WDOG 60 #define DISABLE_WDOG 1 61 #endif 62 63 /* Define clock source values */ 64 #define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */ 65 66 /* Low power mode enable */ 67 /* SMC_PMPROT: AHSRUN=1, AVLP=1,ALLS=1,AVLLS=0x3 */ 68 #define SYSTEM_SMC_PMPROT_VALUE 0xABu /* SMC_PMPROT */ 69 #define SYSTEM_SMC_PMCTRL_VALUE 0x0u /* SMC_PMCTRL */ 70 71 #define DEFAULT_SYSTEM_CLOCK 48000000u /* Default System clock value */ 72 73 74 75 /** 76 * @brief System clock frequency (core clock) 77 * 78 * The system clock frequency supplied to the SysTick timer and the processor 79 * core clock. This variable can be used by the user application to setup the 80 * SysTick timer or configure other parameters. It may also be used by debugger to 81 * query the frequency of the debug timer or configure the trace clock speed 82 * SystemCoreClock is initialized with a correct predefined value. 83 */ 84 extern uint32_t SystemCoreClock; 85 86 /** 87 * @brief Setup the microcontroller system. 88 * 89 * Typically this function configures the oscillator (PLL) that is part of the 90 * microcontroller device. For systems with variable clock speed it also updates 91 * the variable SystemCoreClock. SystemInit is called from startup_device file. 92 */ 93 void SystemInit (void); 94 95 /** 96 * @brief Updates the SystemCoreClock variable. 97 * 98 * It must be called whenever the core clock is changed during program 99 * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates 100 * the current core clock. 101 */ 102 void SystemCoreClockUpdate (void); 103 104 /** 105 * @brief SystemInit function hook. 106 * 107 * This weak function allows to call specific initialization code during the 108 * SystemInit() execution.This can be used when an application specific code needs 109 * to be called as close to the reset entry as possible (for example the Multicore 110 * Manager MCMGR_EarlyInit() function call). 111 * NOTE: No global r/w variables can be used in this hook function because the 112 * initialization of these variables happens after this function. 113 */ 114 void SystemInitHook (void); 115 116 /** 117 * @brief System IRQ handler which dispatches specific IRQ to corresponding registered handler. 118 * 119 * It is called from IRQ exception context and dispatches to registered handler according to 120 * MCAUSE interrupt number. 121 * 122 * @param mcause IRQ acknowledge value read from MCAUSE 123 */ 124 void SystemIrqHandler(uint32_t mcause); 125 126 /** 127 * @brief Get IRQ nesting level of current context. 128 * 129 * If the return value is 0, then the context is not ISR, otherwise the context is ISR. 130 * 131 * @return IRQ nesting level 132 */ 133 uint32_t SystemGetIRQNestingLevel (void); 134 135 /** 136 * @brief Setup systick for RTOS system. 137 * 138 * @param tickRateHz Tick number per second 139 * @param intPriority IRQ interrupt priority (the smaller, the higher priority) 140 */ 141 void SystemSetupSystick (uint32_t tickRateHz, uint32_t intPriority); 142 143 /** 144 * @brief Clear systick flag status so that next tick interrupt may occur. 145 */ 146 void SystemClearSystickFlag (void); 147 148 #define SysTick_Handler LPIT1_IRQHandler 149 150 /** 151 * @brief Sysem is in ISR or not. 152 */ 153 bool SystemInISR(void); 154 155 /** 156 * @brief Set interrupt priority in Event unit. 157 */ 158 void EVENT_SetIRQPriority(IRQn_Type IRQn, uint8_t intPriority); 159 160 /* Priority setting macro remap. */ 161 #define NVIC_SetPriority EVENT_SetIRQPriority 162 163 /** 164 * @brief Reset the system. 165 */ 166 void EVENT_SystemReset(void); 167 168 #define NVIC_SystemReset EVENT_SystemReset 169 170 #ifdef __cplusplus 171 } 172 #endif 173 174 #endif /* _SYSTEM_RV32M1_zero_riscy_H_ */ 175
