1 /*
2 * Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2017 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #ifndef _FSL_CRC_H_
10 #define _FSL_CRC_H_
11
12 #include "fsl_common.h"
13
14 /*!
15 * @addtogroup crc
16 * @{
17 */
18
19 /*******************************************************************************
20 * Definitions
21 ******************************************************************************/
22
23 /*! @name Driver version */
24 /*@{*/
25 /*! @brief CRC driver version. Version 2.0.1.
26 *
27 * Current version: 2.0.1
28 *
29 * Change log:
30 * - Version 2.0.1
31 * - move DATA and DATALL macro definition from header file to source file
32 */
33 #define FSL_CRC_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
34 /*@}*/
35
36 #ifndef CRC_DRIVER_CUSTOM_DEFAULTS
37 /*! @brief Default configuration structure filled by CRC_GetDefaultConfig(). Use CRC16-CCIT-FALSE as defeault. */
38 #define CRC_DRIVER_USE_CRC16_CCIT_FALSE_AS_DEFAULT 1
39 #endif
40
41 /*! @brief CRC bit width */
42 typedef enum _crc_bits
43 {
44 kCrcBits16 = 0U, /*!< Generate 16-bit CRC code */
45 kCrcBits32 = 1U /*!< Generate 32-bit CRC code */
46 } crc_bits_t;
47
48 /*! @brief CRC result type */
49 typedef enum _crc_result
50 {
51 kCrcFinalChecksum = 0U, /*!< CRC data register read value is the final checksum.
52 Reflect out and final xor protocol features are applied. */
53 kCrcIntermediateChecksum = 1U /*!< CRC data register read value is intermediate checksum (raw value).
54 Reflect out and final xor protocol feature are not applied.
55 Intermediate checksum can be used as a seed for CRC_Init()
56 to continue adding data to this checksum. */
57 } crc_result_t;
58
59 /*!
60 * @brief CRC protocol configuration.
61 *
62 * This structure holds the configuration for the CRC protocol.
63 *
64 */
65 typedef struct _crc_config
66 {
67 uint32_t polynomial; /*!< CRC Polynomial, MSBit first.
68 Example polynomial: 0x1021 = 1_0000_0010_0001 = x^12+x^5+1 */
69 uint32_t seed; /*!< Starting checksum value */
70 bool reflectIn; /*!< Reflect bits on input. */
71 bool reflectOut; /*!< Reflect bits on output. */
72 bool complementChecksum; /*!< True if the result shall be complement of the actual checksum. */
73 crc_bits_t crcBits; /*!< Selects 16- or 32- bit CRC protocol. */
74 crc_result_t crcResult; /*!< Selects final or intermediate checksum return from CRC_Get16bitResult() or
75 CRC_Get32bitResult() */
76 } crc_config_t;
77
78 /*******************************************************************************
79 * API
80 ******************************************************************************/
81 #if defined(__cplusplus)
82 extern "C" {
83 #endif
84
85 /*!
86 * @brief Enables and configures the CRC peripheral module.
87 *
88 * This function enables the clock gate in the SIM module for the CRC peripheral.
89 * It also configures the CRC module and starts a checksum computation by writing the seed.
90 *
91 * @param base CRC peripheral address.
92 * @param config CRC module configuration structure.
93 */
94 void CRC_Init(CRC_Type *base, const crc_config_t *config);
95
96 /*!
97 * @brief Disables the CRC peripheral module.
98 *
99 * This function disables the clock gate in the SIM module for the CRC peripheral.
100 *
101 * @param base CRC peripheral address.
102 */
CRC_Deinit(CRC_Type * base)103 static inline void CRC_Deinit(CRC_Type *base)
104 {
105 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
106 /* gate clock */
107 CLOCK_DisableClock(kCLOCK_Crc0);
108 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
109 }
110
111 /*!
112 * @brief Loads default values to the CRC protocol configuration structure.
113 *
114 * Loads default values to the CRC protocol configuration structure. The default values are as follows.
115 * @code
116 * config->polynomial = 0x1021;
117 * config->seed = 0xFFFF;
118 * config->reflectIn = false;
119 * config->reflectOut = false;
120 * config->complementChecksum = false;
121 * config->crcBits = kCrcBits16;
122 * config->crcResult = kCrcFinalChecksum;
123 * @endcode
124 *
125 * @param config CRC protocol configuration structure.
126 */
127 void CRC_GetDefaultConfig(crc_config_t *config);
128
129 /*!
130 * @brief Writes data to the CRC module.
131 *
132 * Writes input data buffer bytes to the CRC data register.
133 * The configured type of transpose is applied.
134 *
135 * @param base CRC peripheral address.
136 * @param data Input data stream, MSByte in data[0].
137 * @param dataSize Size in bytes of the input data buffer.
138 */
139 void CRC_WriteData(CRC_Type *base, const uint8_t *data, size_t dataSize);
140
141 /*!
142 * @brief Reads the 32-bit checksum from the CRC module.
143 *
144 * Reads the CRC data register (either an intermediate or the final checksum).
145 * The configured type of transpose and complement is applied.
146 *
147 * @param base CRC peripheral address.
148 * @return An intermediate or the final 32-bit checksum, after configured transpose and complement operations.
149 */
150 uint32_t CRC_Get32bitResult(CRC_Type *base);
151
152 /*!
153 * @brief Reads a 16-bit checksum from the CRC module.
154 *
155 * Reads the CRC data register (either an intermediate or the final checksum).
156 * The configured type of transpose and complement is applied.
157 *
158 * @param base CRC peripheral address.
159 * @return An intermediate or the final 16-bit checksum, after configured transpose and complement operations.
160 */
161 uint16_t CRC_Get16bitResult(CRC_Type *base);
162
163 #if defined(__cplusplus)
164 }
165 #endif
166
167 /*!
168 *@}
169 */
170
171 #endif /* _FSL_CRC_H_ */
172
