1 /* 2 * Copyright 2024 NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef QSPI_IP_CFG_H 8 #define QSPI_IP_CFG_H 9 10 /** 11 * @file Qspi_Ip_Cfg.h 12 * 13 * @addtogroup MEM_EXFLS 14 * Qspi_Ip_Cfg.h_Artifact 15 * @{ 16 */ 17 18 19 #ifdef __cplusplus 20 extern "C"{ 21 #endif 22 23 24 /*================================================================================================== 25 * INCLUDE FILES 26 * 1) system and project includes 27 * 2) needed interfaces from external units 28 * 3) internal and external interfaces from this unit 29 ==================================================================================================*/ 30 #include "Qspi_Ip_Types.h" 31 #include <zephyr/devicetree.h> 32 33 /*================================================================================================== 34 * SOURCE FILE VERSION INFORMATION 35 ==================================================================================================*/ 36 #define QSPI_IP_VENDOR_ID_CFG 43 37 #define QSPI_IP_AR_RELEASE_MAJOR_VERSION_CFG 4 38 #define QSPI_IP_AR_RELEASE_MINOR_VERSION_CFG 7 39 #define QSPI_IP_AR_RELEASE_REVISION_VERSION_CFG 0 40 #define QSPI_IP_SW_MAJOR_VERSION_CFG 2 41 #define QSPI_IP_SW_MINOR_VERSION_CFG 0 42 #define QSPI_IP_SW_PATCH_VERSION_CFG 0 43 44 /*================================================================================================== 45 * FILE VERSION CHECKS 46 ==================================================================================================*/ 47 48 49 /*================================================================================================== 50 DEFINES AND MACROS 51 ==================================================================================================*/ 52 53 /* Number of serial flash devices */ 54 #define QSPI_IP_MEM_INSTANCE_COUNT DT_NUM_INST_STATUS_OKAY(nxp_s32_qspi_hyperflash) 55 56 /* Maximum number of retries for Write Enable command */ 57 #define QSPI_IP_MAX_RETRY (3U) 58 59 /* Development error detection for QSPI Ip API */ 60 #define QSPI_IP_DEV_ERROR_DETECT (STD_OFF) 61 62 /* Timeout for DLL lock sequence */ 63 #define QSPI_IP_DLL_LOCK_TIMEOUT (10000000U) 64 65 /* Timeout for QSPI command completion */ 66 #define QSPI_IP_CMD_COMPLETE_TIMEOUT (10000000U) 67 68 /* After the FRAD checks pass we wait for QSPI to become idle */ 69 #define QSPI_IP_QSPI_IDLE_TIMEOUT (100U) 70 71 /* Timeout for external flash software reset completion */ 72 #define QSPI_IP_RESET_TIMEOUT (2000000U) 73 74 /* Timeout for external flash startup initialization sequence completion */ 75 #define QSPI_IP_FLS_INIT_TIMEOUT (2000000U) 76 77 /* Timeout for a complete read operation */ 78 #define QSPI_IP_READ_TIMEOUT (2147483647U) 79 80 /* OsIf counter type used in timeout detection for QSPI IP operations */ 81 #define QSPI_IP_TIMEOUT_TYPE (OSIF_COUNTER_DUMMY) 82 83 /* Delay after changing the value of the QSPI software reset bits */ 84 #define QSPI_IP_SOFTWARE_RESET_DELAY (21U) 85 86 /*! @brief Minimum delay in CPU cycles between Tx FIFO reset and Tx FIFO push */ 87 #define QSPI_IP_TX_BUFFER_RESET_DELAY (0U) 88 89 90 /* QSPI user mode support macro */ 91 #define QSPI_IP_ENABLE_USER_MODE_SUPPORT (STD_OFF) 92 93 #ifndef MCAL_ENABLE_USER_MODE_SUPPORT 94 #if (STD_ON == QSPI_IP_ENABLE_USER_MODE_SUPPORT) 95 #error MCAL_ENABLE_USER_MODE_SUPPORT is not enabled. For running Fls in user mode the MCAL_ENABLE_USER_MODE_SUPPORT needs to be defined. 96 #endif 97 #endif 98 99 #define QSPI_PERFORM_DEVICE_CONFIG (STD_ON) 100 101 102 /*================================================================================================== 103 DEFINES AND MACROS 104 ==================================================================================================*/ 105 /*================================================================================================== 106 * GLOBAL VARIABLE DECLARATIONS 107 ==================================================================================================*/ 108 109 #ifdef __cplusplus 110 } 111 #endif 112 113 /** @} */ 114 115 #endif /* QSPI_IP_CFG_H */ 116