1 /*
2 * Copyright 2021-2024 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #ifndef ADC_SAR_IP_HW_ACCESS_H
8 #define ADC_SAR_IP_HW_ACCESS_H
9
10 /**
11 * @file
12 *
13 * @internal
14 * @addtogroup adc_sar_ip Adc Sar IPL
15 * @{
16 */
17
18 #ifdef __cplusplus
19 extern "C"{
20 #endif
21
22 /*==================================================================================================
23 * INCLUDE FILES
24 * 1) system and project includes
25 * 2) needed interfaces from external units
26 * 3) internal and external interfaces from this unit
27 ==================================================================================================*/
28 #include "Std_Types.h"
29 #include "Adc_Sar_Ip_CfgDefines.h"
30
31 #if (ADC_SAR_IP_DEV_ERROR_DETECT == STD_ON)
32 #include "Devassert.h"
33 #endif /* (ADC_SAR_IP_DEV_ERROR_DETECT == STD_ON) */
34
35 /*==================================================================================================
36 * SOURCE FILE VERSION INFORMATION
37 ==================================================================================================*/
38 #define ADC_SAR_IP_VENDOR_ID_HWACCESS 43
39 #define ADC_SAR_IP_AR_RELEASE_MAJOR_VERSION_HWACCESS 4
40 #define ADC_SAR_IP_AR_RELEASE_MINOR_VERSION_HWACCESS 7
41 #define ADC_SAR_IP_AR_RELEASE_REVISION_VERSION_HWACCESS 0
42 #define ADC_SAR_IP_SW_MAJOR_VERSION_HWACCESS 2
43 #define ADC_SAR_IP_SW_MINOR_VERSION_HWACCESS 0
44 #define ADC_SAR_IP_SW_PATCH_VERSION_HWACCESS 0
45
46 /*==================================================================================================
47 * FILE VERSION CHECKS
48 ==================================================================================================*/
49 /* Check if Adc_Sar_Ip_HwAccess.h file and Adc_Sar_Ip_CfgDefines.h file are of the same vendor */
50 #if (ADC_SAR_IP_VENDOR_ID_HWACCESS != ADC_SAR_IP_VENDOR_ID_CFGDEFINES)
51 #error "Adc_Sar_Ip_HwAccess.h and Adc_Sar_Ip_CfgDefines.h have different vendor ids"
52 #endif
53
54 /* Check if Adc_Sar_Ip_HwAccess.h file and Adc_Sar_Ip_CfgDefines.h file are of the same Autosar version */
55 #if ((ADC_SAR_IP_AR_RELEASE_MAJOR_VERSION_HWACCESS != ADC_SAR_IP_AR_RELEASE_MAJOR_VERSION_CFGDEFINES) || \
56 (ADC_SAR_IP_AR_RELEASE_MINOR_VERSION_HWACCESS != ADC_SAR_IP_AR_RELEASE_MINOR_VERSION_CFGDEFINES) || \
57 (ADC_SAR_IP_AR_RELEASE_REVISION_VERSION_HWACCESS != ADC_SAR_IP_AR_RELEASE_REVISION_VERSION_CFGDEFINES) \
58 )
59 #error "AutoSar Version Numbers of Adc_Sar_Ip_HwAccess.h and Adc_Sar_Ip_CfgDefines.h are different"
60 #endif
61
62 /* Check if Adc_Sar_Ip_HwAccess.h file and Adc_Sar_Ip_CfgDefines.h file are of the same Software version */
63 #if ((ADC_SAR_IP_SW_MAJOR_VERSION_HWACCESS != ADC_SAR_IP_SW_MAJOR_VERSION_CFGDEFINES) || \
64 (ADC_SAR_IP_SW_MINOR_VERSION_HWACCESS != ADC_SAR_IP_SW_MINOR_VERSION_CFGDEFINES) || \
65 (ADC_SAR_IP_SW_PATCH_VERSION_HWACCESS != ADC_SAR_IP_SW_PATCH_VERSION_CFGDEFINES) \
66 )
67 #error "Software Version Numbers of Adc_Sar_Ip_HwAccess.h and Adc_Sar_Ip_CfgDefines.h are different"
68 #endif
69
70 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
71 /* Check if Adc_Sar_Ip_HwAccess.h file and Std_Types.h file are of the same Autosar version */
72 #if ((ADC_SAR_IP_AR_RELEASE_MAJOR_VERSION_HWACCESS != STD_AR_RELEASE_MAJOR_VERSION) || \
73 (ADC_SAR_IP_AR_RELEASE_MINOR_VERSION_HWACCESS != STD_AR_RELEASE_MINOR_VERSION) \
74 )
75 #error "AutoSar Version Numbers of Adc_Sar_Ip_HwAccess.h and Std_Types.h are different"
76 #endif
77
78 #if (ADC_SAR_IP_DEV_ERROR_DETECT == STD_ON)
79 /* Check if Adc_Sar_Ip_HwAccess.h and Devassert.h are of the same Autosar version */
80 #if ((ADC_SAR_IP_AR_RELEASE_MAJOR_VERSION_HWACCESS != DEVASSERT_AR_RELEASE_MAJOR_VERSION) || \
81 (ADC_SAR_IP_AR_RELEASE_MINOR_VERSION_HWACCESS != DEVASSERT_AR_RELEASE_MINOR_VERSION) \
82 )
83 #error "AutoSar Version Numbers of Adc_Sar_Ip_HwAccess.h and Devassert.h are different"
84 #endif
85 #endif /* (ADC_SAR_IP_DEV_ERROR_DETECT == STD_ON) */
86 #endif /* DISABLE_MCAL_INTERMODULE_ASR_CHECK */
87
88 /*==================================================================================================
89 * EXTERN DECLARATIONS
90 ==================================================================================================*/
91 extern ADC_Type * const Adc_Sar_Ip_apxAdcBase[ADC_INSTANCE_COUNT];
92 #if FEATURE_ADC_HAS_APPLICATION_EXTENSION
93 extern SAR_ADC_AE_Type * const Adc_Sar_AE_Ip_apxAdcBase[SAR_ADC_AE_INSTANCE_COUNT];
94 #endif /* FEATURE_ADC_HAS_APPLICATION_EXTENSION */
95 /*==================================================================================================
96 * DEFINES AND MACROS
97 ==================================================================================================*/
98 /* Define the hardware register size when calculating bit positions */
99 #define ADC_SAR_IP_HW_REG_SIZE (32u)
100
101 /* Definitions to compute bit positions from channel index */
102 #define ADC_SAR_IP_CHAN_2_VECT(CHNIDX) ((CHNIDX) / ADC_SAR_IP_HW_REG_SIZE)
103 #define ADC_SAR_IP_CHAN_2_BIT(CHNIDX) ((CHNIDX) % ADC_SAR_IP_HW_REG_SIZE)
104 /*==================================================================================================
105 FUNCTION DEFINITIONS
106 ==================================================================================================*/
107 #define ADC_START_SEC_CODE
108 #include "Adc_MemMap.h"
109
110 /*FUNCTION*********************************************************************
111 *
112 * Function Name : Adc_Sar_Powerup
113 * Description : Turning on power to the analog portion of ADC
114 *
115 *END*************************************************************************/
Adc_Sar_Powerup(const uint32 Instance)116 static inline void Adc_Sar_Powerup(const uint32 Instance)
117 {
118 ADC_Type * AdcBasePtr = NULL_PTR;
119 #if FEATURE_ADC_HAS_APPLICATION_EXTENSION
120 SAR_ADC_AE_Type * AdcAEBasePtr = NULL_PTR;
121 #endif /* FEATURE_ADC_HAS_APPLICATION_EXTENSION */
122
123 #if FEATURE_ADC_HAS_APPLICATION_EXTENSION
124 if (Instance >= ADC_INSTANCE_COUNT)
125 {
126 AdcAEBasePtr = Adc_Sar_AE_Ip_apxAdcBase[Instance - ADC_INSTANCE_COUNT];
127 AdcAEBasePtr->MCR &= ~(ADC_MCR_PWDN(1u));
128 }
129 else
130 #endif /* FEATURE_ADC_HAS_APPLICATION_EXTENSION */
131 {
132 AdcBasePtr = Adc_Sar_Ip_apxAdcBase[Instance];
133 AdcBasePtr->MCR &= ~(ADC_MCR_PWDN(1u));
134 }
135 }
136
137 /*FUNCTION*********************************************************************
138 *
139 * Function Name : Adc_Sar_Powerdown
140 * Description : Turning off power to the analog portion of ADC
141 *
142 *END*************************************************************************/
Adc_Sar_Powerdown(const uint32 Instance)143 static inline void Adc_Sar_Powerdown(const uint32 Instance)
144 {
145 ADC_Type * AdcBasePtr = NULL_PTR;
146 #if FEATURE_ADC_HAS_APPLICATION_EXTENSION
147 SAR_ADC_AE_Type * AdcAEBasePtr = NULL_PTR;
148 #endif /* FEATURE_ADC_HAS_APPLICATION_EXTENSION */
149
150 #if FEATURE_ADC_HAS_APPLICATION_EXTENSION
151 if (Instance >= ADC_INSTANCE_COUNT)
152 {
153 AdcAEBasePtr = Adc_Sar_AE_Ip_apxAdcBase[Instance - ADC_INSTANCE_COUNT];
154 AdcAEBasePtr->MCR |= ADC_MCR_PWDN(1u);
155 }
156 else
157 #endif /* FEATURE_ADC_HAS_APPLICATION_EXTENSION */
158 {
159 AdcBasePtr = Adc_Sar_Ip_apxAdcBase[Instance];
160 AdcBasePtr->MCR |= ADC_MCR_PWDN(1u);
161 }
162 }
163
164 #if FEATURE_ADC_HAS_HIGH_SPEED_ENABLE
165 /*FUNCTION*********************************************************************
166 *
167 * Function Name : Adc_Sar_EnableHighSpeed
168 * Description : Enable a high-speed calibration or a high-speed conversion
169 *
170 *END*************************************************************************/
Adc_Sar_EnableHighSpeed(ADC_Type * const Base,boolean Enable)171 static inline void Adc_Sar_EnableHighSpeed(ADC_Type * const Base,
172 boolean Enable)
173 {
174 uint32 Amsio = Base->AMSIO;
175
176 Amsio &= ~(ADC_AMSIO_HSEN_MASK | ADC_AMSIO_CMPCTRL0_MASK);
177 if (TRUE == Enable)
178 {
179 Amsio |= (ADC_AMSIO_HSEN(1u) | ADC_AMSIO_CMPCTRL0(1u));
180 }
181
182 Base->AMSIO = Amsio;
183 }
184 #endif /* FEATURE_ADC_HAS_HIGH_SPEED_ENABLE */
185
186 /*FUNCTION*********************************************************************
187 *
188 * Function Name : Adc_Sar_WriteThresholds
189 * Description : Write Watchdog low, high thresholds for a wdog register
190 *
191 *END*************************************************************************/
Adc_Sar_WriteThresholds(const uint32 Instance,const uint8 RegisterNumber,const uint16 HighThreshold,const uint16 LowThreshold)192 static inline void Adc_Sar_WriteThresholds(const uint32 Instance,
193 const uint8 RegisterNumber,
194 const uint16 HighThreshold,
195 const uint16 LowThreshold)
196 {
197 ADC_Type * AdcBasePtr = NULL_PTR;
198 #if FEATURE_ADC_HAS_APPLICATION_EXTENSION
199 SAR_ADC_AE_Type * AdcAEBasePtr = NULL_PTR;
200 #endif /* FEATURE_ADC_HAS_APPLICATION_EXTENSION */
201 #if !ADC_SAR_IP_HAS_THRHLR_ARRAY
202 volatile uint32 * THRHLR0Addr = NULL_PTR;
203 volatile uint32 * THRHLR1Addr = NULL_PTR;
204 volatile uint32 * THRHLR2Addr = NULL_PTR;
205 volatile uint32 * THRHLR3Addr = NULL_PTR;
206 volatile uint32 * THRHLR4Addr = NULL_PTR;
207 volatile uint32 * THRHLR5Addr = NULL_PTR;
208 #if ((ADC_SAR_IP_THRHLR_COUNT > 6U) || FEATURE_ADC_HAS_APPLICATION_EXTENSION)
209 volatile uint32 * THRHLR6Addr = NULL_PTR;
210 volatile uint32 * THRHLR7Addr = NULL_PTR;
211 #if ((ADC_SAR_IP_THRHLR_COUNT > 8U) || FEATURE_ADC_HAS_APPLICATION_EXTENSION)
212 volatile uint32 * THRHLR8Addr = NULL_PTR;
213 volatile uint32 * THRHLR9Addr = NULL_PTR;
214 volatile uint32 * THRHLR10Addr = NULL_PTR;
215 volatile uint32 * THRHLR11Addr = NULL_PTR;
216 #if ((ADC_SAR_IP_THRHLR_COUNT > 12U) || FEATURE_ADC_HAS_APPLICATION_EXTENSION)
217 volatile uint32 * THRHLR12Addr = NULL_PTR;
218 volatile uint32 * THRHLR13Addr = NULL_PTR;
219 volatile uint32 * THRHLR14Addr = NULL_PTR;
220 volatile uint32 * THRHLR15Addr = NULL_PTR;
221 #endif /* ((ADC_SAR_IP_THRHLR_COUNT > 12U) || ...) */
222 #endif /* ((ADC_SAR_IP_THRHLR_COUNT > 8U) || ...) */
223 #endif /* ((ADC_SAR_IP_THRHLR_COUNT > 6U) || ...) */
224 #endif /* !ADC_SAR_IP_HAS_THRHLR_ARRAY */
225
226 #if FEATURE_ADC_HAS_APPLICATION_EXTENSION
227 if (Instance >= ADC_INSTANCE_COUNT)
228 {
229 AdcAEBasePtr = Adc_Sar_AE_Ip_apxAdcBase[Instance - ADC_INSTANCE_COUNT];
230 }
231 else
232 #endif /* FEATURE_ADC_HAS_APPLICATION_EXTENSION */
233 {
234 AdcBasePtr = Adc_Sar_Ip_apxAdcBase[Instance];
235 }
236
237 #if !ADC_SAR_IP_HAS_THRHLR_ARRAY
238 #if FEATURE_ADC_HAS_APPLICATION_EXTENSION
239 if (Instance >= ADC_INSTANCE_COUNT)
240 {
241 THRHLR0Addr = (volatile uint32 *)&(AdcAEBasePtr->THRHLR0);
242 THRHLR1Addr = (volatile uint32 *)&(AdcAEBasePtr->THRHLR1);
243 THRHLR2Addr = (volatile uint32 *)&(AdcAEBasePtr->THRHLR2);
244 THRHLR3Addr = (volatile uint32 *)&(AdcAEBasePtr->THRHLR3);
245 THRHLR4Addr = (volatile uint32 *)&(AdcAEBasePtr->THRHLR4);
246 THRHLR5Addr = (volatile uint32 *)&(AdcAEBasePtr->THRHLR5);
247 THRHLR6Addr = (volatile uint32 *)&(AdcAEBasePtr->THRHLR6);
248 THRHLR7Addr = (volatile uint32 *)&(AdcAEBasePtr->THRHLR7);
249 THRHLR8Addr = (volatile uint32 *)&(AdcAEBasePtr->THRHLR8);
250 THRHLR9Addr = (volatile uint32 *)&(AdcAEBasePtr->THRHLR9);
251 THRHLR10Addr = (volatile uint32 *)&(AdcAEBasePtr->THRHLR10);
252 THRHLR11Addr = (volatile uint32 *)&(AdcAEBasePtr->THRHLR11);
253 THRHLR12Addr = (volatile uint32 *)&(AdcAEBasePtr->THRHLR12);
254 THRHLR13Addr = (volatile uint32 *)&(AdcAEBasePtr->THRHLR13);
255 THRHLR14Addr = (volatile uint32 *)&(AdcAEBasePtr->THRHLR14);
256 THRHLR15Addr = (volatile uint32 *)&(AdcAEBasePtr->THRHLR15);
257 }
258 else
259 #endif /* FEATURE_ADC_HAS_APPLICATION_EXTENSION */
260 {
261 THRHLR0Addr = (volatile uint32 *)&(AdcBasePtr->THRHLR0);
262 THRHLR1Addr = (volatile uint32 *)&(AdcBasePtr->THRHLR1);
263 THRHLR2Addr = (volatile uint32 *)&(AdcBasePtr->THRHLR2);
264 THRHLR3Addr = (volatile uint32 *)&(AdcBasePtr->THRHLR3);
265 THRHLR4Addr = (volatile uint32 *)&(AdcBasePtr->THRHLR4);
266 THRHLR5Addr = (volatile uint32 *)&(AdcBasePtr->THRHLR5);
267 #if (ADC_SAR_IP_THRHLR_COUNT > 6U)
268 THRHLR6Addr = (volatile uint32 *)&(AdcBasePtr->THRHLR6);
269 THRHLR7Addr = (volatile uint32 *)&(AdcBasePtr->THRHLR7);
270 #if (ADC_SAR_IP_THRHLR_COUNT > 8U)
271 THRHLR8Addr = (volatile uint32 *)&(AdcBasePtr->THRHLR8);
272 THRHLR9Addr = (volatile uint32 *)&(AdcBasePtr->THRHLR9);
273 THRHLR10Addr = (volatile uint32 *)&(AdcBasePtr->THRHLR10);
274 THRHLR11Addr = (volatile uint32 *)&(AdcBasePtr->THRHLR11);
275 #if (ADC_SAR_IP_THRHLR_COUNT > 12U)
276 THRHLR12Addr = (volatile uint32 *)&(AdcBasePtr->THRHLR12);
277 THRHLR13Addr = (volatile uint32 *)&(AdcBasePtr->THRHLR13);
278 THRHLR14Addr = (volatile uint32 *)&(AdcBasePtr->THRHLR14);
279 THRHLR15Addr = (volatile uint32 *)&(AdcBasePtr->THRHLR15);
280 #endif /* (ADC_SAR_IP_THRHLR_COUNT > 12U) */
281 #endif /* (ADC_SAR_IP_THRHLR_COUNT > 8U) */
282 #endif /* (ADC_SAR_IP_THRHLR_COUNT > 6U) */
283 }
284 #endif /* ADC_SAR_IP_HAS_THRHLR_ARRAY */
285
286 #if ADC_SAR_IP_HAS_THRHLR_ARRAY
287 #if (ADC_SAR_IP_DEV_ERROR_DETECT == STD_ON)
288 DevAssert(RegisterNumber < ADC_SAR_IP_THRHLR_COUNT);
289 #endif /* (ADC_SAR_IP_DEV_ERROR_DETECT == STD_ON) */
290 uint32 Value = ADC_THRHLR_THRH(HighThreshold) |
291 ADC_THRHLR_THRL(LowThreshold);
292 AdcBasePtr->THRHLR[RegisterNumber] = Value;
293
294 #else /* ADC_SAR_IP_HAS_THRHLR_ARRAY == 0 */
295
296 uint32 Value = ADC_THRHLR0_THRH(HighThreshold) |
297 ADC_THRHLR0_THRL(LowThreshold);
298 switch (RegisterNumber)
299 {
300 case 0:
301 *THRHLR0Addr = Value;
302 break;
303 case 1:
304 *THRHLR1Addr = Value;
305 break;
306 case 2:
307 *THRHLR2Addr = Value;
308 break;
309 case 3:
310 *THRHLR3Addr = Value;
311 break;
312 case 4:
313 *THRHLR4Addr = Value;
314 break;
315 case 5:
316 *THRHLR5Addr = Value;
317 break;
318 #if ((ADC_SAR_IP_THRHLR_COUNT > 6U) || FEATURE_ADC_HAS_APPLICATION_EXTENSION)
319 case 6:
320 *THRHLR6Addr = Value;
321 break;
322 case 7:
323 *THRHLR7Addr = Value;
324 break;
325 #if ((ADC_SAR_IP_THRHLR_COUNT > 8U) || FEATURE_ADC_HAS_APPLICATION_EXTENSION)
326 case 8:
327 *THRHLR8Addr = Value;
328 break;
329 case 9:
330 *THRHLR9Addr = Value;
331 break;
332 case 10:
333 *THRHLR10Addr = Value;
334 break;
335 case 11:
336 *THRHLR11Addr = Value;
337 break;
338 #if ((ADC_SAR_IP_THRHLR_COUNT > 12U) || FEATURE_ADC_HAS_APPLICATION_EXTENSION)
339 case 12:
340 *THRHLR12Addr = Value;
341 break;
342 case 13:
343 *THRHLR13Addr = Value;
344 break;
345 case 14:
346 *THRHLR14Addr = Value;
347 break;
348 case 15:
349 *THRHLR15Addr = Value;
350 break;
351 #endif /* ((ADC_SAR_IP_THRHLR_COUNT > 12U) || ...) */
352 #endif /* ((ADC_SAR_IP_THRHLR_COUNT > 8U) || ...) */
353 #endif /* ((ADC_SAR_IP_THRHLR_COUNT > 6U) || ...) */
354 default:
355 ; /* no-op */
356 break;
357 }
358 #endif /* ADC_SAR_IP_HAS_THRHLR_ARRAY */
359 }
360
361 #if (ADC_SAR_IP_HAS_CWSELR_UNROLLED == 1u)
362 /*FUNCTION*********************************************************************
363 *
364 * Function Name : Adc_Sar_GetChannelWatchdogAddress
365 * Description : Returns the address of the specified CWSELR register
366 *
367 *END*************************************************************************/
Adc_Sar_GetChannelWatchdogAddress(const uint32 Instance,const uint32 RegisterNumber)368 static inline volatile uint32 * Adc_Sar_GetChannelWatchdogAddress(const uint32 Instance,
369 const uint32 RegisterNumber)
370 {
371 ADC_Type * AdcBasePtr = NULL_PTR;
372 #if FEATURE_ADC_HAS_APPLICATION_EXTENSION
373 SAR_ADC_AE_Type * AdcAEBasePtr = NULL_PTR;
374 #endif /* FEATURE_ADC_HAS_APPLICATION_EXTENSION */
375 volatile uint32 * CwselrAddr = NULL_PTR;
376 #if (ADC_SAR_IP_HAS_CWSELR0 || FEATURE_ADC_HAS_APPLICATION_EXTENSION)
377 volatile uint32 * CWSELR0Addr = NULL_PTR;
378 #endif /* (ADC_SAR_IP_HAS_CWSELR0 || FEATURE_ADC_HAS_APPLICATION_EXTENSION) */
379 #if (ADC_SAR_IP_HAS_CWSELR1 || FEATURE_ADC_HAS_APPLICATION_EXTENSION)
380 volatile uint32 * CWSELR1Addr = NULL_PTR;
381 #endif /* (ADC_SAR_IP_HAS_CWSELR1 || FEATURE_ADC_HAS_APPLICATION_EXTENSION) */
382 #if (ADC_SAR_IP_HAS_CWSELR2 || FEATURE_ADC_HAS_APPLICATION_EXTENSION)
383 volatile uint32 * CWSELR2Addr = NULL_PTR;
384 #endif /* (ADC_SAR_IP_HAS_CWSELR2 || FEATURE_ADC_HAS_APPLICATION_EXTENSION) */
385
386 #if FEATURE_ADC_HAS_APPLICATION_EXTENSION
387 if (Instance >= ADC_INSTANCE_COUNT)
388 {
389 AdcAEBasePtr = Adc_Sar_AE_Ip_apxAdcBase[Instance - ADC_INSTANCE_COUNT];
390 CWSELR0Addr = (volatile uint32 *)&(AdcAEBasePtr->CWSELR0);
391 CWSELR1Addr = (volatile uint32 *)&(AdcAEBasePtr->CWSELR1);
392 CWSELR2Addr = (volatile uint32 *)&(AdcAEBasePtr->CWSELR2);
393 }
394 else
395 #endif /* FEATURE_ADC_HAS_APPLICATION_EXTENSION */
396 {
397 AdcBasePtr = Adc_Sar_Ip_apxAdcBase[Instance];
398 #if ADC_SAR_IP_HAS_CWSELR0
399 CWSELR0Addr = (volatile uint32 *)&(AdcBasePtr->CWSELR0);
400 #endif /* ADC_SAR_IP_HAS_CWSELR0 */
401 #if ADC_SAR_IP_HAS_CWSELR1
402 CWSELR1Addr = (volatile uint32 *)&(AdcBasePtr->CWSELR1);
403 #endif /* ADC_SAR_IP_HAS_CWSELR1 */
404 #if ADC_SAR_IP_HAS_CWSELR2
405 CWSELR2Addr = (volatile uint32 *)&(AdcBasePtr->CWSELR2);
406 #endif /* ADC_SAR_IP_HAS_CWSELR2 */
407 }
408
409 switch (RegisterNumber)
410 {
411 #if (ADC_SAR_IP_HAS_CWSELR0 || FEATURE_ADC_HAS_APPLICATION_EXTENSION)
412 case 0u:
413 CwselrAddr = CWSELR0Addr;
414 break;
415 #endif /* (ADC_SAR_IP_HAS_CWSELR0 || FEATURE_ADC_HAS_APPLICATION_EXTENSION) */
416 #if (ADC_SAR_IP_HAS_CWSELR1 || FEATURE_ADC_HAS_APPLICATION_EXTENSION)
417 case 1u:
418 CwselrAddr = CWSELR1Addr;
419 break;
420 #endif /* (ADC_SAR_IP_HAS_CWSELR1 || FEATURE_ADC_HAS_APPLICATION_EXTENSION) */
421 #if (ADC_SAR_IP_HAS_CWSELR2 || FEATURE_ADC_HAS_APPLICATION_EXTENSION)
422 case 2u:
423 CwselrAddr = CWSELR2Addr;
424 break;
425 #endif /* (ADC_SAR_IP_HAS_CWSELR2 || FEATURE_ADC_HAS_APPLICATION_EXTENSION) */
426 #if ADC_SAR_IP_HAS_CWSELR3
427 case 3u:
428 CwselrAddr = (volatile uint32 *)&(AdcBasePtr->CWSELR3);
429 break;
430 #endif /* ADC_SAR_IP_HAS_CWSELR3 */
431 #if ADC_SAR_IP_HAS_CWSELR4
432 case 4u:
433 CwselrAddr = (volatile uint32 *)&(AdcBasePtr->CWSELR4);
434 break;
435 #endif /* ADC_SAR_IP_HAS_CWSELR4 */
436 #if ADC_SAR_IP_HAS_CWSELR5
437 case 5u:
438 CwselrAddr = (volatile uint32 *)&(AdcBasePtr->CWSELR5);
439 break;
440 #endif /* ADC_SAR_IP_HAS_CWSELR5 */
441 #if ADC_SAR_IP_HAS_CWSELR6
442 case 6u:
443 CwselrAddr = (volatile uint32 *)&(AdcBasePtr->CWSELR6);
444 break;
445 #endif /* ADC_SAR_IP_HAS_CWSELR6 */
446 #if ADC_SAR_IP_HAS_CWSELR7
447 case 7u:
448 CwselrAddr = (volatile uint32 *)&(AdcBasePtr->CWSELR7);
449 break;
450 #endif /* ADC_SAR_IP_HAS_CWSELR7 */
451 #if ADC_SAR_IP_HAS_CWSELR8
452 case 8u:
453 CwselrAddr = (volatile uint32 *)&(AdcBasePtr->CWSELR8);
454 break;
455 #endif /* ADC_SAR_IP_HAS_CWSELR8 */
456 #if ADC_SAR_IP_HAS_CWSELR9
457 case 9u:
458 CwselrAddr = (volatile uint32 *)&(AdcBasePtr->CWSELR9);
459 break;
460 #endif /* ADC_SAR_IP_HAS_CWSELR9 */
461 #if ADC_SAR_IP_HAS_CWSELR10
462 case 10u:
463 CwselrAddr = (volatile uint32 *)&(AdcBasePtr->CWSELR10);
464 break;
465 #endif /* ADC_SAR_IP_HAS_CWSELR10 */
466 #if ADC_SAR_IP_HAS_CWSELR11
467 case 11u:
468 CwselrAddr = (volatile uint32 *)&(AdcBasePtr->CWSELR11);
469 break;
470 #endif /* ADC_SAR_IP_HAS_CWSELR11 */
471 default:
472 ; /* the RegisterNumber does not exist */
473 #if (ADC_SAR_IP_DEV_ERROR_DETECT == STD_ON)
474 DevAssert(FALSE);
475 #endif /* (ADC_SAR_IP_DEV_ERROR_DETECT == STD_ON) */
476 break;
477 }
478
479 return CwselrAddr;
480 }
481 #endif /* ADC_SAR_IP_HAS_CWSELR_UNROLLED == 1 */
482
483 #if (STD_ON == ADC_SAR_IP_WDG_ENABLED)
484 /*FUNCTION*********************************************************************
485 *
486 * Function Name : Adc_Sar_WriteChannelMapping
487 * Description :
488 *
489 *END*************************************************************************/
Adc_Sar_WriteChannelMapping(const uint32 Instance,const uint32 RegisterNumber,const uint32 FieldPosition,const uint32 Value)490 static inline void Adc_Sar_WriteChannelMapping(const uint32 Instance,
491 const uint32 RegisterNumber,
492 const uint32 FieldPosition,
493 const uint32 Value)
494 {
495 uint32 CwselrVal;
496 uint32 CwselrMask;
497 uint32 CwselrShift;
498
499 #if (ADC_SAR_IP_HAS_CWSELR_UNROLLED == 1u)
500 volatile uint32 * Cwselr = Adc_Sar_GetChannelWatchdogAddress(Instance, RegisterNumber);
501
502 /* Each CWSELR register contains 8 watchdog selections according to 8 channels
503 Each watchdog selection possibly needs maximum 4 bits for setting */
504 CwselrShift = FieldPosition * ADC_CWSELR0_WSEL_CH1_SHIFT;
505 CwselrMask = (uint32)ADC_CWSELR0_WSEL_CH0_MASK << CwselrShift;
506 CwselrVal = (*Cwselr) & (~CwselrMask);
507 CwselrVal |= ADC_CWSELR0_WSEL_CH0(Value) << CwselrShift;
508 *Cwselr = CwselrVal;
509 #else /* ADC_SAR_IP_HAS_CWSELR_UNROLLED == 0 */
510 ADC_Type * const AdcBasePtr = Adc_Sar_Ip_apxAdcBase[Instance];
511
512 CwselrShift = FieldPosition * ADC_CWSELR_WSEL_CH1_SHIFT;
513 CwselrMask = (uint32)ADC_CWSELR_WSEL_CH0_MASK << CwselrShift;
514 CwselrVal = CWSELR(AdcBasePtr, RegisterNumber) & (~CwselrMask);
515 CwselrVal |= ADC_CWSELR_WSEL_CH0(Value) << CwselrShift;
516 CWSELR(AdcBasePtr, RegisterNumber) = CwselrVal;
517 #endif /* (ADC_SAR_IP_HAS_CWSELR_UNROLLED == 1u) */
518 }
519 #endif /* (STD_ON == ADC_SAR_IP_WDG_ENABLED) */
520
Adc_Sar_ResetWdogCWSELR(const uint32 Instance,const uint8 RegisterNumber)521 static inline void Adc_Sar_ResetWdogCWSELR(const uint32 Instance, const uint8 RegisterNumber)
522 {
523 #if (ADC_SAR_IP_HAS_CWSELR_UNROLLED == 1u)
524 volatile uint32 * Cwselr = Adc_Sar_GetChannelWatchdogAddress(Instance, (uint32)RegisterNumber);
525
526 *Cwselr = 0U;
527 #else /* ADC_SAR_IP_HAS_CWSELR_UNROLLED == 0 */
528 ADC_Type * const AdcBasePtr = Adc_Sar_Ip_apxAdcBase[Instance];
529
530 CWSELR(AdcBasePtr, RegisterNumber) = 0u;
531 #endif /* (ADC_SAR_IP_HAS_CWSELR_UNROLLED == 1u) */
532 }
533
534 #define ADC_STOP_SEC_CODE
535 #include "Adc_MemMap.h"
536
537 #ifdef __cplusplus
538 }
539 #endif
540
541 /** @} */
542
543 #endif /* ADC_SAR_IP_HW_ACCESS_H */
544
