1 /* 2 * Copyright 2018-2020 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef _FSL_LDB_H_ 9 #define _FSL_LDB_H_ 10 11 #include "fsl_common.h" 12 13 /*! 14 * @addtogroup ldb 15 * @{ 16 */ 17 18 /*! @file */ 19 20 /****************************************************************************** 21 * Definitions 22 *****************************************************************************/ 23 24 /*! @name Driver version */ 25 /*@{*/ 26 /*! @brief LDB driver version. */ 27 #define FSL_LDB_DRIVER_VERSION (MAKE_VERSION(2, 0, 2)) 28 /*@}*/ 29 30 /*! @brief LDB output bus format. */ 31 typedef enum _ldb_output_bus 32 { 33 kLDB_OutputRGB666_7Bit_SPWG = 0U, 34 #if (defined(FSL_FEATURE_LDB_COMBO_PHY) && FSL_FEATURE_LDB_COMBO_PHY) 35 kLDB_OutputRGB888_7Bit_SPWG = LDB_PM_CTRL_REG_CH0_DATA_WIDTH_MASK, 36 kLDB_OutputRGB888_7Bit_JEIDA = LDB_PM_CTRL_REG_CH0_DATA_WIDTH_MASK | LDB_PM_CTRL_REG_CH0_BIT_MAPPING_MASK, 37 #else 38 kLDB_OutputRGB888_7Bit_SPWG = LDB_PM_CTRL_REG_CH0_DATA_WIDTH_MASK | LDB_PM_CTRL_REG_DI0_DATA_WIDTH(1), 39 kLDB_OutputRGB888_7Bit_JEIDA = 40 LDB_PM_CTRL_REG_CH0_DATA_WIDTH_MASK | LDB_PM_CTRL_REG_DI0_DATA_WIDTH(1) | LDB_PM_CTRL_REG_CH0_BIT_MAPPING_MASK, 41 kLDB_OutputRGB101010_10Bit_SPWG = LDB_PM_CTRL_REG_CH0_10B_EN_MASK | LDB_PM_CTRL_REG_DI0_DATA_WIDTH(2), 42 kLDB_OutputRGB101010_10Bit_JEIDA = 43 LDB_PM_CTRL_REG_CH0_10B_EN_MASK | LDB_PM_CTRL_REG_DI0_DATA_WIDTH(2) | LDB_PM_CTRL_REG_CH0_BIT_MAPPING_MASK, 44 #endif /* FSL_FEATURE_LDB_COMBO_PHY */ 45 } ldb_output_bus_t; 46 47 /*! @brief LDB input signal priority. */ 48 enum _ldb_input_flag 49 { 50 kLDB_InputVsyncActiveLow = 0U, /*!< VSYNC active low. */ 51 kLDB_InputVsyncActiveHigh = 1U << 0U, /*!< VSYNC active high. */ 52 kLDB_InputHsyncActiveLow = 0U, /*!< HSYNC active low. */ 53 kLDB_InputHsyncActiveHigh = 1U << 1U, /*!< HSYNC active high. */ 54 kLDB_InputDataLatchOnFallingEdge = 0U, /*!< Latch data on falling clock edge. */ 55 kLDB_InputDataLatchOnRisingEdge = 1U << 2U, /*!< Latch data on rising clock edge. */ 56 }; 57 58 /*! @brief LDB channel configuration. */ 59 typedef struct _ldb_channel_config 60 { 61 ldb_output_bus_t outputBus; /*!< Output bus format. */ 62 uint32_t inputFlag; /*!< Input flag, OR'ed value of _ldb_input_flag. */ 63 uint32_t pixelClock_Hz; /*!< Pixel clock in HZ. */ 64 } ldb_channel_config_t; 65 66 /******************************************************************************* 67 * API 68 ******************************************************************************/ 69 70 #ifdef __cplusplus 71 extern "C" { 72 #endif 73 74 /*! 75 * @brief Initializes the LDB module. 76 * 77 * @param base LDB peripheral base address. 78 */ 79 void LDB_Init(LDB_Type *base); 80 81 /*! 82 * @brief De-initializes the LDB module. 83 * 84 * @param base LDB peripheral base address. 85 */ 86 void LDB_Deinit(LDB_Type *base); 87 88 /*! 89 * @brief Initializes the LDB channel. 90 * 91 * @param base LDB peripheral base address. 92 * @param channel Channel index. 93 * @param config Pointer to the configuration. 94 * @return Return kStatus_Success if success. 95 */ 96 status_t LDB_InitChannel(LDB_Type *base, uint8_t channel, const ldb_channel_config_t *config); 97 98 /*! 99 * @brief De-initializes the LDB channel. 100 * 101 * @param base LDB peripheral base address. 102 * @param channel Channel index. 103 */ 104 void LDB_DeinitChannel(LDB_Type *base, uint8_t channel); 105 106 #if defined(__cplusplus) 107 } 108 #endif /*_cplusplus*/ 109 /*@}*/ 110 111 #endif /* _FSL_LDB_H_ */ 112
