1 /*
2  * Copyright 2022 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include "fsl_intm.h"
9 
10 /*******************************************************************************
11  * Definitions
12  ******************************************************************************/
13 
14 /* Component ID definition, used by tools. */
15 #ifndef FSL_COMPONENT_ID
16 #define FSL_COMPONENT_ID "platform.drivers.intm"
17 #endif
18 
19 /*******************************************************************************
20  * Code
21  ******************************************************************************/
22 /*!
23  * brief  Fill in the INTM config struct with the default settings
24  *
25  * The default values are:
26  * code
27  *     config[0].irqnumber = NotAvail_IRQn;
28  *     config[0].maxtimer = 1000U;
29  *     config[1].irqnumber = NotAvail_IRQn;
30  *     config[1].maxtimer = 1000U;
31  *     config[2].irqnumber = NotAvail_IRQn;
32  *     config[2].maxtimer = 1000U;
33  *     config[3].irqnumber = NotAvail_IRQn;
34  *     config[3].maxtimer = 1000U;
35  *     config->enable = false;
36  * endcode
37  * param config Pointer to user's INTM config structure.
38  */
INTM_GetDefaultConfig(intm_config_t * config)39 void INTM_GetDefaultConfig(intm_config_t *config)
40 {
41     assert(config);
42 
43     for (uint32_t i = 0; i < (uint32_t)FSL_FEATURE_INTM_MONITOR_COUNT; i++)
44     {
45         config->intm[i].irqnumber = NotAvail_IRQn;
46         config->intm[i].maxtimer  = 1000U;
47     }
48 
49     /* INTM cycle count timer mode disable*/
50     config->enable = false;
51 }
52 
53 /*!
54  * brief Ungates the INTM clock and configures the peripheral for basic operation.
55  *
56  * note This API should be called at the beginning of the application using the INTM driver.
57  *
58  * param base      INTM peripheral base address
59  * param config    Pointer to user's INTM config structure.
60  */
INTM_Init(INTM_Type * base,const intm_config_t * config)61 void INTM_Init(INTM_Type *base, const intm_config_t *config)
62 {
63 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
64     CLOCK_EnableClock(kCLOCK_Intm);
65 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
66     for (uint32_t i = 0U; i < (uint32_t)FSL_FEATURE_INTM_MONITOR_COUNT; i++)
67     {
68         base->MON[i].INTM_IRQSEL  = INTM_MON_INTM_IRQSEL_IRQ(config->intm[i].irqnumber);
69         base->MON[i].INTM_LATENCY = INTM_MON_INTM_LATENCY_LAT(config->intm[i].maxtimer);
70     }
71 
72     INTM_EnableCycleCount(base, config->enable);
73 }
74 
75 /*!
76  * brief Disables the INTM module.
77  *
78  * param base INTM peripheral base address
79  */
INTM_Deinit(INTM_Type * base)80 void INTM_Deinit(INTM_Type *base)
81 {
82 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
83     /* Gate the INTM clock*/
84     CLOCK_DisableClock(kCLOCK_Intm);
85 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
86 }
87